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2011-04-29ENGR00142745 MX50 RD3: Fix missing pmic config in imx5_update_defconfigrel_imx_2.6.35_11.04.01Robby Cai
Miss the PMIC config shall break the building. This patch fixed this problem. Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-27ENGR00142581-1 MX50 RD3: Make SEIKO WVGA panel work on J12Robby Cai
J12 shares the PIN with EPD. This patch add platform-specific configuration for SEIKO WVGA To make SEIKO WVGA panel work on J12, need add "lcd=1,j12" in kernel cmdline. If make it work on J13, just need "lcd=1" Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-21ENGR00142411-1 [MX50]RD3 change switch modeAnson Huang
change switch mode to APS and PFM according to PMIC team suggestion. Signed-off-by: Anson Huang <b20788@freescale.com>
2011-04-20ENGR00142097 MX50 RD3: Fix: Enable HDMI will cause reboot failureRobby Cai
On PoR(Power-On-Reset), the issue does not exist; only on WDog Reset (for example, issue "reboot" command in Linux) this issue happens, and kernel stops at HDMI reset. Note that PoR will reset IOMUX setting, but WDog Reset will not reset IOMUX. However, WDog Reset will reset GPIO setting(as INPUT). With this fact in mind, we can explain the reason much more easily. It seems that SI2312BDS supposes EIM_RW to be always high to work well. On WDog reset, the EIM_RW is set as GPIO INPUT which causes 1V2_HDMI to output 0.0V. Even HDMI driver sets EIM_RW as GPIO OUTPUT High which causes 1V2_HDMI to output 1.2V, HDMI reset does not work well. This reality shows that a LOW-HIGH timing causes SI2312BDS not work well. Instead a HIGH-LOW-HIGH timing appears to be needed to get a stable output. Actually, on PoR, the EIM_RW (GPIO to control HDMI power) is set as default MUX_MODE 0, which causes 1V2_HDMI outputs 1.2V. In this case, the timing meets HIGH-LOW-HIGH, HDMI reset works well. So similarly, we need pull EIM_RW high to 1V2_HDMI output high firstly in driver to achieve HIGH-LOW-HIGH timing. Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-18ENGR00142264 MX50 RD3: Make battery driver built as moduleRobby Cai
build battery driver as module Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-18ENGR00142258 isolate EIM signals and boot configuration signalsRobby Cai
Fix the previous setting for GP6_11. set UART2_RXD (GP6_11) to high level, not low. Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-16ENGR00142018 MX50: Add PD+3 routine for all DDR typesRobby Cai
PD+3 help test pass for DDR with higher freq. Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-14ENGR00142123-2 MX50: Add CLAA WVGA driver support on RD3Robby Cai
- Modified command line setup() to add "lcd=2" to choose CLAA WVGA - Added function to enable/disable pins, (Same PIN Setting as HDMI) Here's a matrix to show co-working capability for EPDC, HDMI, SEIKO/CLAA WVGA - EPDC, CLAA WVGA on J12 on RD3 - SEIKO WVGA on J13 on RD3 ------------------------------------------------------------------ | EPDC | HDMI | SEIKO WVGA | CLAA WVGA ------------------------------------------------------------------ EPDC | - | | | ------------------------------------------------------------------ HDMI | N (*) | - | | ------------------------------------------------------------------ SEIKO WVGA | Y | N (**) | - | ------------------------------------------------------------------ CLAA WVGA | N (*) | N (**) | Y (***) | - ------------------------------------------------------------------ LEGEND: (*) Shares the same pins. (**) Shares LCDIF, but not same timing. (***) Shares LCDIF, and could share same timing for them fortunately. (NOTE: only tested with these two panels, need "lcd=2" in kernel cmdline). Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-12ENGR00142006: MX50- Fix audio noise issue.Ranjani Vaidyanathan
Clicking sound can be heard whenever the system transitions between LPAPM mode and normal mode. Sometimes channel swapping also occurs. The issue can be reproduced only when tested with a mono-tone audio clip. The issue was caused by stalling of the bus masters when the DDR frequency was being changed. Fix is to allow SDMA to access IRAM via QoS (ports 0 and 1) during the DDR frequency transition. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2011-04-07ENGR00140983-3 - MSL: Support SII902X HDMI on MX50 RD3Danny Nold
- Define SII902X structure and default video mode - Add functions to enable/disable HDMI pins - Define HDMI as default LCDIF device - Add command line setup() to select between LCD and HDMI as primary output for LCDIF Signed-off-by: Danny Nold <dannynold@freescale.com>
2011-04-07ENGR00140983-1 - MX50 IOMUX: Add defines to use LCDIF through EPDC padsDanny Nold
- Defined IOMUX settings to allow use of EPDC pins for ELCDIF functionality. Signed-off-by: Danny Nold <dannynold@freescale.com>
2011-04-07ENGR00140737-2 - ARM: imx50: Fix APLL relocking and remove APLL auto-disableDanny Nold
- Removed setting of pfd_disable_mask bits in pfd enable/disable functions. This feature, which automates the disabling of the APLL, was being used incorrectly and is less clear than manually enabling/disabling PFD and APLL clocks directly. - Added wait for APLL relocking after APLL is enabled. Signed-off-by: Danny Nold <dannynold@freescale.com>
2011-04-07ENGR00140737-1 - ARM: plat-mxc: Disable child clocks before parent clocksDanny Nold
- Reversed ordering in which clocks are disabled. Child clocks should be disabled before parent (root) clocks. Signed-off-by: Danny Nold <dannynold@freescale.com>
2011-04-06ENGR00141672 MX50 RD3: Add board-specific configuration for M25P32Robby Cai
Add platform data (partition info, etc.) for SPI NOR(M25P32) driver Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-06ENGR00141508-2 MX50 RD3: Add board-specific file for PMIC RipleyRobby Cai
register PMIC spi device and platform data. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com> Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-02ENGR00140872 MX50: Add RD3 supportRobby Cai
One image for RD1(RDP) and RD3 by adding board_is_rd3 to distinguish them. The patch covers board changes as follows: - FEC_EN pin changed. - POWER_EN and DISP_VSYNC pin switched. - set UART1_RTS__GPIO_6_9 to enable SD2 VDD - DCDC_EN changed Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-02ENGR00141425-2 MX50 RDP: Adjust MC13892 driver on new frameworkRobby Cai
Changed the .modalias to "mc13892", so that the PMIC SPI driver can use the modalias to distinguish the "mc13892" and the new PMIC "mc34708". Signed-off-by: Robby Cai <R63905@freescale.com>
2011-03-31ENGR00141363 ARM imx53 clock: change di0 clock default parent to pll3Jason Chen
If enable both LVDS and one display device use external di clock, there will be conflict between their clock parent -- both use pll4 on mx53. So it need change di0 clock parent to pll3, and then uart parent need change to pll2 to avoid console mess. Signed-off-by: Jason Chen <b02280@freescale.com>
2011-03-30ENGR00141343 Mx53: reduce vdd_reg power on suspendZhou Jingyu
CLear DSE[2] bit to 0 for DDR pads before WFI to reduce ddr pre-driver power Restore the settings after WFI to enable DDR access This patch reduce VDD_REG current from 5mA to about 0.5mA Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
2011-03-29ENGR00141310 mx5x clock: add emi_fast_clk as tz1's parent for uart dmaXinyu Chen
UART dma mode doing data transfer between uart fifo and ddr. So emi_fast_clk must be enabled when dma on. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
2011-03-29ENGR00141306 MX53 SMD: add Seiko WVGA LCD panel supportLily Zhang
This patch adds Seiko WVGA LCD panel support in MX53 SMD board. The video mode setting is: video=mxcdi0fb:RGB24,SEIKO-WVGA di0_primary Signed-off-by: Lily Zhang <r58066@freescale.com>
2011-03-28ENGR00141184: MX53 SMD: spi nor: the expected SPI-NOR partitions are not createdTerry Lv
For in mxc platforms, we use arm/mach/flash.h for flash_platform_data definition, but our driver m25p80 uses linux/spi/flash.h. These two flash_platform_data structures are different. This may cause an issue in creating partitions. Now in mx53 smd, we choose flash_platform_data in linux/spi/flash.h. This can uniform the flash_platform_data structure. Signed-off-by: Terry Lv <r65388@freescale.com>
2011-03-28ENGR00141152-2 imx5X MSL: make default display optionJason Chen
Change MSL files. Signed-off-by: Jason Chen <b02280@freescale.com>
2011-03-25ENGR00141155-1 ARM mx53_smd: add related regulator for hdmiJason Chen
add related regulator for hdmi. Signed-off-by: Jason Chen <b02280@freescale.com>
2011-03-24ENGR00141109: MX53-SMD: SPI-NOR: Add mxc_m25p80 to imx5_defconfigTerry Lv
mxc_m25p80 config is not added to imx5_defconfig. Thus in this patch it is added. Signed-off-by: Terry Lv <r65388@freescale.com>
2011-03-23ENGR00140763 MX53: By default only enable da9053 irq as wakeup sourceZhou Jingyu
by default only enable da9053 irq as wakeup source for board with new OTP DA9053, need to reverse this patch to enable other irq wakeup Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
2011-03-22ENGR00140979: MX53: Update VDDGP voltagesRanjani Vaidyanathan
Update the VDDGP voltages for the various supported frequencies to correspond to the latest characterized data. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2011-03-22ENGR00140875: MX51: Added 400MHz working pointRanjani Vaidyanathan
Added 400MHz to the cpu_wp_tbl and to the dvfs_core_setpoint arrays. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2011-03-22ENGR00140971 Add support for LVDS & touchscreen on MX53 ARD RevB brdDinh Nguyen
MX53 ARD Rev.B board uses a different LVDS and touchscreen panel. This patch adds support for the panel with the new touchscreen. Also adds function calls that returns the correct board ID for MX53 ARD Rev.A and Rev.B boards. Signed-off-by: Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com> Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
2011-03-22ENGR00140893-3 Re-generate imx5_defconfig due to MXC_VPU_IRAM config removedSammy He
This patch will remove CONFIG_MXC_VPU_IRAM in default defconfig. Signed-off-by: Sammy He <r62914@freescale.com>
2011-03-22ENGR00140893-2 vpu: Add iram info to vpu platform data for each platformSammy He
Add iram info to vpu platform data for each platform in linux/arch folder. Disable iram on MX51 and Enable iram on MX53 platforms. And remove VPU_IRAM_SIZE usage. Signed-off-by: Sammy He <r62914@freescale.com>
2011-03-22ENGR00140933 MX51 IOMUX fix headphone detect pin iomux.Zhang Jiejing
After iomux upgrade, this pin's iomux change to a PULL up 100K, but not PUE bit, this will cause the pin can't work. This patch fix this. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
2011-03-20ENGR00140274: SPI_NOR: Add m25p32 spi flash supportTerry Lv
SPI_NOR: Add m25p32 spi flash support. Signed-off-by: Terry Lv <r65388@freescale.com>
2011-03-17ENGR00140710-1 usb-device: add more device wakeup modesPeter Chen
Following usb device wakeup modes is supported are added: -vbus failing wakeup: it happens when our SoC suspend and host's vbus failing (after host(pc) suspends 10 seconds later) -device receives reset wakeup: it happens follow below steps: --Find MSC device at pc for soc --Right-click -> Disable (this will suspend the device) --let soc go to suspend --Right-click -> Enable (this will reset the device) -device receives resume signal from pc: it can be tested by pc HSET tools Signed-off-by: Peter Chen <peter.chen@freescale.com>
2011-03-17ENGR00140668 MX53: increase dram_sdclkx driver strengthZhou Jingyu
increase dram_sdclkx driver strength to avoid resume failure Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
2011-03-16ENGR00140699-2 [mx28 spi] add a parameter to select spi master/slave modeTony Lin
add a parameter to select spi master/slave mode by default, spi master mode is selected. Signed-off-by: Tony Lin <tony.lin@freescale.com>
2011-03-16ENGR00140644 mx51 enchance the sd/mmc HW timing compatibility on BBGRichard Zhu
Some cards have the CRC errors in read on mx51 BBG board. Configure the eSDHC pad configurations to level up the compatibility to fix this issue. Signed-off-by: Richard Zhu <Hong-Xing.Zhu@freescale.com>
2011-03-15ENGR00140550-4 [imx28/AR6003]enable staging/ar6003 driver in default configTony Lin
select ar6003 driver under staging Signed-off-by: Tony Lin <tony.lin@freescale.com>
2011-03-15ENGR00140550-3 [imx5/AR6003]enable staging/ar6003 driver in default configTony Lin
select ar6003 driver under staging Signed-off-by: Tony Lin <tony.lin@freescale.com>
2011-03-10ENGR00139626 MX53: fix can not set to 160M when current CPU works at 1000MZhou Jingyu
Add correct pll parameters for 160M working point Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
2011-03-10ENGR00140265 mx53 smd: add support for hardware pin controlled suspendZhou Jingyu
Add support for hardware pin controlled suspend for mx53 smd revB, Also reduce DRAM_SDCLK drive strength for both mx51 and mx53 on suspend 1)First need to rework revB to connect pmic_stdby_req with DA9053 sys_en_gpio8 to support hardware pin suspend 2)for revB with new OTP DA9053 chip, any irq can wake up the system reliably 3)for revB with old OTP DA9053 chip, need to rework pwron key and only pwron key irq can wake up the system reliably 4)for mx53 smd revA and loco board still use sw command to suspend, and resume it not stable Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
2011-03-08ENGR00140390 MX53_SMD: IOMUX: Fix UART3 iomux or Atheros BT will hang.Zhang Jiejing
Fix UART3_CTS Pad setting, this will cause Atheros UART BT chip hang, the _select_input_ofs bit is for ALT6, not CTS: ALT2 Please Refer: IMX53RM(p.1732). Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
2011-03-01ENGR00139672-2 Make use of the new mx5x_revision callDinh Nguyen
For better alignment with the upstream i.MX kernel, switch from cpu_is_mx5x_rev() to mx5x_revision(). Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
2011-03-01ENGR00139672-1 mx5: Get the silicon revision from the IIMDinh Nguyen
For MX51 and MX53,the SI_REV fuse will have the correct silicon revision that can be read from the IIM module. For MX50, the HW_ADADIG_DIGPROG register in the ANATOP module will have the correct silicon revision: Major Minor Description 0x50 0x0 TO1.0 0x50 0x1 TO1.1 Dropped all support for MX51 TO1.0 and TO1.1, only MX51 REV 2.0 and 3.0 are valid. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
2011-03-01ENGR00139531: MX5x-All bus-masters must have DDR clock as a dependent clock.Ranjani Vaidyanathan
All the bus masters need to have clock to DDR (emi_fast_clk for MX51 & MX53) as secondary clocks to ensure the clocks to DDR remain ON as long as the bus master is active. In case of SDMA (and associated peripherals), if the buffers are stored in IRAM, emi_fast or ddr_clk is not a dependent clock. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2011-03-01ENGR00139866 Config: add USB ACM Modem config for MX53_SMDZhang Jiejing
MX53_SMD Have a Amazon modem, which need USB ACM modem support in kernel, enable this in default config. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
2011-02-25ENGR00139383-3 MX5 defconfig:Support ISL29023 light sensorLiu Ying
This patch builds in ISL29023 light sensor driver. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
2011-02-25ENGR00139383-2 MX53 SMD:Support ISL29023 light sensorLiu Ying
This patch adds ISL29023 light sensor support. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
2011-02-23ENGR00139643-1 MSL: can not read edid at probe for first power onJason Chen
Need enable analog regulator. Signed-off-by: Jason Chen <b02280@freescale.com>
2011-02-22ENGR00139503 MX53: Add IEEE 1588 support for mx53 LOCO and SMD boardsZeng Zhaoming
Add IEEE 1588 support for mx53 LOCO and SMD boards Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
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