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2012-01-09ENGR00170244-6 ARM: AHCI: Enable PDDQ mode on mx53 smd boardRichard Zhu
In order to save the power consumption, enable the PDDQ mode of AHCI PHY when there is no sata disk on the port Signed-off-by: Richard Zhu <r65037@freescale.com>
2012-01-09ENGR00170244-5 ARM: AHCI: Enable PDDQ mode on mx53 loco boardRichard Zhu
In order to save the power consumption, enable the PDDQ mode of AHCI PHY when there is no sata disk on the port Signed-off-by: Richard Zhu <r65037@freescale.com>
2012-01-09ENGR00170244-4 ARM: AHCI: Enable PDDQ mode on mx6 sabrelite boardRichard Zhu
In order to save the power consumption, enable the PDDQ mode of AHCI PHY when there is no sata disk on the port Signed-off-by: Richard Zhu <r65037@freescale.com>
2012-01-09ENGR00170244-3 ARM: AHCI: Enable PDDQ mode on mx6 sabreauto boardRichard Zhu
In order to save the power consumption, enable the PDDQ mode of AHCI PHY when there is no sata disk on the port Signed-off-by: Richard Zhu <r65037@freescale.com>
2012-01-09ENGR00170244-2 ARM: AHCI: Enable PDDQ mode on mx6 arm2 boardRichard Zhu
In order to save the power consumption, enable the PDDQ mode of AHCI PHY when there is no sata disk on the port Signed-off-by: Richard Zhu <r65037@freescale.com>
2012-01-09ENGR00170244-1 ARM: AHCI: Enable PDDQ mode when no disk is attachedRichard Zhu
In order to save the power consumption, enable the PDDQ mode of AHCI PHY when there is no sata disk on the port Signed-off-by: Richard Zhu <r65037@freescale.com>
2012-01-09ENGR00170225 mx5x: build failed due to ipuv3 fb platform data changeXinyu Chen
The change impact the mx5 bbg and loco build. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
2012-01-09ENGR00170150 [MX6]Fix suspend/resume fail of debug kernelAnson Huang
Need to push and pop all registers, otherwise, some registers will be modified in the function call, add protection to avoid this scenario. Signed-off-by: Anson Huang <b20788@freescale.com>
2012-01-09ENGR00170127 [IMX6Q]: incorrect kernel config for WLANRyan QIAN
- Add CONFIG_HOSTAP as CONFIG_WIRELESS_EXT's dependency Signed-off-by: Ryan QIAN <b32804@freescale.com>
2012-01-09ENGR00170141: Fix debug messages generated by CPUFREQRanjani Vaidyanathan
When dvfs-core is enabled along with "debug" in command line, CPUFREQ printed too many debug messages. Fix this by changing the threshold settings for DVFS-CORE and make the transitions more conservative and infrequent. Also use the CPUFREQ debug flag. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2012-01-09ENGR00170119 MX6Q:ARD: Sabre-auto(ARD) SATA supportPrabhu Sundararaj
Add support for MX6 Sabre-auto (ARD) board Signed-off-by: Prabhu Sundararaj <prabhu.sundararaj@freescale.com>
2012-01-09ENGR00170145-1 ipuv3: add resource for overlay fb buffer reservationXinyu Chen
We have already had framebuffer reservation for BG display by set the base/size resource in fb platform data. But we may also have FG fb buffer reserve requirement. So add addtional base/size resource in fb plaform data, add a IORESROUCE_MEM resource when fb device register to meet such requirement. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
2012-01-09ENGR00161124 [dvfs, cpufreq] Use regulator API to set cpu voltageNancy Chen
Change dvfs driver and cpufreq driver to use regulator API to set cpu voltage. Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
2012-01-09ENGR00169730 MX6Q:ARD:Rename to correct function names from ARM2 to SABRE AUTOPrabhu Sundararaj
Renaming to correct function and variable names from ARM2 to SABRE AUTO Signed-off-by: Prabhu Sundararaj <prabhu.sundararaj@freescale.com>
2012-01-09fix the building warningsJason Liu
Signed-off-by: Jason Liu <r64343@freescale.com>
2012-01-09fix the smp boot errorJason Liu
Signed-off-by: Jason Liu <jason.hui@linaro.org>
2012-01-09fix build errorJason Liu
Signed-off-by: Jason Liu <jason.hui@linaro.org>
2012-01-09ENGR00170005: Enable DVFS-CORE at bootRanjani Vaidyanathan
DVFS-CORE should be enabled at boot by default. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2012-01-09ENGR00162181-4 MX6Q/GPMI : only decrease the DMA clock when GPMI is enabled.Huang Shijie
Do not decrease the DMA clock if GPMI is not enabled. just for workaround. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-01-09ENGR00162181-3 MX6Q/GPMI : decrease the DMA clock from 200M to 11MHuang Shijie
This is just a workaroud for the DMA timeout. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-01-09ENGR00156855 [mx6q arm2] HDMI EDID read failedSandor Yu
It cause by some HDMI sink device not support I2C 400kbps access. Change EDID I2C speed from 400kbps to 100bps. Signed-off-by: Sandor Yu <R01008@freescale.com>
2012-01-09ENGR00163052: CPUFREQ does not report correct frequencyRanjani Vaidyanathan
When DVFS_CORE is enabled, the following command reports incorrect frequency: cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq Fix this by ensuring the CPUFREQ does not change the frequency when DVFS_CORE is active. And DVFS-CORE informs CPUFREQ of the change done to CPU frequency. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2012-01-09ENGR00169782 [MX6Q]: Add new AR6003 driver to 2.6.38, replacing staging oneRyan QIAN
- remove the staging driver from default config of MX6 Signed-off-by: Ryan QIAN <b32804@freescale.com>
2012-01-09ENGR00162655 MX6 Sabre-lite SATA supportMahesh Mahadevan
Add support for MX6 Sabre-lite board Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
2012-01-09ENGR00169661:Remove the discharge for VBUS and DPTony LIU
MSL part -remove the implementation of discharge DP Signed-off-by: Tony LIU <junjie.liu@freescale.com>
2012-01-09ENGR00161867 MX6Q: change CONFIG_FORCE_MAX_ZONEORDER from 13 to 14Wayne Zou
Fix the bug: can't allocate buffer if setting resolution to 1920*1080p Bug detailed description: use 1920,1080 output resolution mxc_sdc_fb mxc_sdc_fb.0: Unable to allocate framebuffer memory Signed-off-by: Wayne Zou <b36644@freescale.com>
2012-01-09ENGR00163669-2 mx6q mipi_dsi: Add support for mipi dsi displayWayne Zou
mx6q mipi_dsi: support for mipi dsi display Signed-off-by: Wayne Zou <b36644@freescale.com>
2012-01-09ENGR00169509-1 ipuv3 fb: change wait for vsync ioctl irq from eof to nfackJason Chen
change wait for vsync ioctl irq from eof to nfack Signed-off-by: Jason Chen <b02280@freescale.com>
2012-01-09ENGR00163699-1 MX6Q: Add more mipi csi2 supported datatypeEven Xu
Add more mipi csi2 supported datatype. Signed-off-by: Even Xu <b21019@freescale.com>
2012-01-09ENGR00169388-2 MX6Q/UART : fill DMA fields for the platformdata of mx6qHuang Shijie
fill the DMA RX/TX fields for mx6q board. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-01-09ENGR00169388-1 IMX/UART : add DMA fields for platform dataHuang Shijie
add two fields for DMA RX and DMA TX. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-01-09ENGR00163603-1 MX6Q/UART : enable DMA support in the MX6Q-ARM2 boardHuang Shijie
add the DMA feature to the MX6Q-ARM2 board. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-01-09ENGR00163275 [MX6]Fix PLL enable fail panicAnson Huang
The root cause is irqs come between PLL register reading and getting system time, an interrupt handle could take more than 2ms, which will make the time reading and register reading unalignment, see below: 1. pll reg read, it is still not locked; 2. here comes an interrupt, and its handler could spent > 2ms; 3. time reading, found current time already > expiration time(1.2ms), and we treated the pll lock fail; There are two method could fix it, one is disable interrupt during pll lock bit and time expiration check, the other is to add a second time read after time expiration to make sure the pll didn't lock during the time we set. I choose the seconde choise, since it impacts kernel less than disable interrupt; Signed-off-by: Anson Huang <b20788@freescale.com>
2012-01-09ENGR00163615 mx6q: sabrelite RevC: change GPIO for flexcanDong Aisheng
GPIOs used by flexcan are changed on RevC board. Updating the code for RevC board. Signed-off-by: Dong Aisheng <b29396@freescale.com>
2012-01-09ENGR00163510 MX6Q: AHCI: One brand 1T HDD can't pwr up properlyRichard Zhu
More time is required by one brand 1T HDD, change the delay mechanism to fix it. Signed-off-by: Richard Zhu <r65037@freescale.com>
2012-01-09ENGR00163497-2 MX6Q: Add io_init for mipi sensor and camera sensorEven Xu
1. Add io_init function for mipi sensor and camera sensor. 2. Remove "mipi_sensor" cmd line Signed-off-by: Even Xu <b21019@freescale.com>
2012-01-09ENGR00162676 Fix for DVFS on MX6 Sabre-liteMahesh Mahadevan
Fix ensures the regulator API works correctly when adjusting core voltages during DVFS on MX6 Sabre-lite Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
2012-01-09ENGR00163247-1 MX6Q: MIPI sensor add prp viewfinder and prp enc supportEven Xu
1. Add mipi_en information to mipi csi2 driver info 2. Add mipi related value to ipu channel parameter Signed-off-by: Even Xu <b21019@freescale.com>
2012-01-09ENGR00163128 [MX6q_ARM2]SATA Boot: reboot failed if boot from SATARichard Zhu
The root cause is that the sata power is not enabled after reboot the system when boot from sata. Built in the sata driver would fix this issue. In this way, the sata power would be enabled defautly when there is a sata device is plugged into the slot, otherwise, the power would be disabled. NOTE: Pls don't plug the sata disk after the system is booted up. System wouldn't recognized it, since there are no any power and clocks on the sata slot. Signed-off-by: Richard Zhu <r65037@freescale.com>
2012-01-09ENGR00163040 - FEC : Fix ethernet cannot work after system sleep.Fugang Duan
- Descript: Ethernet can't work in uboot and kernel DHCP throught press 'reset' key when send sleep command 'echo mem > /sys/power/state' - Cause: FEC driver will power down phy when system sleep. If just reset the board, FEC driver cannot run resume function. So, need power on phy in uboot and linux driver. Signed-off-by: Fugang Duan <B38611@freescale.com>
2012-01-09ENGR00163057 ARM: imx6q: add gpu suspend/resume supportRichard Zhao
GPU power down/up follow a restrict process. Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
2012-01-09ENGR00161617_1 [MX6] : Get FEC MAC addr from the shadow reg.Fugang Duan
- Correct FEC to get the default MAC address from OCOTP shadow reg. Signed-off-by: Fugang Duan <B38611@freescale.com>
2012-01-09ENGR00162885 mx6q: sabrelite: add flexcan supportDong Aisheng
Add flexcan support. Signed-off-by: Dong Aisheng <b29396@freescale.com>
2012-01-09ENGR00162867 [MX6]Fix pm bug of error codingAnson Huang
Before suspend, we need to check whether there is wakeup source's irq pending via GPC_ISR1~4, previous coding checked for set of irq status of GPC_ISR1, should be GPC_ISR1~4. Signed-off-by: Anson Huang <b20788@freescale.com>
2012-01-09ENGR00162709 Add Support for MX6Q Sabre AutoEric Sun
Add file board-mx6q_sabreauto.c. The only real difference from board-mx6q_arm2.c is SD pin configuration is changed. Signed-off-by: Eric Sun <jian.sun@freescale.com>
2012-01-09ENGR00162792-2 [IMX6Q] mmc host pm caps should be board relatedRyan QIAN
- add board data for mmc host keep power at suspend Signed-off-by: Ryan QIAN <b32804@freescale.com>
2012-01-09ENGR00162478 MX6 Sabre-lite, add ASRC supportMahesh Mahadevan
Add support for ASRC driver in MX6 sabre-lite Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
2012-01-09ENGR00162732 [MX6q] Correct gpu2d clock settingLarry Li
In MX6 gpu2d core clock setting, gpu3d core clock field is misued to set 2d core clock rate. Correct it to use the right clock field Signed-off-by: Larry Li <b20787@freescale.com>
2012-01-09ENGR00161951-2 [mx6q]performance monitor deviceTony Lin
add performance monitor device to mx6q arm2 board. add perfmon clocks to clock tree. add perfmon to default config as a module Signed-off-by: Tony Lin <tony.lin@freescale.com>
2012-01-09ENGR00162646 [DVFS]Fix build warningAnson Huang
Fix dvfs_core build warning: arch/arm/plat-mxc/dvfs_core.c:824: warning: 'downthreshold_show' defined but not used arch/arm/plat-mxc/dvfs_core.c:830: warning: 'downthreshold_store' defined but not used arch/arm/plat-mxc/dvfs_core.c:842: warning: 'downcount_show' defined but not used arch/arm/plat-mxc/dvfs_core.c:848: warning: 'downcount_store' defined but not used Signed-off-by: Anson Huang <b20788@freescale.com>
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