Age | Commit message (Collapse) | Author |
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Rebase-Id: Rc1fbe4548e4482dab61877b36a6a7921a8602b57
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Rebase-Id: R1dbf37d34132ebe69f0c250a9457a7c5096e3d31
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Bug 790662
Original-Change-Id: I0c194455d4fb6e3326b60a14a5e459fe0e181c56
Reviewed-on: http://git-master/r/19158
Tested-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Change-Id: Ia91788b8ada6bcc411c3ee8c2ebf1ee717ca0199
Rebase-Id: R77131d678c4589b4731c0bc1fafd02174e69e561
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Temporarily disable the ability of the OS to reset the target.
Original-Change-Id: I12b3b7b1d66061bb17dcd9fabd4fd79395c37880
Reviewed-on: http://git-master/r/17464
Tested-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Change-Id: I36b7471965378a342d50369700ab5d439f80cf9d
Rebase-Id: Re38709f60b8082cd05b77a13c8c9012d8a6772b0
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Do not allow the framework to attempt to reset an FPGA target platform.
It won't work and it will destroy the ability to debug the cause.
Bug 776857
Original-Change-Id: I27c410c42a10e8a952c7c4c978020a3675937a89
Reviewed-on: http://git-master/r/15318
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Jin Qian <jqian@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Change-Id: If61c786841ae5ff62c5997f0f51eb909890ac6b2
Rebase-Id: R72b785f9535c276e2d8993874b194ad1e622f322
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An attempt to access the DCC console from secondary processors will
result in those processors hanging because the JTAG debugger can only
communicate with one core at a time. Allow DCC output only from CPU 0.
Useful for bringup, not necessarily for upstream
Original-Change-Id: I9118555438f5b72b16a2dfccd5b6f98860505d6d
Reviewed-on: http://git-master/r/13876
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>
Change-Id: I36bb0351e0899f4ad8732fe784623f7eea57dff5
Rebase-Id: R32383c2b0268f8111444b7b75c4fa3d2b3ddbaef
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Update 2 of 3: MPU 3050 Board file. Depends on MPU kernel
and defconfig files.
BUG 808052
Original-Change-Id: Ib6fc78e00c2b747155b480123cb1cdfb029dc4ae
Reviewed-on: http://git-master/r/29725
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Rebase-Id: R1750e2cd527b4610fed17f5c4930695527c1806b
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- Add support for camera-B.
- Have separate power on/off handler for each camera sensor.
- Remove invidual query for boardId, and bookkeeping boardId information
in a static variable during cardhu_sensors_init.
bug: 787214
bug: 786928
Original-Change-Id: Icc15a4cd6f113dd54adf197498f3b214595a53fd
Reviewed-on: http://git-master/r/27023
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Original-Change-Id: Ie5c06897a4f5c446aeeda168769e80d1a717e479
Rebase-Id: R776d0b86f61ff9c1daa5f2a0388680ca90871107
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Registering the mpu sensor MPU3050 for the E1291 based
cardhu system only.
Original-Change-Id: I614d5496bad34e465d58163e9590d41fefab822e
Reviewed-on: http://git-master/r/27608
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com>
Reviewed-by: Robert R Collins <rcollins@nvidia.com>
Original-Change-Id: I32bb6997dd504c4c070ba27a5e223f4a325d1f96
Rebase-Id: Rb30429965bb8edf799905a39ca843def5b4cf724
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Update Invensense Motion Library (MPL) to production version
v3.3.3. Previous version was engineering release and is not
suitable for mass production. This version of the MPL most
notably fixes problems with suspend/resume where touch screen
would quit working during a suspend/resume cycle.
Original-Change-Id: Id061bccf39adb34dda124f7ba18d5956885328dd
Reviewed-on: http://git-master/r/23590
Reviewed-by: Robert R Collins <rcollins@nvidia.com>
Tested-by: Robert R Collins <rcollins@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Original-Change-Id: Ibef0777548486e7ee2504d979e05bdd8fab3a7d8
Rebase-Id: R726205045a29cba87a941b8af5c8356c0543a6ff
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Original-Change-Id: I5e96ea2280326cb91aa4f32c56b88aece9c7aac2
Reviewed-on: http://git-master/r/22991
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rf0e1503e3e9c4dcfac7295844f476593968e7737
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Update tegra board file to include Invensense MPU3050 drivers
Depends on Change-Id: Iceb3ef8b11d4ce18fd3cb0947268744775b81758
BUG 784570
Original-Change-Id: Ieb75676128fbde4797f8fe6298e57f29b5a2db13
Reviewed-on: http://git-master/r/17527
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rd9be2d7c372d6e2bef6b72a686a8864c304a7d5a
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Original-Change-Id: I17ec64c268bb803966810d3a181140c2b6774245
Reviewed-on: http://git-master/r/11813
Tested-by: Robert R Collins <rcollins@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R27d30b4e1558b0e7c51709fd2f4577accdca344e
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Rebase-Id: Ra87c1d4245a0ce31e3fe7529f06ca18fbe703706
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Change-Id: Iefa77c7f9f8dcf9f21ea62ac4ccaf8a7954bfa99
Reviewed-on: http://git-master/r/34230
Reviewed-by: Maria Gutowski <mgutowski@nvidia.com>
Tested-by: Maria Gutowski <mgutowski@nvidia.com>
Rebase-Id: Rbbedcebfaef4d21593024e25b3d17647214dda10
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The build currently fails for some boards when CONFIG_CPU_FREQ=n, since
we don't build cpu-tegra.c but tegra_throttling_enable is still
referenced. To fix this:
- Add cpu-tegra.h
- Define tegra_throttling_enable to NULL in the header if either
CONFIG_CPU_FREQ or CONFIG_TEGRA_THERMAL_THROTTLE are not set
- Use the header file instead of declaring the function extern
everywhere it's used
Bug 829501
Change-Id: Ice84309546dee201f991a1194fefd80583afc455
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/32208
Reviewed-by: Allen R Martin <amartin@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Rebase-Id: Rb5c3398cf5682d6b5573f91b2faccca931059b45
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Per the 8.4.1 section of HDMI spec version 1.4a, 100KHz is the maximum
clock rate of DDC i2c bus.
Bug 820552
Change-Id: I7990309c4f3485c9c356623468cfabe25d733604
Signed-off-by: Haley Teng <hteng@nvidia.com>
Reviewed-on: http://git-master/r/29966
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Alok Chauhan <alokc@nvidia.com>
Rebase-Id: Rbdb18e5942ce5a9ae3edcdfe7e1aeee4ae94e925
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Change-Id: Ic78a86dd1e7a465f0de1f3fb9a5c72e2eb3e8ab0
Rebase-Id: Rf493e8ce71a8cd12f0e1bd406ca9c20b6ce12514
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Conflicts:
arch/arm/configs/tegra_defconfig
arch/arm/mach-tegra/Kconfig
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/board-ventana-power.c
arch/arm/mach-tegra/board-ventana-sensors.c
arch/arm/mach-tegra/board-ventana.c
arch/arm/mach-tegra/clock.c
arch/arm/mach-tegra/common.c
arch/arm/mach-tegra/cpu-tegra.c
arch/arm/mach-tegra/fuse.c
arch/arm/mach-tegra/headsmp.S
arch/arm/mach-tegra/tegra2_dvfs.c
arch/arm/tools/mach-types
drivers/rtc/rtc-tegra.c
drivers/usb/gadget/fsl_udc_core.c
drivers/video/tegra/host/dev.c
drivers/video/tegra/host/nvhost_channel.c
drivers/video/tegra/host/nvhost_intr.c
Original-Change-Id: I1e9b6d0e761cf1e95cf90b78b5932b53fcb9bb5e
(cherry picked from commit 2f331e046f7c4cfc6ab54fca3193035b3bf3a14f)
Reviewed-on: http://git-master/r/14572
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>
Change-Id: I29db8796b2e27a8d218c332de36f880a7cf4bcb2
Rebase-Id: R3ddecd31d02becef183c6113ee1c3bd9c7741791
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program pwren signal of max8907c regulator to power down/up core rail on
deep sleep enter/exit deep sleep mode.
core_timer and core_off_timer changed as per K32.
separate_req set to false as whistler pmu has combined power requests.
Bug 817378
Change-Id: Ia95a61360079f919a039572cf8fd4597db9efd50
Reviewed-on: http://git-master/r/28435
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R690a39529c184fea5be02af9223f7479874fd3e4
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- configured the pinmuxes needed by the baseband.
- added board specific baseband related code.
- added caif specific platform data needed by protocol layer.
bug 785523
Change-Id: I2d1936419ccd9190d6539836cb8bca563ea07c6e
Reviewed-on: http://git-master/r/23432
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R88b62bdca3f984c66510158d1bc6878fdd014619
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Add registration and initialization of soc380 camera
Bug: 783488
Change-Id: I9ad9d25cfa51a45b2fe889cdac5b90650eafdd03
Reviewed-on: http://git-master/r/24973
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rbc401adf9f12bd877731762ca05dd4886fafe37b
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Bug 783488
Change-Id: I609ed3c7d87633af53244357bc630fc7de00073c
Reviewed-on: http://git-master/r/26973
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rf5bdb5d2a7ddb1d0c198456bb264012a65dc806a
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- Set vddio_vi voltage to 1.8v
- Enable vddio_mipi regulator
- Adjust camera power on sequence
- Update copyright info
Bug 783488
Change-Id: If5d61879a33131d4b5f99cf232d0b246f0524e2e
Reviewed-on: http://git-master/r/26618
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
Tested-by: Daniel Willemsen <dwillemsen@nvidia.com>
Tested-by: Frank Chen <frankc@nvidia.com>
Rebase-Id: R6176d3e776bcedda6dd2e9d4e7aec60170cb5dc8
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Add and force debug uart port type to PORT_TEGRA.
Bug 803910
Change-Id: I55c675a4f724bb13005bf37b495df670e208b094
Reviewed-on: http://git-master/r/24468
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Re96b204e4ce254f2aebb9ba53c86ddff1576e8da
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To turn off usb3 and usb3.emc clock, tegra-ehci.2 should be powered off
when bus is supended. Enable power_down_on_bus_suspend for usb3 (tegra-ehci.2).
Also added the platform data structure which is used when USB suspends.
Bug 807237
Change-Id: I9e975daeb2283bd811b2e32acda78b6fa0d9f2b4
Reviewed-on: http://git-master/r/24089
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Ref4b904e6b50bc3a83d1500b912c8d8129bac76d
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Use debug_uartport kernel option to configure debug uart port as
high speed(ttyHS1) or low speed(ttyS0) according to odmdata(19:18).
Bug 803465
Change-Id: Ide9a74c358a42f25ddb3ca03f4d949dc053f59f4
Reviewed-on: http://git-master/r/24019
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R7b0d57256c34a0f9e8643b8e777b4eeb3f94cd88
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Fix baseband modem reset function on whistler.
Bug 776276
Original-Change-Id: I13b6dae5ac9635ac63652b34ab8bf01289d4d35e
Reviewed-on: http://git-master/r/21920
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R2347ccd2261b12ac53f0f4773c24fd739fff5e73
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elpida memory on E1108 A03 board has different product id.
Added an entry for it in tegra emc chips table.
Bug 786376
Original-Change-Id: I7947174ce12d631ad50b7e5ffe43aabcc7f268cb
Reviewed-on: http://git-master/r/23139
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R2e51939f8c9c4d29d0ebc2b1146b26736c675b85
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BUG 780067
Map row 2, column 1 to KEY_MENU
Original-Change-Id: I120ea7714111e129c3ec330c70592cc292dbba7a
Reviewed-on: http://git-master/r/21737
Reviewed-by: Wen Yi <wyi@nvidia.com>
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Re62e357067a84bd6c974ca0c33365cbb78bfac1c
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Frequency tables added for memory.
Enabled memory tables used for EMC scaling.
Bug 786376
Original-Change-Id: I8f9713dac7950db4a42dac4f32d8908434c18be1
Reviewed-on: http://git-master/r/22578
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R74db053a9fd2a79023117e9f26c2dc2543c814ea
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for whistler, implement pm_power_off with max8907c's power off routine.
Bug 799957
Bug 800602 (Cold boot)
Original-Change-Id: I003547d55a4203f2d04ba0086199b61d05936563
Reviewed-on: http://git-master/r/22388
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R60e9aaa33fb680ff91d1836d885cb421b05fdde9
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* Move include/linux/tegra_usb.h to
include/linux/platform_data/tegra_usb.h
Original-Change-Id: I5b7799c5af8029b15ad206978718b337afac8814
Reviewed-on: http://git-master/r/22165
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
Tested-by: Daniel Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Rebase-Id: Rb43ded0f5544dfa7875e1b99edfa67e63caaaaba
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Platform data added in ADT7461 Thermal Sensor driver
registration for Thermal Throttling.
Bug 786378
Original-Change-Id: I3bdbe1bb6b32d2221f4a0236f467e11f9b724329
Reviewed-on: http://git-master/r/20376
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Ra421fffd0e080d5c0b1d4a97cdd783de387542ae
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bug 773671
Original-Change-Id: I4e2898b17e47b186cd7ffa64d79d38f69bcce269
Reviewed-on: http://git-master/r/19601
Tested-by: Joseph Lehrer <jlehrer@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R605e62fef6564bae2955d54714a914d25f01ca94
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Board files are updated with USB phy inteface info related to USB2
instance
BUG: 756184
Original-Change-Id: Ied946e47047b5ab69d4f0e1670ccb7269d50665f
Reviewed-on: http://git-master/r/18627
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Re794a80a4f74855b0f937292d76120c6ed1d637a
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Add irq to max8907c mfd driver to be used with RTC and battery charger
Original-Change-Id: I55afc2269dbc2fc872f4aa2f79751896d1c77705
Reviewed-on: http://git-master/r/16616
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R1bb02c49817f294215c66b324f755f90dcc13f66
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Registering ADT7461 thermal sensor on i2c bus 4.
Bug 782954
Original-Change-Id: Idd4426df2cdd1d12cc33fffb4dd72f52254a2cf7
Reviewed-on: http://git-master/r/18019
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R963865ddcbc4a1772df37a8f1bfa6cf16269bb4d
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Correcting the GPIO names for sensor power.
Enabling regulator when sensor is opened and disabling it when
sensor is closed.
Bug 783488
Original-Change-Id: I62c5dd8bfc7a1a63e1ff42450af3699a3ecd66f8
Reviewed-on: http://git-master/r/17472
Tested-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R48382f3e8adbabbf96314f0caf6b64f70bec9ec1
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Mux i2c bus i2c2 into dcc bus and gen2 bus
Bug 786162
Original-Change-Id: Id163459afa8d9f27564a051f6bf239c13d3cd8b6
Reviewed-on: http://git-master/r/17806
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R269679ca60b740aba650fcdb06adec043d81baad
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LDO5 regulator has consumers VCORE_MMC, AVDD_LCD1 and
VDDIO_1WIRE.
SDHCI gets this regulator by name "vmmc" and disables in
suspend and enables on resume.
Though it happens equal number of times after resume UI is not seen.
Till proper fix is identified removing the consumer supply entry
for LDO5 after which device resumes with UI properly.
Bug 780047
Original-Change-Id: Ia95906861ad5fa030546f5d723615c74932c97be
Reviewed-on: http://git-master/r/17197
Tested-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R94592367db8c19f2158f0eba3b9390acb23d077b
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Add baseband modem init/reset functions for whistler.
Bug 776276
Original-Change-Id: I014e8e24831079428c008d166ffa4b156cc66572
Reviewed-on: http://git-master/r/15602
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R5d0b886b465e018d73b1fcc03d6b3c355a844f7b
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Registering ISL29018 als and proximity sensor on GEN1 I2C.
Bug 782958
Original-Change-Id: I3848926b3f46d3f13a7fdcc02535f39e80498dea
Reviewed-on: http://git-master/r/17203
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R9ed1dbdc8b30bb72258e1fb900b497c0c0cb8900
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Bug 779990
Original-Change-Id: I229d05da084ac15439e7b458f231f6f983776d4a
Reviewed-on: http://git-master/r/16404
Tested-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R605d925c23196b3c5a9b1575d7173126b569ff5d
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Bug 780047
Original-Change-Id: Ideec82c535d9fbad869cce89375828342da91dbb
Reviewed-on: http://git-master/r/16058
Tested-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Re614c8b44c1062d3444ecabea1c9163ef0473ede
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