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* dts/next: (1619 commits)
LF-5015-3 arm64: dts: imx8ulp-evk: Add RK055HDMIPI4MV2 MIPI DSI display panel support
arm64: dts: ls1088a-qds: disable NOR flash as a workaround for boot issue
powerpc/fsl: update ifc node name to be memory-controller
arm64: dts: freescale: update ifc node name to be memory-controller
ARM: dts: update ifc node name to be memory-controller
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* config/next: (315 commits)
LF-5015-4 arm64: defconfig: Build in Rocktech Himax8394f MIPI DSI panel drm driver
powerpc/configs/sdk_dpaa: update targets to corenet_base.config for v5.5
powerpc/configs/sdk_dpaa: enable the Cortina PHY driver
powerpc/configs/sdk_dpaa: add defconfigs
arm64: config: enable DPAA2_SWITCH by default
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* clock/next: (165 commits)
LF-632 clk: s32v234: Fix "enetpll_dfs3" position in sdhc_sels
clk: s32v234: Enable FlexCAN clock
clk: s32v234: Add definitions for CAN clocks
clk: s32v234: Initial enet clk support
clk: s32v234: Add dfs clk
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* origin/dts/s32: (14 commits)
LF-1400 s32v234sbc: Fix fec phy-mode
LF-631-6 arm64: dts: s32v234: Add eDMA features for LINFlexD nodes
LF-631-3 arm64: dts: s32v234: Add eDMA node for all boards
arm64: dts: s32v234: Add FlexCAN nodes for EVB and SBC
arm64: dts: s32v234-evb: Use macros for MSCR and config pairs
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* origin/dts/qoriq: (135 commits)
arm64: dts: ls1088a-qds: disable NOR flash as a workaround for boot issue
powerpc/fsl: update ifc node name to be memory-controller
arm64: dts: freescale: update ifc node name to be memory-controller
ARM: dts: update ifc node name to be memory-controller
powerpc/mpc85xx: remove "simple-bus" compatible from ifc node
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* origin/dts/imx8: (498 commits)
LF-3444 arm64: dts: imx8x-mek.dtsi: Drop the m4_reserved node
LF-4748-2 arm64: dts: imx8qm-mek-cockpit-a72: fix wm8960 audio
arm64: dts: imx8qm-mek-cockpit-a72: fix edma names
arm64: dts: imx8qm-mek-cockpit: fix edma configuration
arm64: dts: imx8qm-mek-cockpit: apply changes for upstream Cadence USB3 driver
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* origin/dts/imx8ulp: (112 commits)
LF-5015-3 arm64: dts: imx8ulp-evk: Add RK055HDMIPI4MV2 MIPI DSI display panel support
LF-4822-2 arm64: dts: imx8ulp: Assign pinctrl state for sai5 on 8ulp for SOF
LF-4776 dtb: updated dev sentnl-mu with dma-ranges
MLK-25252: dts: imx8ulp add mu_id & max_num_users
Revert "MLK25252: dts: imx8ulp add id-no & max_num_users to s4muap."
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* origin/dts/imx8m: (552 commits)
LF-4887-16 arm64: dts: imx8mm-ddr4-evk-revb: Add RAYDIUM RM67199 command RAM display operation mode support
LF-4887-15 arm64: dts: imx8mm-ddr4-evk-revb: Add RAYDIUM RM67191 command RAM display operation mode support
LF-4887-14 arm64: dts: imx8mm-ddr4-evk: Add RAYDIUM RM67199 command RAM display operation mode support
LF-4887-13 arm64: dts: imx8mm-ddr4-evk: Add RAYDIUM RM67191 command RAM display operation mode support
LF-4887-12 arm64: dts: imx8mn-ddr4-evk: Add RAYDIUM RM67199 command RAM display operation mode support
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* origin/config/powerpc:
powerpc/configs/sdk_dpaa: update targets to corenet_base.config for v5.5
powerpc/configs/sdk_dpaa: enable the Cortina PHY driver
powerpc/configs/sdk_dpaa: add defconfigs
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* origin/config/arm64: (207 commits)
LF-5015-4 arm64: defconfig: Build in Rocktech Himax8394f MIPI DSI panel drm driver
arm64: config: enable DPAA2_SWITCH by default
LF-4742-1 arm64: imx.config: enable xxhash and blake2 crypto algorithms
arm64: imx.config: remove deprecated RIPE-MD crypto algorithms
LF-4748-1 arm64: defconfig: keep wm8960 as a module
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* origin/arch/qoriq:
drivers/soc/fsl: add EPU FSM configuration for deep sleep
fsl_pmc: update device bindings
powerpc/pm: Fix suspend=n in menuconfig for e500mc platforms.
powerpc/pm: add sleep and deep sleep on QorIQ SoCs
soc: fsl: add qixis driver
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* origin/arch/imx: (92 commits)
LF-4521-02 soc: imx: Fix section mismatch build warning due to __init
LF-3647 arm: imx: fix coverity scan error
MLK-25018 soc: imx: Correct the default noc setting on imx8mq
arm: imx: deal with upstream API change of of_get_mac_address()
MA-17422-4 arm64: Allow IMX8M_PM_DOMAINS to be loadable as module
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driver
This patch builds in Rocktech Himax8394f MIPI DSI panel drm driver.
Cc: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
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panel support
This patch adds RK055HDMIPI4MV2 MIPI DSI display panel support for
the i.MX8ulp EVK platform. The TFT driver IC of the panel is HX8394-F.
Cc: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
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Disable the node to workaround the following issue that blocks platform
boot:
SError Interrupt on CPU2, code 0xbf000000 -- SError
fsl-ifc 2240000.memory-controller: transaction sent to IFC is not mapped to any memory bank 0x80000000
Signed-off-by: Li Yang <leoyang.li@nxp.com>
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Signed-off-by: Li Yang <leoyang.li@nxp.com>
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Signed-off-by: Li Yang <leoyang.li@nxp.com>
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Signed-off-by: Li Yang <leoyang.li@nxp.com>
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The binding of ifc device has been updated. Update dts to match
accordingly.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
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The binding of ifc device has been updated. Update dts to match
accordingly.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
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The binding of ifc device has been updated. Update dts to match
accordingly.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
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* dts/qoriq-lx216x: (14 commits)
arm64: dts: freescale: Add CAN nodes for LX2162A-QDS
arm64: dts: lx2160a: add chip information and dma-coherent in dwc3 nodes
arm64: dts: lx2160a: Fix DWC3 IP VBUS glitch issue
arm64: dts: lx2162a-qds: add interrupt line for RTC node
arm64: dts: lx2162aqds: support SD UHS-I and eMMC HS400 modes
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* dts/qoriq-ls208x: (12 commits)
arm64: dts: ls208x: modify clocks divider to 32 for wdt
arm64: dts: ls208x: add chip-specific compatible string to usb nodes
arm64: dts: ls208x: Fix DWC3 IP VBUS glitch issue
arm64: dts: ls208xa: update PCIe nodes to use more specific aer interrupt
arm64: dts: ls208xa: add gpio based bus recovery
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* dts/qoriq-ls1088a: (7 commits)
arm64: dts: ls1088a-rdb: Update qspi spi-rx-bus-width to 1
arm64: dts: ls1088a: add chip-specific compatible string and dma-coherent to usb nodes
arm64: dts: ls1088a: Fix DWC3 IP VBUS glitch issue
arm64: dts: ls1088a: add gpio based bus recovery
arm64: dts: ls1088a: Add the PME interrupt for PCIe EP node
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* dts/qoriq-ls104x: (24 commits)
arm64: dts: ls1046a-rdb: Update qspi spi-rx-bus-width to 1
arm64: dts: ls1046a: add gpios based i2c recovery
arm64: dts: ls1043a: Add gpios based i2c recovery
arm64: dts: ls104x: add chip-specific compatible string to usb for dma-coherent
arm64: dts: ls104x: Fix DWC3 IP VBUS glitch issue
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* dts/qoriq-ls1028a: (14 commits)
arm64: dts: ls1028a: apply dma-coherent for dwc3 nodes
arm64: dts: ls1028a: enable DP node for RDB/QDS boards
arm64: dts: ls1028a: Add HD Display controller node
arm64: dts: ls1028a: add gpu node
arm64: dts: ls1028a-qds: add overlays for various serdes protocols
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* dts/qoriq-ls1021a: (19 commits)
ARM: dts: ls1021a: Fix DWC3 IP VBUS glitch issue
ARM: dts: ls1021a: changes for SDK only features
ARM: dts: ls1021a-tsn: use generic "jedec,spi-nor" compatible for flash
ARM: dts: ls1021a: move thermal-zones node out of soc/
ARM: dts: ls1021a-tsn: remove undocumented property "position" from mma8452 node
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* dts/qoriq-ls1012a: (15 commits)
arm64: dts: ls1012a: use fixed index mmcN for non-upstream boards
arm64: dts: ls1012a: add chip-specific compatible string and dma-coherent to usb nodes
arm64: dts: ls1012a: Fix DWC3 IP VBUS glitch issue
arm64: dts: ls1012a-rdb: workaround by updating qspi flash to single mode
arm64: dts: ls1012a-rdb: set RGMII interfaces to RGMII_ID mode
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* dts/qoriq-sdk: (18 commits)
sdk: arm64: dts: ls104x: update ftm0 handle in sdk dts files
sdk: dts: add LS1046A VSP shared examples
sdk: dts: align LS1046A usdpaa-shared file with usdpaa file
sdk: arm64: dts: reduce usdpaa memory to 4K for LS1046/43
sdk: arm64: dts: ls1046a: add single PCD queue for each shared mac device
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Enable CAN support for LX2162A-QDS in board dts.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
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To allow USB dwc3 driver to conduct some chip-scpeific snooping configuring.
[ Leo: binding not upstreamed ]
Since dwc3 cache type has been set to cacheable, apply dma-coherent to
all dwc3 nodes accordingly.
[ Leo: kernel driver changes dropped in upstream, however u-boot are
setting cache types now. Going forward should rely on u-boot to set the
dma-coherent. ]
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
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Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[ Leo: driver change and binding not upstreamed ]
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Add interrupt line for RTC node on lx2162a-qds
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
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The default NXP SDHC adapter cards for LX2162AQDS are SD 2.0/3.0
adapter card for eSDHC1, and eMMC 5.1 adapter card for eSDHC2.
Add speed modes properties supported by the two adapters in device
tree node.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
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Enable USB3 HW LPM feature for lx2160a.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
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The LX2160A PCIe EP mode nodes based on controller used on lx2160a rev2.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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The original dts was created based on the non-production rev1 silicon
which was only used for evaluation. Update the PCIe nodes to align with
the different controller used in production rev2 silicon.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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The two external MDIO buses used to communicate with phy devices that
are external to SOC are muxed in LX2160AQDS board. These buses can be
routed to any one of the eight IO slots on LX2160AQDS board depending on
value in fpga register 0x54. Additionally the external MDIO1 is used to
communicate to the onboard RGMII phy devices. The mdio1 is controlled
by bits 4-7 of fpga register and mdio2 is controlled by bits 4-7 of fpga
register.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
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Disabled by default in SoC dtsi and enables in board dts files.
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
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Now pinctrl state will be reset to initial state when suspend, added
sleep state make SOF resume properly from suspend.
Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
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On LS2088A, wdt's clock are get from clockgen divided by 32,
so modify clocks in device tree.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
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To allow USB dwc3 driver to conduct some chip-scpeific configuring.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
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Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
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After we define the more specific aer interrupt name, update the dts
accordingly to provide more accurate information.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
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It need both new compatible string and scl-gpios to work.
[ Leo: Not upstreamable as it depends on patch "i2c: imx: implement bus recovery with gpio for Layerscape" ]
Signed-off-by: Li Yang <leoyang.li@nxp.com>
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Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
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NXP Erratum A008585 affects A57 core cluster used in LS2085rev1.
However this problem has been fixed in A72 core cluster used in LS2088.
Therefore remove the erratum from LS2088A. Keeping it only in LS2085.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Sandeep Malik <sandeep.malik@nxp.com>
Acked-by: Priyanka Jain <priyanka.jain@nxp.com>
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Specify a channel zero in idle state to
avoid enterring tri-stated state for PCA9547.
About E-00013:
- Description: I2C1 and I2C3 buses
are missing pull-up.
- Impact: When the PCA954x device is tri-stated, the I2C bus
will float. This makes the I2C bus and its associated
downstream devices inaccessible.
- Hardware fix: Populate resistors R189 and R190 for I2C1
and resistors R228 and R229 for I2C3.
- Software fix: Remove the tri-state option from the PCA954x
driver(PCA954x always on enable status, specify a
channel zero in dts to fix the errata E-00013).
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
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Add mmio mdio mux nodes from the on-board FPGA.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
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Define PHY nodes on the board.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
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