summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)Author
2013-07-02Fix for 51540: clock() function returns too large values3.0-vybrid-ts2.5Makarand Kulkarni
The issue was caused due to sched_clock() inplementation in pit.c which reported values which were incosistent with what it should
2013-05-10Don't reassign pads PTB6 and PTB7. They are used for uart-2 which is the ↵3.0-vybrid-ts2.4Ed Nash
default console (i.e. printf) for MQX as of the beta-3 release.
2013-05-06Update hw_breakpoint implementation in order to support CONFIG_PERF_EVENTSAnthony Felice
2013-04-26Fix SDHC card timeout error.3.0-vybrid-ts2.3Anthony Felice
2013-04-23limit Linux use of SRAM so as not to conflict with MQX. Similarly, leave M4 ↵3.0-vybrid-ts33.0-vybrid-ts2.1Ed Nash
routing interrupt routing bits unchanged
2013-03-10fix scheduler not seeing time pass, would not interrupt cpu bound processRoshni Shah
Signed-off-by: Ed Nash <ed@kidlearn.com>
2013-02-17add semaphore protection with MQX of I2C busEd Nash
2012-12-12Default configuration update for CAAM driverJason Jin
manually integrate from the CAAM part by Jason Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-12-12Vybrid CAAM driverJason Jin
From Singh Pradip-B09147. Integrate by Jason Jin Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-12-12mvf: update default kernel config for FaradayAlison Wang
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-12-12ENGR00181365-1: ADC: Add platform support for ADC driverWang Xiaojun
Add platform support for ADC driver. Signed-off-by: Wang Xiaojun <b41435@freescale.com>
2012-12-12ENGR00216081-1:Add USB host and gadget PM supportJingchang Lu
Handle usb suspend/resume, currently the BSP doesn't support usb plug/unplug wakeup. Signed-off-by: Jingchang Lu <b35083@freescale.com>
2012-12-12ENGR00216087-2:Add Vybrid ASRC platform deviceJingchang Lu
Signed-off-by: Jingchang Lu <b35083@freescale.com>
2012-12-12ENGR00216076-2: DCU: Update DCU driver for PM and blending issueAlison Wang
Fix layers blending and reinitialization issue for DCU driver. Update power management part for DCU driver. Signed-off-by: Alison Wang <b18965@freescale.com>
2012-12-12ENGR00216076-1: PM: Add Power Management driver for VybridAlison Wang
System could run into STOP and LPRun modes. When system was working in STOP mode, pressing SW1 button or inserting or removing SD card could wake up it. Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-17ENGR00216078-1: switch: add platform support for L2 switchJason Jin
Add platform support for Vybrid L2 switch driver. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-10-17ENGR00181358-3: fec: add second FEC support for VybridAlison Wang
Add second FEC support for Vybrid. Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-17ENGR00212250-1: watchdog: Add platform support for watchdog driverAlison Wang
Add platform support for watchdog driver. Signed-off-by: Wang Xiaojun <b41435@freescale.com>
2012-10-17ENGR00181395-1: Add UART MISC functions support for FaradayJingchang Lu
Add hardware flow control support, Add transmit DMA support, Add FIFO operation support, Add MSB/LSB on data support, Add 9-bits MARK/SPACE support. Signed-off-by: Jingchang Lu <b35083@freescale.com>
2012-10-17ENGR00181390-1: qspi: Add platform support for Quad SPI driverAlison Wang
Add platform support for Quad SPI driver. Signed-off-by: Alison Wang <b18965@freescale.com> Xiaochun Li <b41219@freescale.com>
2012-10-17ENGR00181407-1: ts: add platform support for touch screen driverAlison Wang
Add platform support for touch screen driver. Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-17ENGR00180953-1: dspi: update platform support for dspi driverAlison Wang
Update platform support for dspi driver after debugging on board. Signed-off-by: Jason Jin <jason.jin@freescale.com> Alison Wang <b18965@freescale.com>
2012-10-17ENGR00180956-3: Add PWM LED device support on MVF600Jingchang Lu
Four LEDS are connected to FTM0 ch0~3 on TWR-MVF600 board, the PWM signal can use control these LEDS on/off or demo. Signed-off-by: Jingchang Lu <b35083@freescale.com>
2012-10-17ENGR00180956-2: Add FlexTimer PWM support on FaradayAlison Wang
The FlexTimer work on PWM mode with EPWM and CPWM supported. The API configures each FTM channels the same due to pwm subsystem interface restriction. Signed-off-by: Jingchang Lu <b35083@freescale.com>
2012-10-17ENGR00180956-1: Add FlexTimer PWM device clock for FaradayJingchang Lu
Signed-off-by: Jingchang Lu <b35083@freescale.com>
2012-09-12ENGR00212262-3: Faraday:Enable the ADMA2 function for SDHCJason Jin
This patch enable the ADMA2 function for the SDHC module used on Faraday board. Please note that the ADMA address should be 16 bytes aligned other than 4 byte in the spec. This patch also increased the SDHC module frequency to 200MHz. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00219461:Fix high resolution timer support FaradayJingchang Lu
Signed-off-by: Jingchang Lu <b35083@freescale.com>
2012-09-12ENGR219758:There is CRC error when JFFS2 used as filesystemJason Jin
Enable the softecc in the config to make the NFC use softecc. also include the defconfig update for: ENGR220009:The LCD panel goes blank after a long time Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00219629 Farday:There is call trace for FEC pll clock sometimes.Jason Jin
This patch increase the delay time for the pll clock to lock. otherwise the kernel will panic for the locking failure. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00219616 One Micro-SD card remove will generate a lot of interruptsJason Jin
The PKE and PUE should be declared for the GPIO pull up, otherwise the pin will not be pulled up for the SDHC card detect input. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00180931-4 mvf: add default kernel config for FaradayAlison Wang
Add default kernel config for Faraday. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00181401,ENGR00181396-1: Add USB OTG controller support for MVF platformJingchang Lu
OTG1 acts as gadget and OTG2 acts as host on TWR-MVF600 board. Signed-off-by: Jingchang Lu <b35083@freescale.com>
2012-09-12ENGR00180953-1: dspi: add platform support for dspi driverAlison Wang
Add platform support for dspi driver. Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-12ENGR00212251-1: sai: add platform support for SAI driverAlison Wang
Add platform support for SAI driver. Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-12ENGR00180947-1: dcu: add platform support for dcu driverAlison Wang
Add platform support for dcu driver. Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-12ENGR00181374-1: nfc: add platform support for NFC driverAlison Wang
Add platform support for NFC driver. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00180958: rtc: add platform support for RTC driverAlison Wang
Add platform support for RTC driver. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00181363-1: add platform support for I2C controllerAlison Wang
Add platform support for I2C controller. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00180936-1: edma: add platform support for edma driverAlison Wang
Add platform support for edma driver. Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Xiaochun Li <b41219@freescale.com>
2012-09-12ENGR00212262-1: esdhc: add platform support for esdhc driverAlison Wang
Add platform support for esdhc driver. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00181358-1: fec: add platform support for FEC driverAlison Wang
Add platform support for FEC driver. Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-12ENGR00181393-1: uart: add platform support for UART driverAlison Wang
Add platform support for UART driver. Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Jingchang Lu <b35083@freescale.com>
2012-09-12ENGR00180931-3 mvf: add gpio API for MVF platformAlison Wang
Add gpio API for MVF platform. The MVF GPIO framwork is different with i.mx. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00180931-2 mvf: add IOMUX definiation and initializationAlison Wang
Add IOMUX definiation and initialization. Add the iomux initialization support for Faraday. Define the io pad settings for some function modules. Those pad ctrl settings may need to adjust during the feature tuning process. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00180931-1 mvf: add MSL support for MVF platformAlison Wang
Add MSL support for MVF platform. Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Jingchang Lu <b35083@freescale.com>
2012-09-12ARM: proc: add Cortex-A5 proc infoPawel Moll
This patch adds processor info for ARM Ltd. Cortex A5, which has SCU initialisation procedure identical to A9. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> (cherry picked from commit 15eb169bfec291faf25b158cfa9842b72f7803ad)
2012-09-12ARM: perf: add PMUv2 common event definitionsWill Deacon
The PMUv2 specification reserves a number of event encodings for common events. This patch adds these events to the common event enumeration in preparation for PMUv2 cores, such as Cortex-A15. Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com> (cherry picked from commit 6d4eaf991c654af54a19c0fa48e0ad62cefbc37c)
2012-09-12ARM: proc: convert v7 proc infos into a common macroPawel Moll
As most of the proc info content is common across all v7 processors, this patch converts existing A9 and generic v7 descriptions into a macro (allowing extra flags in future). Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> (cherry picked from commit dc939cd835d0e2d3ff4197d6e2c017d269616d20)
2012-09-12ARM: perf: add support for the Cortex-A5 PMUWill Deacon
This patch adds support for the Cortex-A5 PMU to the ARMv7 perf-event backend. Signed-off-by: Will Deacon <will.deacon@arm.com> (cherry picked from commit 0c205cbe20654616e2f8389c0c1ff707d9dccb63)
2012-03-08ENGR00176160 [MX6]Correct PLL1 freq change flowAnson Huang
Previous PLL1 freq change is done by switching CPU clock to 400M pfd or 24M OSC, then modifying PLL1 div directly, and switch back CPU clock immediately, it will result in CPU clock stop during PLL1 hardware lock period, thus, DRAM FIFO may blocked by the data CPU requested before PLL1 clock changed, and it will block other devices accessing DRAM, such as IPU, VPU etc. It will cause underrun or hang issue. We should wait PLL1 lock, then switch back. Signed-off-by: Anson Huang <b20788@freescale.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-12-27 10:18:50 +0000