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2010-05-24ENGR00123744-3 iMX23 enable unique id supportFrank Li
Add config file Signed-off-by: Frank Li <Frank.Li@freescale.com>
2010-05-24ENGR00123744-2 iMX23 enable unique id supportFrank Li
Add opt uuid support Signed-off-by: Frank Li <Frank.Li@freescale.com>
2010-05-24ENGR00123744-1 iMX23 add unique ID supportFrank Li
copy file from stmp plat Signed-off-by: Frank Li <Frank.Li@freescale.com>
2010-05-21ENGR00122302 MX23 ALSA: Resolve the failure when pausing and resuming playbackLionel Xu
To reslove the problem when resuming a playback from pausing Signed-off-by: Lionel Xu <r63889@freescale.com>
2010-05-21ENGR00123514 MX28: System hangs when set different cpu freq continuouslyNancy Chen
MX28: System hangs when set different cpu freq continuously. Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
2010-05-20ENGR00123438: iMX23 Mount as usb device then go to standby, system haltJeremy.Yao
Fix system timer suspend/resume operation in mx23 pm module Signed-off-by: Jeremy Yao <r65161@freescale.com> (cherry picked from commit 3975fa294e8cd0cf6174ba35d98266b287787783)
2010-05-20ENGR00123454 [MX23] FIX LCD no display issue after switch back from TVoutRobby Cai
Due to the LCDIF clock caculation problem. Signed-off-by: Robby Cai <R63905@freescale.com> (cherry picked from commit a3ac3c774a71678619d34cba412a2ab535d4ab7f)
2010-05-19ENGR00123554 mx233/mx28: Enlarge the ramdisk sizePeter Chen
The WindowsXP can only recognize the ramdisk size above 8MiB. Signed-off-by: Peter Chen <b29397@freescale.com>
2010-05-19ENGR00123491 i.mx53 arc usb host increase tx fifo threshold.Jun Li
There are bad turnaround erros when copying data from SD to Udisk via Host port in i.mx53. Tunning TX fifo fill threshold from 2 to 8. FIFO Burst Threshold:(Read/Write) [Default = 2] This register controls the number of data bursts that are posted to the TX latency FIFO in host mode before the packet begins on to the bus. The minimum value is 2 and this value should be a low as possible to maximize USB performance. A higher value can be used in systems with unpredictable latency and/or insufficient bandwidth where the FIFO may underrun because the data transferred from the latency FIFO to USB occurs before it can be replenished from system memory. This value is ignored if the Stream Disable bit in USBMODE register is set. Signed-off-by: Li Jun <r65092@freescale.com>
2010-05-19ENGR00123441 imx23, fix ethernet can not suspendZhou Jingyu
fix ethernet can not enter suspend state Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
2010-05-17ENGR00123527 fix iMX23 udhcpc fail to get ip addressFrank Li
Miss CONFIG_PACKET at default config Signed-off-by: Frank Li <Frank.Li@freescale.com>
2010-05-17ENGR00122965 Improve USB100 feature due to bootloader change.Frank Li
Smalle change due to the bootloader change and fix Mx23 fail caused by clock module change. Signed-off-by: Frank Li <Frank.Li@freescale.com>
2010-05-13ENGR00123437 iMX28: Add nand support for updater defconfigPeter Chen
1. Add nand support for iMX28 updater defconfig, and fix bug for compiling error for not adding cpu freq config 2. Build-in ext3 and JBD function for support sd ext3 rootfs Signed-off-by: Peter Chen <b29397@freescale.com>
2010-05-12ENGR00122216-3 Build in LDB driver for imx5 platformsLiu Ying
Build in LDB driver for imx5 platforms. Signed-off-by: Liu Ying <b17645@freescale.com>
2010-05-12ENGR00122216-1 MX53 MSL:Change for LDB supportLiu Ying
This patch includes IOMUX, clock change for LDB and adds LDB platform device. Signed-off-by: Liu Ying <b17645@freescale.com>
2010-05-12ENGR00123078-1 MX28: Add L2 Switch resources definitionNiu Xule
L2 Switch resources definition for MX28 Signed-off-by: Niu Xule <b23300@freescale.com>
2010-05-12ENGR00123400 imx53 arm2: set correct IOMUX for dviJason Chen
Set the correct IOMUX for ARM2 board. Signed-off-by: Jason Chen <b02280@freescale.com>
2010-05-12ENGR00122780 ipufb: rework display device setting methodJason Chen
Rework the display command line options to not require new option for every new display. Add mxcdi0fb/mxcdi1fb option <fmt> and to tell system what kind of display device is going to use. Use "di1_primary" to make DI1 the primary display (i.e. fb0). The display selection is done using video= parameter. For example on imx51: di di_fmt video_mode DVI: 0 RGB24 mxcdi0fb:800x600M-16@60 etc DVI-HDMI: 0 RGB24 mxcdi0fb:720P60 LVDS: 0 LVDS666 mxcdi0fb:XGA WVGA lcd: 1 RGB565 mxcdi1fb:800x480M-16@55 TVE: 1 YUV444 mxcdi1fb:TV-NTSC mxcdi1fb:TV-PAL mxcdi1fb:720P60 For example on imx53: di di_fmt video_mode DVI: 0 RGB24 mxcdi0fb:800x600M-16@60 etc DVI-HDMI: 0 RGB24 mxcdi0fb:720P60 WVGA lcd: 0 RGB565 mxcdi0fb:800x480M-16@55 TVE: 1 YUV444 mxcdi1fb:TV-NTSC mxcdi1fb:TV-PAL mxcdi1fb:720P60 If you want to set NTSC tv as primary display, and make second display DI0 as DVI 1024x768 resolution, just add "di1_primary video=mxcdi0fb:RGB24,1024x768M-16@60 video=mxcdi1fb:YUV444,TV-NTSC" to cmdline. Signed-off-by: Rob Herring <r.herring@freescale.com> Signed-off-by: Jason Chen <b02280@freescale.com>
2010-05-12ENGR00123338 MX23: MTD block device supportAisheng.Dong
Add MTD_BLOCK imx23 configuration Signed-off-by: Aisheng.Dong <b29396@freescale.com>
2010-05-11 ENGR00123325-2 mx5x: Change default DMA zone to 96MSammy He
Change default DMA zone to 96M on mx5x Signed-off-by: Sammy He <r62914@freescale.com>
2010-05-11ENGR00123325-1 Increase DMA zone to 96M on mx5xSammy He
Increase DMA zone to 96M to fix memory not enough issue with 1080p video playback. Signed-off-by: Sammy He <r62914@freescale.com>
2010-05-09ENGR00122832-1 MX28: Configure clock source for FEC 1588 timerXie Xiaobo
Select clock for Ethernet 1588 timer and set the divider. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
2010-05-08ENGR00123293 iMX23 fix ssp clock is too slowFrank Li
bypass bit set to wrong possition. So ssp alays use xtal. mmc use ssp module divider instead of ssp clock source Signed-off-by: Frank Li <Frank.Li@freescale.com>
2010-05-07ENGR00123283 MX23: clock driver causes ssp_clk change timeout out of suspendRobert Lee
If you boot up and then go into suspend mode, the clk_busy_wait() function causes a timeout in the ssp_set_rate function because the rate is being set while the clock is disable resulting in the busy bit staying false. Signed-off-by: Robert Lee <robert.lee@freescale.com>
2010-05-07ENGR00123222 MX23/MX28: Add power optimization functionality to cpufreqRobert Lee
MX23/MX28: Add power optimization functionality to cpufreq Add working HCLK autoslow interface and functionality to cpufreq and clock driver. Add lowering of x_clk for lowest clock speed state. MX23: Fix 392MHz voltage value from 1475000 to 1450000. This lower value is all that is needed when using 130MHz hclk. MX23: change emiclk from 120000 to 130910 for 360000 cpu entry. 130910 allows more bandwidth and avoids momentary halting of sdram traffic required between emiclk changes. MX23/28: fiix problem with previous hclk autoslow implementation causing a corruption of the CLKCTRL _HBUS register. The regular hclk divider was getting set to 21 or 22 or 23 when the LCD was turned off. This very low speed starves the system. Signed-off-by: Robert Lee <robert.lee@freescale.com>
2010-05-07ENGR00122684: imx23: add nand support for updater defconfigPeter Chen
imx23: add nand support for and updater defconfig Signed-off-by: Peter Chen <b29397@freescale.com>
2010-05-06ENGR00123197 MX23: Fix CPU freq cannot be changed after LCD is off if mDDR usedNancy Chen
MX23: Fix CPU frequency can not be changed after LCD is off if mDDR is used. Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
2010-05-06ENGR00122920: Fix failure to boot from MMC slot 0 on MX51.Ranjani Vaidyanathan-RA5478
Disabling PLL3 was causing failure to boot from MMC slot0. Move SDHC clocks to be sourced from PLL2 instead of PLL3. Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
2010-05-06ENGR00122789: Fixed long-term video playback issue.Ranjani Vaidyanathan-RA5478
Fixed long-term video playback issue due to incorrect increment of clock usecount. Fixed various bugs associated with system entering LP-APM mode. Fixed incorrect enabling of PLL3 that was not allowing system to enter LP-APM mode if TVE was built in. EMI_GARB clock needs to be enabled when certain clock dividers are changed. Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
2010-05-06ENGR00123168 : iMX23 SSP/MMC change clock settingJeremy.Yao
Change mmc clock setting to fit new clock driver Signed-off-by: Jeremy Yao <r65161@freescale.com>
2010-05-05ENGR00123125 mx23: cleanup and fixes of mach-mx23/clock.cRobert Lee
- add set_rate functionality for x_clk. Added the x_set_rate and x_round_rate functions. A lower x_clk rate will be used for the lowest power 24Mhz state. This implementation to be added later into cpufreq but going ahead and providing the necessary clock driver functionality now. - add enable/disable functionality to ref clocks Assigned the enable and disable function pointers of each of the *_ref_clk tables to the mx23 enable and disable functions. - change lcd clock (default) parent to ref_pix Self explanatory. Previously this was incorrectly assigned directly to the PLL which would cause ref_pix clock to never be gated when not being used which causes very small but unnecessary additional power usage to occur when the LCD is disabled. - add hbus autoslow function to be used by cpufreq Added this function for eventual used by cpufreq driver. - fix pll_enable() delay This delay was changed to match delay requirements given in the mx23 reference manual from the definition of the PLLCTRL0 POWER bitfield. - revise emi_set_rate emi_set_rate had several small issues. The amount of iram it was asking for was set to an arbitrary amount instead of being assigned to the size of the assembly code. Instead, assigning it to the size of the assembly code. When no changes in emiclk speed were being made, we didn't need to spend the time allocating iram, disabling fiqs/irqs, and jumping to the assembly routines Added checks to minimize the time spent in emi_set_rate if then new clock divisors were the same as the old. Added functionality for switching the parent between ref_emi_clk and ref_xtal_clk source based on the clock speed. - added "set_sys_dependent_parent" functionality to allow the reduction some of the peripheral clocks (mainly SSP and GPMI) during the lowest power 24MHz cpu_clk state was needed to allow the PLL to turn off and achieve minimum power usage for that state. The "set_sys_dependent_parent" functionality implements this functionality by checking the cpu speed and changing the parent as needed (but only when the ref count is zero). - other minor cleanup In a couple of locations, I saw the following syntax being used: > -val &= ~(BM_CLKCTRL_FRAC_CPUFRAC << BP_CLKCTRL_FRAC_CPUFRAC); > -val |= clkctrl_frac; This was incorrect because the BM_ definition is already shifted to the correct bitfield location of the register. Shifting it over further by BP_ is a bug. This bug didn't cause problems in these cases because the BP_ value happended to be zero, but needed cleaning up anyway. The mx23_raw_enable was being called without any delays to ensure the clock was ready for use. Added a call to check the clock busy bit to ensure the clock is ready before being used. - Added clock_busy_wait function which replaced all the individual busy_wait handling and properly accounts for clocks with xtal source (which use a separate xtal sourced busy bit). - Cleaned up xtal and rtc clocks/sources functionality. - Added functionality to SSP and GPMI set_rate function to allow changing the parent clock to the xtal if the rate is a factor of 24MHz. Signed-off-by: Robert Lee <robert.lee@freescale.com>
2010-05-06ENGR00123134-3 MX53 NAND defconfig supportJason Liu
MX53 NAND defconfig support Signed-off-by:Jason Liu <r64343@freescale.com>
2010-05-06ENGR00123134-1 MX53 NAND mach supportJason Liu
MX53 NAND mach support Signed-off-by:Jason Liu <r64343@freescale.com>
2010-05-06ENGR00123131 NAND:Get resources from platform dataJason Liu
Get resources from platform data Signed-off-by:Jason Liu <r64343@freescale.com>
2010-05-05ENGR00122142-4 MX28:Dual ENET mach supportJason
MX28:Dual ENET mach support Signed-off-by:Jason Liu <r64343@freescale.com>
2010-05-05ENGR00122142-2 imx: fix platforms using fec RMII modeRob Herring
Add FEC phy interface mode platform data for platforms using RMII. Signed-off-by: Rob Herring <r.herring@freescale.com>
2010-05-05ENGR00122964 Second pass at unified i.MX23/i.MX28 NAND Flash driverPatrick Turley
Deleted the old drivers. Broke the driver into separate files, for readability and to isolate hardware dependencies. Fixed bad block problems in the boot area for the i.MX23. At this writing, UBI can't handle MTDs larger than 2GiB. If the general use partition is larger than 2GiB, the driver will create sub-partitions, none of which are larger than 2GiB. Updated the default configs for the i.MX23 and i.MX28. Other, miscellaneous changes. Signed-off-by: Patrick Turley <patrick.turley@freescale.com>
2010-05-04ENGR00123072-3 MX31: Add keypad mem resourceLily Zhang
Add keypad memory resource in MX31 3-stack platform Signed-off-by: Lily Zhang <r58066@freescale.com>
2010-05-04ENGR00123072-2 MX25: Add Keypad mem resourceLily Zhang
Add Keypad mem resource in MX25 platform Signed-off-by: Lily Zhang <r58066@freescale.com>
2010-04-30ENGR00123086 MX23: CPU frequency can not be changed to 64 MHzNancy Chen
MX23: CPU frequency can not be changed to 64 MHz. Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
2010-04-30ENGR00122951 MX23 w/ mDDR: EMI 24MHz clock changes caused crashesRobert Lee
MX23 w/ mDDR: EMI clock change code causes crashes with 24MHz state transitions. Signed-off-by: Robert Lee <robert.lee@freescale.com>
2010-04-30ENGR00123071 MX53: Remove iomux warning in bootLily Zhang
1. Remove iomux warning in boot 2. Put I2C PIN configurations into table Signed-off-by: Lily Zhang <r58066@freescale.com>
2010-04-29ENGR00122696 MX23: cpufreq-set can not work when fb0 is blankNancy Chen
Fixed cpufreq-set can not work when fb0 is blank. Fixed incorrect clock dividers Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
2010-04-29ENGR00123022 MX53: Add SPI NOR supportLily Zhang
Add SPI NOR support in MX53 EVK Signed-off-by: Lily Zhang <r58066@freescale.com>
2010-04-29ENGR00123017 MX53 Add support for MLBXinyu Chen
Add support for MLB by adding MLB MSL codes. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
2010-04-28ENGR00123013 mx28: build broken after commit a5421893d5Robert Lee
mx28: build broken after commit a5421893d5. Signed-off-by: Robert Lee <robert.lee@freescale.com>
2010-04-28ENGR00122990 iMX23/28 Fix wrong clock ref typeFrank Li
clock ref wrong set to __s8 Signed-off-by: Frank Li <Frank.Li@freescale.com>
2010-04-28ENGR00122851 WIFI: Faided to use WiFi SDIO card at SD slot0r65037
The WP bit is set in the 4Bytes wifi write operations accidentally. That would cause the INT wouldn't be generated. There is no such kind issue in SD/MMC write operations. Since that the BUS load on wifi maybe much lighter than that when SD/MMC is used. Remove the 100K pull up pad configuration on the eSDHC1 WP pin can solve this issue. Or Remove the SION configuration can fix this issue too. In the end, the second method is used. Unify the platform data configurations, and enable the registers dump when there are errors in the execution of esdhc driver. Signed-off-by: Richard Zhu <r65037@freescale.com>
2010-04-27ENGR00122629 Unified i.MX23/i.MX28 NAND Flash DriverPatrick Turley
This driver unifies the i.MX23 and i.MX28 NAND Flash drivers into a single driver that supports both SoC's. Signed-off-by: Patrick Turley <patrick.turley@freescale.com>
2010-04-27ENGR00122948 MX23: clock driver can cause cpu_clk and h_clk violationsRobert Lee
The current method of changing the cpu FRAC and integer dividers can cause short-term unexpectedly high frequencies. Also, h_clk temporarily runs higher than expected as well. Signed-off-by: Robert Lee <robert.lee@freescale.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-04-04 22:43:46 +0000