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Though mx6dl only has one IPU, it can still support two DIs.
So two LVDS or LVDS+HDMI should be supported.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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It need add 25mV to 800MHz/400MHz/200MHz work points for MX6DL,
otherwise system will crash when cpu freq switch to these work points
Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
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This reverts commit 88d3af87222b37e454acd6a8de3b0cf18180da32.
Signed-off-by: Xinyu CHen <xinyu.chen@freescale.com>
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This reverts commit 599b1c5fb9275920b3f612e28b7d9c45a9688719.
Signed-off-by: Xinyu CHen <xinyu.chen@freescale.com>
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Temporary workaround for real power key not functional.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Add vdoa support on i.MX6 SOC platform
Signed-off-by: Wayne Zou <b36644@freescale.com>
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Add code to support p2p dma mode.Add membership in imx_dma_data
struct to support P2P dma script. Because the P2P dma script
need 2 dma request to trigger DMA burst.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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Declaring strings in assembler source involves a certain amount of
tedious boilerplate code in order to annotate the resulting symbol
correctly.
Encapsulating this boilerplate in a macro should help to avoid some
duplication and the occasional mistake.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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This macro is used to generate unprivileged accesses (LDRT/STRT) to user
space.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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- change msleep(1) to udelay(500)
- msleep may be called in atomic context, which will cause
warning message
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
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* Fix build warnings
* clock.c: In function '_clk_pll1_enable':
warning: no return statement in function returning non-void
* clock.c: In function 'mx6_clocks_init':
warning: unused variable 'reg'
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
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SYSRQ is very useful for kernel debug thus enable it by default.
SYSRQ support serial port, we can send the command via minicom:
CTRL A + F (send BRK) + T: to dump the task information
Enable SYSRQ by default will not involve any performance drop
Signed-off-by: Jason Liu <r64343@freescale.com>
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1. add amic_detect pin
2. add dmic_gpio init
Signed-off-by: Gary Zhang <b13634@freescale.com>
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- Add Ethernet ANSI/IEEE 802.2 LLC support. And the packet with
IP head "ETH_P_802_2" will be processed in Ethernet stack L3 layer.
- If disable the feature, ethernet stack will drop the LLC packets.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Enable USB otg function in android default configure
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Different have different SD ports, need to add all SD irqs to
be condition of CPUfreq change and adjust the default irq threshold.
Signed-off-by: Anson Huang <b20788@freescale.com>
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IPU: change ipu_device thread process method to interrupt drive mode
to get better IPU post-processing load balance.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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TO1.0 parts donot boot properly after the following commit:
88d3af87222b37e454acd6a8de3b0cf18180da32
MX6-Switch ARM_CLK to PLL2_400MHz when ARM freq
is below 400MHz.
Correct gpt_clk was not getting enabled. Fix by adding the
appropriate gpt_clk.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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Uart 3 and NFC pins are shared.
Uart 3 enablement is done by passing an early parameter
called "uart3" from uboot. Both interfaces (Uart3 and NFC)
can NOT coexist on the same configuration at the same time.
Signed-off-by: Alejandro Sierra <b18039@freescale.com>
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On sabresd board, PMIC_ON_REQ control pmic power on/off, we can set TOP and
DP_EN of SNVS_LPCR to implement power off by software. On this way,SNVS RTC
alarm can work after power off. The description of register can be found on
other SNVS block document which provided by IC team, not i.MX6 RM.
Signed-off-by: Robin Gong <B38343@freescale.com>
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UART2 and CAN interface do not have pins in common.
Therefore uart2 early parameter is not required.
Signed-off-by: Alejandro Sierra <b18039@freescale.com>
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This patch corrects IPU id and IPU di for LDB mux.
As there is only one IPU on MX6DL SoC, we'll use
LVDS panel on IPU0 DI1/LVDS1 and HDMI on IPU0 DI0.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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Remove call to regulator_has_full_constraints() from Max17135 EPD PMIC
initialization code, since leaving it enabled results in a failure of
system to load properly - key regulators are disabled when 'epdc' is added
to the kernel command line.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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PLL1 can be disabled whenever ARM_CLK is below 400MHz since
ARM_CLK can be sourced from PLL2_PFD_400MHz.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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update PCIE_PWR_EN pin for RevB board, the old pin was
used by I2C3_SDA pin.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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update some pin mux of revB board.
fix i2c3 not work on sabre6q board, and change related pins.
Conflicts:
arch/arm/mach-mx6/board-mx6q_sabresd.h
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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update some pin mux of revB board.
fix i2c3 not work on sabre6q board, and change related pins.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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enable wm8962 for SabreSD-DL
Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
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Enable performance and ondemand governor for CPUFreq, but
default governor is still interactive.
Signed-off-by: Anson Huang <b20788@freescale.com>
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- i.MX6 sabresd board revA and revB adopt Atheros AR8031 phy.
Recorrect the fec phy AR8031 rework.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Conflicts:
arch/arm/configs/imx6_defconfig
arch/arm/configs/imx6_updater_defconfig
arch/arm/mach-mx6/board-mx6q_sabreauto.c
arch/arm/mach-mx6/board-mx6q_sabresd.c
arch/arm/mach-mx6/clock.c
arch/arm/mach-mx6/localtimer.c
drivers/cpufreq/Makefile
drivers/cpufreq/cpufreq_interactive.c
drivers/input/keyboard/gpio_keys.c
drivers/media/video/mxc/capture/Kconfig
drivers/media/video/mxc/capture/mxc_v4l2_capture.c
drivers/mmc/card/block.c
drivers/mmc/host/sdhci-esdhc-imx.c
drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c
drivers/usb/otg/fsl_otg.c
drivers/video/mxc/mxc_ipuv3_fb.c
include/linux/fsl_devices.h
include/linux/mmc/host.h
sound/soc/imx/Kconfig
sound/soc/imx/Makefile
sound/soc/imx/imx-hdmi-dma.c
sound/soc/imx/imx-wm8958.c
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SPKVDD regulator was being disabled whenever EPDC was included in the
image, because the EPD PMIC initialization code includes an invocation
of regulator_has_full_constraints(). This causes all regulators with
zero ref count to be disabled as part of a late_initcall. To prevent
this disable (which breaks ethernet and DHCP), set regulator to
have boot_on attribute, so that it will not be disabled at end of
driver loading sequence.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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what're done:
* PCIE topology, RC should be on bus 0, EP should be on bus 1.
Root Cause: The CLASS_REV of RC CFG header, specified
by SPEC to be RO, should be set to PCI_CLASS_BRIDGE_PCIclass
* Added PCIE PWR EN and RESET
* iATU wrong configurations.
Root Cause: The outbounds excepted the CFG region0
should be removed. Otherwise, the memory ATU wouldn't
work correctly.
* CT DHCP hang
Root Cause: PLL8 is set to bypass mode when linux close fec,
and the PCIe ref clk would be broken by PLL8 bypass mode.
The parent clk of pcie ref clk is disabled by FEC, since
linux would try to disable the none-addressed NIC after DHCP.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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Mfgtools want to emmc block device node is fixed mmcblk0.
Card in other slot is mmcblk1 or mmcblk2
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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The USB VBUS wakeup should be disabled to avoid vbus wake system
up wrongly due to vbus comparator is closed at weak 2p5 mode.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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According to IC guys, it needs to enable/disable usb wakeup setting at
controller and phy side together.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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fix some build warnings when using GCC 4.6.2:
arch/arm/mach-mx6/board-mx6q_sabresd.c:1588:20:
warning: function declaration isn't a prototype [-Wstrict-prototypes]
This patch also fix the following section mismatch warnings:
The function imx6q_init_audio() references
the variable __initconst imx6_imx_ssi_data.
This is often because imx6q_init_audio lacks a __initconst
annotation or the annotation of imx6_imx_ssi_data is wrong.
Signed-off-by: Jason Liu <r64343@freescale.com>
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set different gpr register due to mx6q or mx6dl
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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Need add gpio_request before use gpio_direction_output
Signed-off-by: make shi <b15407@freescale.com>
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- Set the display ID of HDMI before registering HDMI
device. HDMI is verified on RevA board
- Consolidate the codes about display devices
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Accelerometer support for ARD RevA and RevB.
Signed-off-by: Alejandro Sierra <b18039@freescale.com>
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Add mlb initial code to mx6 ard board.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Add ENET_RX_ER__ANATOP_USBOTG_ID iomux setting in head file.
Signed-off-by: make shi <b15407@freescale.com>
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- Configure USB pin and power control for mx6q sd board
- keep USB host1 VBUS always on for mx6q sd board
- set default USB OTG VBUS off for solo ARD board
Signed-off-by: make shi <b15407@freescale.com>
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Add light sensor isl29023 support
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Set interactive governor as default governor.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Add irq count to CPUFreq as a freq change condition.
Because some devices' working mode is unable to issue
CPUFreq change because of low CPU loading, but the cpu
freq will impact these devices' performace significantly.
Interactive govervor will sample the cpu loading as well
as the irq count which is registered. If the
loading or the irq count exceed the threshold we set,
governor will issue an CPUFreq change request.
These devices' irq threshold and enable/disable can be modified
via /sys/devices/system/cpu/cpufreq/interactive/irq_scaling
echo 0xAABBBC to change the default setting as below
AA : irq number
BBB: threshold
C :enable or disable
Currently only enable USDHC3, USDHC4, GPU, SATA and
USB by default, we can add device to the init struct which is
located in arch/arm/mach-mx6/irq.c.
Signed-off-by: Anson Huang <b20788@freescale.com>
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cpufreq: interactive: New 'interactive' governor
This governor is designed for latency-sensitive workloads, such as
interactive user interfaces. The interactive governor aims to be
significantly more responsive to ramp CPU quickly up when CPU-intensive
activity begins.
Existing governors sample CPU load at a particular rate, typically
every X ms. This can lead to under-powering UI threads for the period of
time during which the user begins interacting with a previously-idle system
until the next sample period happens.
The 'interactive' governor uses a different approach. Instead of sampling
the CPU at a specified rate, the governor will check whether to scale the
CPU frequency up soon after coming out of idle. When the CPU comes out of
idle, a timer is configured to fire within 1-2 ticks. If the CPU is very
busy from exiting idle to when the timer fires then we assume the CPU is
underpowered and ramp to MAX speed.
If the CPU was not sufficiently busy to immediately ramp to MAX speed, then
the governor evaluates the CPU load since the last speed adjustment,
choosing the highest value between that longer-term load or the short-term
load since idle exit to determine the CPU speed to ramp to.
A realtime thread is used for scaling up, giving the remaining tasks the
CPU performance benefit, unlike existing governors which are more likely to
schedule rampup work to occur after your performance starved tasks have
completed.
The tuneables for this governor are:
/sys/devices/system/cpu/cpufreq/interactive/min_sample_time:
The minimum amount of time to spend at the current frequency before
ramping down. This is to ensure that the governor has seen enough
historic CPU load data to determine the appropriate workload.
/sys/devices/system/cpu/cpufreq/interactive/go_maxspeed_load
The CPU load at which to ramp to max speed.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Need to disable localtimer's PPI when suspend, or ARM core
will run into exception when resume.
Signed-off-by: Anson Huang <b20788@freescale.com>
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