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2015-07-01MLK-11171 ARM: dts: Add option for CAAM to prevent megamix domain to power down.Dan Douglass
Add CAAM jr irqs to the gpc mf-mix-wakeup-irq mask to allow the Job Rings to register as wakeup devices. Fixed both 6UL and 7D configurations to cover all available Job Rings. Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
2015-07-01MLK-11204 ARM: imx: set int_mem_clk_lpm bit bit when entering wait mode on 6ulBai Ping
This bit is used to keep the ARM Platform memory clocks enabled if an interrupt is pending when entering low power mode. This bit should always bet set when the CCM_CLPCR_LPM bits are set to 01(WAIT Mode) or 10 (STOP mode) without power gating. Signed-off-by: Bai Ping <b51503@freescale.com>
2015-06-30MLK-11157 ARM: dts: Add CAAM snvs/secvio device tree nodes.Dan Douglass
Add CAAM snvs/secvio device tree nodes to enable the driver.. Signed-off-by: Ulises Cardenas <Ulises.Cardenas@freescale.com> Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
2015-06-30MLK-11202: dtb: Disable lcdif in csi dtbSandor Yu
iMX7D DDR3 ARM2 board LCDIF pin confilict with CSI, so disable LCDIF in csi dtb. Signed-off-by: Sandor Yu <R01008@freescale.com> (cherry picked from commit 7099bf4b77165b547512c34b27709cdaf4d07fde)
2015-06-30MLK-11155-1 arm: mu: keep mu rpmsg int enableRichard Zhu
Keep the mu rpmsg int always enable. - rpmsg transmissions are async, and drived by mu interactions between the amp cores. - the schedule delay is not real time mechanism, the mu interactions maybe blocked by the previous rpmsg int disable when there are very quick intercations between the amp cores. Solution: Keep mu rpmsg int always enable, since it is just to notify rpmsg master that there is buffer to read, and can be re-entry multi-times. Signed-off-by: Richard Zhu <richard.zhu@freescale.com> (cherry picked from commit 8487604b25aec5ef50ed865c2ccf2766eb658e78)
2015-06-29MLK-11142 ARM: dts: Add third Job Ring to CAAM i.mx6ul device tree.Dan Douglass
Populate i.mx6ul device tree with third Job Ring configuration. Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
2015-06-27MLK-11173 ARM: imx: disable arm arch timer when smp is NOT enabledAnson Huang
When SMP is deselected, ARM_ARCH_TIMER is still enabled while broadcast time is disabled, so when system enters WAIT mode, ARM platform's clock will be disabled, then system tick timer will stop and cause system stay at WAIT mode and timer event will NOT come as expected. To fix this issue, we do runtime check in our timer driver, if SMP is NOT enabled, ARM_ARCH_TIMER will be disabled and using GPT timer always. Signed-off-by: Anson Huang <b20788@freescale.com>
2015-06-26MLK-11136 ARM: dts: imx6: update the tempmon node on imx6ulBai Ping
Update the TEMPMON node properties on i.MX6UL. Signed-off-by: Bai Ping <b51503@freescale.com>
2015-06-25MLK-11168-2 ARM: dtsi: imx7d: enable OCRAM node to support internal SRAMZidan Wang
By doing this, we can allocate memory from iram when using i.MX7D SoC. Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
2015-06-25MLK-11168-1 ARM: dtsi: imx6ul: add iram property to support internal SRAMZidan Wang
By doing this, we can allow SDMA driver to allocate its memory from iram when using i.MX6UL SoC. Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
2015-06-21MLK-11138 ARM: imx: correct AHB post div name for busfreqAnson Huang
Commit (913c520 MLK-11045: arm: imx: clk-imx7d: remove ahb_root_clk LPCG clock gate) changes AHB clk's post divider name from IMX7D_AHB_CHANNEL_ROOT_DIV to IMX7D_AHB_CHANNEL_ROOT_CLK, busfreq needs to update AHB clk name accordingly, otherwise, first time busfreq enters low bus mode, AHB clk rate is 12MHz which is incorrect, it should be 24MHz. Signed-off-by: Anson Huang <b20788@freescale.com>
2015-06-15Revert "MLK-11080-1 dts: imx7d-sdb: add OOB GPIO config for wlan node"Dong Aisheng
WL_HOST_WAKEUP feature causes system suspend/resume break, so revert. This reverts commit ce9e893341c6196a5c31b3265525218c537d3e3e.
2015-06-15Revert "MLK-11080-3 dts: imx_v7_defconfig: enable CONFIG_BCM4339 to optimize ↵Dong Aisheng
performance" WL_HOST_WAKEUP feature causes system suspend/resume break, so revert. This reverts commit d9edd6e61897e4253fcbf0c7d2680933583e13c8.
2015-06-15MLK-11115 arm: imx: double check m4 is enabledRichard Zhu
Make a double check that m4 is enabled and run on imx7d Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com> (cherry picked from commit 6b8ce07eeb11b4cc8ead6e400277f9468f6c5bd0)
2015-06-15MLK-11111 ARM: dts: reconfigure TXD/RXD pin to fix noise when ↵Zidan Wang
playback/record mono wav There are some noise in the right channel when playback/record mono wav with some sample rate. Reconfigure TXD/RXD pin can fix this issue. Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
2015-06-12MLK-11102 ARM: dts: imx6ul-evk: Fix the pin conflict between CSI and SIM.Robby Cai
Fix the pin conflict between CSI camera and SIM. [ 8.877825] imx6ul-pinctrl 20e0000.iomuxc: pin MX6UL_PAD_CSI_DATA02 already requested by 21b4000.sim; cannot claim for 1-003c [ 8.966473] imx6ul-pinctrl 20e0000.iomuxc: pin-123 (1-003c) status -22 [ 9.013472] imx6ul-pinctrl 20e0000.iomuxc: could not request pin 123 (MX6UL_PAD_CSI_DATA02) from group csi1grp on device 20e0000.iomuxc [ 9.108263] ov5640 1-003c: Error applying setting, reverse things back [ 9.153798] imx6ul-pinctrl 20e0000.iomuxc: pin MX6UL_PAD_CSI_DATA02 already requested by 21b4000.sim; cannot claim for 1-003c [ 9.255857] imx6ul-pinctrl 20e0000.iomuxc: pin-123 (1-003c) status -22 [ 9.262427] imx6ul-pinctrl 20e0000.iomuxc: could not request pin 123 (MX6UL_PAD_CSI_DATA02) from group csi1grp on device 20e0000.iomuxc [ 9.389992] ov5640 1-003c: Error applying setting, reverse things back [ 9.429637] ov5640 1-003c: setup pinctrl failed [ 9.554600] ov5640: probe of 1-003c failed with error -22 [ 13.052973] kjournald starting. Commit interval 5 seconds Signed-off-by: Robby Cai <r63905@freescale.com> (cherry picked from commit fd102b852ec2b5f3d1915ec71203ced032786b75)
2015-06-12MLK-11100 ARM: dts: imx6ul-14x14-ddr3-arm2-emmc: disable qspi when use emmcHaibo Chen
eMMC has pin conflict with qspi, so disable qspi when enable emmc on imx6ul-14x14-ddr3-arm2 board. Signed-off-by: Haibo Chen <haibo.chen@freescale.com> (cherry picked from commit e9654ae969a23059ecbd9ac78981f6757285eab9)
2015-06-12MLK-11097-2: ARM: gpc: skip power domain touch for i.mx6ulRobin Gong
Skip power domain touch since there are no PU and display misc power domain on i.mx6ul. Signed-off-by: Robin Gong <b38343@freescale.com> (cherry picked from commit fe28d08ebb7922d429f5b24c13b4ea2eccf5b8f6)
2015-06-12MLK-11097-1: ARM: imx6ul: clean up gps dts setting for i.mx6ulRobin Gong
Clean up ldo-bypass setting in i.mx6ul-14x14-evk.dts to avoid any misunderstanding, although u-boot have already dsiable ldo-bypass setting check. Meanwhile, remove power-domain since there are no PU and display misc on i.mx6ul Signed-off-by: Robin Gong <b38343@freescale.com> (cherry picked from commit 7de477a1d07a2cb59773c4f2376a2d574aba1349)
2015-06-11MLK-11087: mtd:qspi: support DDR Quad mode for Macronix mx25l51245gHan Xu
Enable DDR quad mode for Macronix qspi chip mx25l51245g by setting Quad bit in status register and enabling in dts file. The LUT for SPINOR_OP_READ_1_4_4_D was initially designed for Spansion qspi chip, so there is one cycle for "mode" after address and before dummy. While Macronix qspi chip doesn't have this feature, so we just take off one cycle in dts file to bypass this problem. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit 2ee7cdc2b821605dbb47854238d7fc124800547a)
2015-06-11MLK-11093-2 dts: imx6ul-14x14-ddr3-arm2-emmc: enable HS200 supportDong Aisheng
Add ultra high speed mode pinctrl states to support eMMC HS200. HW rework needed that changing both NVCC_SD and NVCC_NAND to 1.8v. Signed-off-by: Dong Aisheng <b29396@freescale.com>
2015-06-11MLK-11093-1 dts: imx6ul-14x14-ddr-arm2: add SD1 eMMC supportDong Aisheng
The eMMC signals are reused from SD1 slot signals on MX6UL ARM2 board. Thus a new dts is introduced to avoid such pin confliction. Before using this dts, user has to do hw rework to connect eMMC IO signals and disconnect SD1 Slot signals. Signed-off-by: Dong Aisheng <b29396@freescale.com>
2015-06-10MLK-11046: arm: imx: clk-imx7d: add adc_root_clkAdrian Alonso
* Add ADC root clock IMX7D_ADC_ROOT_CLK * Update device tree adc node to use IMX7D_ADC_ROOT_CLK Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-06-10MLK-11045: arm: imx: clk-imx7d: remove ahb_root_clk LPCG clock gateAdrian Alonso
* Remove incorrect ahb_root_clk LPCG clock gate CCGR32 (0x4200) correspond to ADC clock root * Adjust IMX7D_OCRAM_S_CLK parent clock to ahb_root_clk Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-06-10MLK-11018: arm: imx: imx7d: add ipg clock dependency on FEC interfaceAdrian Alonso
* Add IPG clock root dependency on FEC ethernet interface from System Clocks and Gating table 5-12. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-06-10MLK-11084 dts: imx7d-sdb: add sd1 vmmc supportDong Aisheng
SD1 slot missed to add vmmc feature, add it now. Signed-off-by: Dong Aisheng <b29396@freescale.com> (cherry picked from commit dd5a5ff28ca7e684086313373992080042843c1f)
2015-06-10MLK-11080-3 dts: imx_v7_defconfig: enable CONFIG_BCM4339 to optimize performanceDong Aisheng
Enable CONFIG_BCM4339 to optimize performance for Broadcom BCM4339 WiFi which is on MX7D SDB board. The patch also fixes order of CONFIG_SENSOR_FXLS8471. Signed-off-by: Dong Aisheng <b29396@freescale.com> (cherry picked from commit 71895ee027deb9258b6f8339be675e58e8e9f0d4)
2015-06-10MLK-11080-1 dts: imx7d-sdb: add OOB GPIO config for wlan nodeDong Aisheng
This is required by WiFi driver enabling WL_HOST_WAKE feature. And WL_REG_ON needs 61 usec delay, both WL_REG_ON and WL_OOB GPIO requires pull down by default. Signed-off-by: Dong Aisheng <b29396@freescale.com> (cherry picked from commit 18eb35891fc322ee0153f39467fe5c7c8429744e)
2015-06-10MLK-10795-4 csi: correct the input select daisy setting for CSI pinsRobby Cai
Correct INPUT SELECT DAISY setting for CSI pins. Signed-off-by: Robby Cai <r63905@freescale.com> (cherry picked from commit 247f19d5b99337f8b7a11afb647dc503cf0b744c)
2015-06-10MLK-10795-3 ARM: dts: imx6ul-evk: Add support for ov5640 cameraRobby Cai
Add ov5640 camera support on imx6ul evk board Since MX6UL_PAD_CSI_DATA02 pin is used by Sim and CSI/Camera, a new DTS file need to be created. Signed-off-by: Robby Cai <r63905@freescale.com> (cherry picked from commit 7dbc6038c734fd19f527d00dbec4487ee3cc16e3)
2015-06-10MLK-10795-2 ARM: dts: imx6ul: Add the clocks for CSIRobby Cai
Add the clocks for CSI in dts file Add compatible string for imx6ul csi Signed-off-by: Robby Cai <r63905@freescale.com> (cherry picked from commit e4aecbd0937482228e1e6d67b6265c365f1c7cdd)
2015-06-10MLK-10795-1 clock: correct the clock for CSIRobby Cai
correct the clock for CSI Signed-off-by: Robby Cai <r63905@freescale.com> (cherry picked from commit 966477ebcc41a5711e884dfc19998bcad775bfc4)
2015-06-09MLK-11074: ARM:dts: fix mipi pin conflict with ecspi1Han Xu
mipi pins conflict with ecspi1 on i.MX7D 12x12 lpddr3 ARM2 board, manage the mipi pins in a individual group to solve the issue. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit ba9caf18f845918e26b24b304e81e98dce32e9ed)
2015-06-09MLK-11075: arm: dts: enable usb otg1 and otg2 port for ↵Li Jun
imx7d-19x19-lpddr3-arm2 board Enable otg1 and otg2 on imx7d-19x19-lpddr3-arm2 board with dr mode. Signed-off-by: Li Jun <jun.li@freescale.com> (cherry picked from commit 035903dd5369cbf29ddf9884ed0914646d51e085)
2015-06-09MLK-11070 ARM: dts: imx6ul: add dma channel for uart7 and uart8Fugang Duan
Add dma channel for uart7 and uart8. Signed-off-by: Fugang Duan <B38611@freescale.com>
2015-06-09MLK-11069 ARM: clk: imx6ul: add uart8 clock gateFugang Duan
Add uart8 clock gate. Signed-off-by: Fugang Duan <B38611@freescale.com>
2015-06-08MLK-11065-5 imx_v7_defconfig: add Broadcom bcmdhd driver supportDong Aisheng
Add Broadcom bcmdhd driver support. BTW, the in kernel upstream brcmfmac driver is removed to avoid confusion. Signed-off-by: Dong Aisheng <b29396@freescale.com>
2015-06-05MLK-11061: ARM:dts: enable ddr quad mode for QSPI on 6UL ARM2 and 7D ARM2Han Xu
Enable DDR Quad mode for QSPI on 6UL ARM2 and 7D ARM2 board to improve the performance. Signed-off-by: Han Xu <b45815@freescale.com>
2015-06-05MLK-11057: ARM:dts: ECSPI Nor should be n25q032 on i.MX6UL ARM2Han Xu
The ECSPI Nor on i.MX6UL ARM2 board is n25q032 rather than m25p80. Signed-off-by: Han Xu <b45815@freescale.com>
2015-06-05MLK-11056: ARM: dts: change the PAD setting for MQSShengjiu Wang
Change the PAD setting for MQS for reduce the noise Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
2015-06-05MLK-11054 ARM: dts: imx6ul-14x14-ddr3-arm2-spdif: fix pin conflict with sdHaibo Chen
The spdif has two pin conflict with sd. They are sd1_reset and sd2_vselect. When enable spdif, sd1 and sd2 can't support sd3.0 completely. Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
2015-06-05MLK-11039: dts: Enable lcdif driver in imx7d 19x19 ddr3 arm2 boardSandor Yu
Enable lcdif and pxp driver in imx7d 19x19 ddr3 arm2 board Signed-off-by: Sandor Yu <R01008@freescale.com>
2015-06-05MLK-10256-08: dts: Add mipi csi support to imx7 19x19 arm2Sandor Yu
Add new imx7d-19x19-ddr3-arm2-mipi.dts file for mipi csi. Move parallel csi config to imx7d-19x19-ddr3-arm2-csi.dts. Signed-off-by: Sandor Yu <R01008@freescale.com>
2015-06-05MLK-10256-05: defconfig: Add MXC_MIPI_CSI to configsSandor Yu
Add MXC_MIPI_CSI to imx v7 deconfig. Signed-off-by: Sandor Yu <R01008@freescale.com>
2015-06-05MLK-10256-01: imx clk: Set mipi csi clock parent to sys_pfd3Sandor Yu
Set mipi csi root clock parent to sys_pfd clock. Signed-off-by: Sandor Yu <R01008@freescale.com>
2015-06-05MLK-10570-02: dts: Rename ov5640 mipi from ov5640 to ov564xSandor Yu
Rename ov5640 mipi driver from ov5640 to ov564x. Signed-off-by: Sandor Yu <R01008@freescale.com>
2015-06-05MLK-11023-2 ARM: dts: imx7d-19x19-ddr3-arm2-sai: fix sd issueHaibo Chen
Audio has a pin conflict with sd3-vselect. This patch move sd3_vselect to a new hog group pinctrl_hog_sd3_vselect. imx7d-19x19-ddr3-arm2.dts include this new hog group, for imx7d-19x19-ddr3-arm2-sai.dts, do not include this new hog group due to the pin conflict. Due to the pin conflict, if support audio, sd3 slot can't support SD3.0 So this patch disable the SD3.0 for sd3 slot. Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
2015-06-05MLK-11023-1 ARM: dts: imx7d-12x12-lpddr3-arm2-sai: fix sd issueHaibo Chen
Audio has a pin conflict with sd2-vselect. This patch move sd2_vselect to a new hog group pinctrl_hog_sd2_vselect. imx7d-12x12-lpddr3-arm2.dts include this new hog group, for imx7d-12x12-lpddr3-arm2-sai.dts, do not include this new hog group due to the pin conflict. Due to the pin conflict, if support audio, sd2 slot can't support SD3.0 So this patch disable the SD3.0 for sd2 slot. Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
2015-06-05MLK-11030-2 ARM: dts: change SAI MCLK to 36864000HZ to support 32bit 32k ↵Zidan Wang
format for SAI master mode Change SAI MCLK to 36864000HZ to support 32bit 32k format for SAI master mode. Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
2015-06-05MLK-11024 ARM: imx: make sure DDRC in self-refresh before entering DSM modeAnson Huang
DDRC has no handshake with GPC, so before entering DSM mode, need to make sure DDRC is in self-refresh. MEM mode suspend already meet this requirement, but for STANDBY mode suspend, we did NOT do anything about DDRC which is NOT correct, it will cause system crash if the standby time is too long. This patch adds the DDRC enter/exit self-refresh before/after SOC enters DSM mode, the code will be running on OCRAM. Signed-off-by: Anson Huang <b20788@freescale.com>
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