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2011-05-11ARM: tegra: power: speedo, cpu, core process ids for tegra3Diwakar Tundlam
Change-Id: If206f26e0f10f666fd7839c1ebb839eeb4899e21 Reviewed-on: http://git-master/r/29879 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-11arm: tegra: cardhu: Unused pins from vddio_gmi to low power modeLaxman Dewangan
Configuring the pins which are belonging to vddio_gmi to recommended state to consume low power. bug 807813 Change-Id: I18b67688b0e45ccd5f16ac3f1f8a7f4db3142bae Reviewed-on: http://git-master/r/29628 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-11ARM: tegra: enterprise: sdhci: Build FIXPradeep Goudagunta
Build Fix. Bug 822432 Change-Id: Ia9d2d3ddc9aa9b2c00761ceb30a2bdcda8d261cf Reviewed-on: http://git-master/r/30718 Reviewed-by: Pradeep Goudagunta <pgoudagunta@nvidia.com> Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com> Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
2011-05-11arm: tegra: usb_phy: ulpi fix for tegra_3x_socNitin Kumbhar
Change-Id: Ia7155f3e94c127b18f2909f9f80583e5f74b8483
2011-05-11Merging android-tegra-2.6.36 into git-master/linux-2.6/android-tegra-2.6.36Nitin Kumbhar
Conflicts: arch/arm/mach-tegra/usb_phy.c drivers/usb/gadget/fsl_tegra_udc.c drivers/usb/host/ehci-tegra.c drivers/video/tegra/dc/dc.c Change-Id: I62d72b8b96d4039bd0d253583c415ae714fb2693
2011-05-10Revert "arm: tegra: cardhu: Setting the gpio pins properly."Jin Qian
Original change breaks LP1 on t30. This reverts commit 522f94b14b99c47322a72012fb5ce9a59c145630. Change-Id: Ia3aacc5924987828aa0fd1e2c6ccc3c990b871c0 Reviewed-on: http://git-master/r/31023 Tested-by: Jin Qian <jqian@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-10Revert "ARM: defconfig: enabling vibrator on Cardhu"Jin Qian
Original change breaks LP1 on t30. This reverts commit b7e127ac1a4dbfd1fd66f02f8e0c7ac40e732674. Change-Id: I337c03a7f927a54f96b502beebd1a580e469624d Reviewed-on: http://git-master/r/31022 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Jin Qian <jqian@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-06ARM: tegra: Fix wait_util race/very long wait.Alex Frid
Change-Id: I782ca4ffc94175e5e73535fbb0309173a72a83d5 Reviewed-on: http://git-master/r/30582 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Jin Qian <jqian@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-05ARM: tegra: power: Set cpu_pwr_off timer to 200us for PMICDiwakar Tundlam
Change-Id: Ic30a091dd634b1857cdbfc5a0c47d34bc496b04f Reviewed-on: http://git-master/r/29884 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-05-05arm: tegra: cardhu: Setting CORE_PWR_REQ to output highLaxman Dewangan
Setting CORE_PWR_REQ to high. This is require to enable tracking regulator to supply more than 2A current for cardhu A03 board. bug 805454 Change-Id: I4ff9d4d2bf106dc0d3d708fe9e1a7f7158dce27e Reviewed-on: http://git-master/r/29623 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-05-05ARM: cardhu: defconfig: disable PDA_POWERPritesh Raithatha
Change-Id: I32ee13091f7e395294d13efbc802badde1ed8c1a Reviewed-on: http://git-master/r/30329 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-05-05arm: tegra: cardhu: adding support for wifi OOB interruptRakesh Goyal
Configuring gpio line for oob interrupts and providing required resources to make oob work. Change-Id: Ia4231870854562f68b6c1486002f2abeba413b04 Reviewed-on: http://git-master/r/30322 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-05-05arm:tegra: Do not power gate PCIE for tegra 3x SOCNarendra Damahe
Power gating of PCIE will be separately handled for 3x SOC. This is to fix bug 821213 Change-Id: Id511778f4c3422ee9d92a2c77686803e09704ee4 Reviewed-on: http://git-master/r/29868 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-05-05arm:tegra: Cardhu USB driver registration changeNarendra Damahe
Correcting USB driver registration sequence to avoid USB warning Refer bug 803572 for details Change-Id: I41cc8d2437b7da633ddb0c5c89329e83078e9277 Reviewed-on: http://git-master/r/29867 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-05-05arm: tegra: Fix wrong parameter to boot error messageHiro Sugawara
This makes up disregarded objection in change 29149. Change-Id: If8c83471719c743e2a74f4fb0ee8c34240498b7b Reviewed-on: http://git-master/r/29863 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-05-05ARM: defconfig: enabling vibrator on Cardhuvenu byravarasu
Enabled MAX1749 vibrator in Cardhu configuration Change-Id: I5462d281908dc3751844ffeb957d1d5c27a4e11e Reviewed-on: http://git-master/r/29634 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-05-05ARM: tegra: enterprise: Preserve common PLLP_OUT4 settingAlex Frid
Change-Id: I5a3d8134530969f1c896e12ac97a2a091ad97084 Reviewed-on: http://git-master/r/30074 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-05ARM: tegra: power: Add Tegra3 core DVFS sysfs controlAlex Frid
Change-Id: I085d8cff2b5fea60f5245c36eefe849aa17a58f5 Reviewed-on: http://git-master/r/29764 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-05ARM: tegra: power: Expand Tegra3 core DVFS tableAlex Frid
Expand Tegra3 core DVFS table with characterization results (core DVFS is still disabled). Change-Id: Ic3b63192982312b722dd68ecd15e28d01b67a2f2 Reviewed-on: http://git-master/r/29763 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-05ARM: tegra: clock: Do not keep Tegra3 PLLC always onAlex Frid
Remove PLLC from Tegra3 always on clock list, so it can be disabled, when all its descendants are disabled. Change-Id: I8e91c18cad1df8652d91669917e509b2cae8e57f Reviewed-on: http://git-master/r/29762 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-05ARM: tegra: clock: Init Tegra3 sclk frequency to 108MHzAlex Frid
Set Tegra3 default system clock frequency to 108MHz. Previous setting 216MHz was kept until the 1st sclk user is enabled, and then, when it is disabled go down to 108MHz, anyway. On the other hand, system power immediately after boot was affected by unnecessary high sclk frequency while OS is idle. This change also enables dynamic switching between sclk parents PLLP_OUT4 and PLLM_OUT1. Change-Id: I00b12f3aef5c5fc8226d6c27470f4610e9e43ad8 Reviewed-on: http://git-master/r/29761 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-05ARM: tegra: clock: Add Tegra3 virtual system bus clockAlex Frid
Added Tegra3 virtual system bus clock to expand system clock DFS: - dynamic selection of sclk parent based on target frequency range (with current low/high range threshold at 216MHz sclk parent is still static - PLLP_OUT4, but mechanism is in place) - dynamic changing of pclk divider to follow APB clock minimum frequency requirements - support for intermediate (between max and min) frequency levels for sclk shared bus users Change-Id: I0424372ae8a87f0b64728bff7c402cd3076bb552 Reviewed-on: http://git-master/r/29760 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-05arm: tegra: cardhu: Setting the gpio pins properly.Abhiruchi Birajdar
The gpio power down pins for rear and front camera are properly set depending on the board type. Bug 821048 Change-Id: Ibf265bc79b582d9ed4c4cc0d1a864a5c68b05835 Reviewed-on: http://git-master/r/30213 Tested-by: Abhiruchi Birajdar <abirajdar@nvidia.com> Reviewed-by: Prayas Mohanty <pmohanty@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: John Sasinowski <jsasinowski@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Danielle Sun <dsun@nvidia.com>
2011-05-05ARM: defconfig: enable CDC ether driver for CardhuWK Tsai
Enable CDC ether device driver to support modem data cards for Cardhu board. Bug 812716 Change-Id: Ie1b3413e9157cad347c1ebde393fb770133c9f45 Reviewed-on: http://git-master/r/29812 Reviewed-by: ChihMin Cheng <ccheng@nvidia.com> Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com> Tested-by: Wang-Kai (WK) Tsai <wtsai@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-05crypto: tegra-aes: dual core supportSanjay Singh Rawat
* add bsea engine support for encryption and decryption * add arbitration semaphore id for bsea Bug 803932 Original change: http://git-master/r/#change,29672 (cherry picked from commit 0008cdb0f38d0cd0c074671fc067c4321f340b06) Change-Id: I59fcaab29c47a8b42e7470b30486851cfe90848f Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/30190 Tested-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-05arm: tegra: usb: Fix compiler warningsScott Williams
Fix 'unused variable' warnings when compiling for Tegra3. Change-Id: I3b22758792a365c939079c113de4f0b821d9f544 Reviewed-on: http://git-master/r/30095 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-05-05arm: trustzone: Fix compiler warningsScott Williams
Fix warnings introduced with CONFIG_TRUSTED_FOUNDATION code. Change-Id: I927d7fcd36f9f294c19737ca3468c8f57b79edbc Reviewed-on: http://git-master/r/30096 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
2011-05-05arm: tegra: enterprise: Fix build issueKasoju Mallikarjun
Fixed build issue resulted from Audio BT SCO support. Change-Id: I2f8c79699e44337767526d52df7b4343a154c92d Reviewed-on: http://git-master/r/30387 Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Reviewed-by: Scott Peterson <speterson@nvidia.com>
2011-05-05ARM: tegra: change sclk valuePrashant Gaikwad
sclk remains at 120MHz in os idle case also. Lower the initial value for sclk, hclk and pclk to save power in os idle case. Bug 819796 Change-Id: I7917df2f0ea65988d89e435ea8f0e4a38016de03 Reviewed-on: http://git-master/r/28763 Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-05arm: tegra: power: disable PLLA for lp1Jin Qian
Change-Id: I7943b718669ce4ecd45902870a0ddf0d6b8d8c60 Reviewed-on: http://git-master/r/29888 Tested-by: Jin Qian <jqian@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-05ARM: tegra: powergate: Add hot reset sequence for powergateJin Qian
Change-Id: I0e37b788c666ae99f46e7e6995c3700b0b23d412 Reviewed-on: http://git-master/r/29901 Tested-by: Jin Qian <jqian@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-05ARM: tegra: make wait_util wait longerJin Qian
Change-Id: If67effbaa82cf9724e1be3ce9389f19e5123cffa Reviewed-on: http://git-master/r/30296 Tested-by: Jin Qian <jqian@nvidia.com> Reviewed-by: Yun Long <ylong@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-05Sdhci:tegra:Switch OFF/ON power rails in suspend/resumePavan Kunapuli
Switching off and switching on the power rails during suspend and resume. Passing the power rail name, maxV and minV through platform data. Bug 793796 Change-Id: I6c80c1a23c9681043d11ffdd210dc6d2146bdd2e Reviewed-on: http://git-master/r/29660 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-05ARM: tegra: Add EMC to DDR clock ratio config optionAlex Frid
Change-Id: Ib5b7c99b483785b84ece0662ae5e9e58227d257f Reviewed-on: http://git-master/r/30309 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Wen Yi <wyi@nvidia.com>
2011-05-03arm: tegra: hsic: Enable T30 HSICMichael Hsu
Modified cardhu board config for ehci2 to use HSIC. Need to turn on 6416 IO expander gpio for VDDIO_HSIC. Otherwise, VDDIO_HSIC would be 0 Volts. Fix HSIC register differences between T20 / T30. Change-Id: I03079d4691981c8bc5fa220720aa55de507e6f04 Reviewed-on: http://git-master/r/29428 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-05-03arm: tegra: Enabling RTC data based on defconfigvenu byravarasu
Internal and PMU RTC data are enabled only when respective macros are defined in the Cardhu defconfig file. bug 793949 Change-Id: Iefc074877b263f3620c5ad08026435b3232ae3aa Reviewed-on: http://git-master/r/29637 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-05-03arm: tegra3: update pinmux table for CAM_MCLKPrayas Mohanty
Fix mux entry for CAM_MCLK to use VI_ALT2. bug 821540 Change-Id: I7d68af22eb65b5e2ee20bf521cc73587e41b1c37 Reviewed-on: http://git-master/r/29981 Reviewed-by: Prayas Mohanty <pmohanty@nvidia.com> Tested-by: Prayas Mohanty <pmohanty@nvidia.com> Reviewed-by: Shantanu Nath <snath@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Danielle Sun <dsun@nvidia.com> Tested-by: Danielle Sun <dsun@nvidia.com>
2011-05-03arm: tegra3: pinmux: Adding SFIO2 option for CAM_MCLKLaxman Dewangan
Adding SFIO2 option as VI_ALT2 for the CAM_MCLK pin group. bug 821540 Change-Id: Ic3fd6effd1ac2767c416f97491278f77bddbce76 Reviewed-on: http://git-master/r/29925 Reviewed-by: Prayas Mohanty <pmohanty@nvidia.com> Reviewed-by: Abhiruchi Birajdar <abirajdar@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Danielle Sun <dsun@nvidia.com> Tested-by: Danielle Sun <dsun@nvidia.com>
2011-05-03ARM: tegra: mcstats: Disable Debug messages.vdumpa
Change-Id: I7ae1192bcc764293100ce0262d3af22e9c246895 Reviewed-on: http://git-master/r/29717 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-03tegra alsa: Audio BT SCO supportRavindra Lokhande
added support for audio BT sco usecase. For BT sco, i2s is programmed in pcm mode. Change-Id: Iffcfb707cd2c025b78b82e70ba35f89d47a21263 Reviewed-on: http://git-master/r/30042 Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com> Tested-by: Ravindra Lokhande <rlokhande@nvidia.com> Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: Scott Peterson <speterson@nvidia.com>
2011-05-03ARM: tegra: Modify DDC (i2c2) clock rate as 100KHzHaley Teng
Per the 8.4.1 section of HDMI spec version 1.4a, 100KHz is the maximum clock rate of DDC i2c bus. Bug 820552 Change-Id: I7990309c4f3485c9c356623468cfabe25d733604 Signed-off-by: Haley Teng <hteng@nvidia.com> Reviewed-on: http://git-master/r/29966 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Alok Chauhan <alokc@nvidia.com>
2011-05-03ARM: tegra: cardhu: add AC present interrupt gpioPritesh Raithatha
Bug 817305 Bug 806809 Change-Id: I5a585d890e76804d4b5c3de1b7e1b4085074ac13 Reviewed-on: http://git-master/r/30001 Tested-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-02Merge remote branch 'tegra/linux-tegra-2.6.36' into android-tegra-2.6.36Rebecca Schultz Zavin
2011-04-29arm: tegra: set codec data format to i2sRavindra Lokhande
set codec communication data format to i2s. Change-Id: I677320ca0d19a79ac19bf599d94a6c7750ff971f Reviewed-on: http://git-master/r/29831 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-04-29arm: tegra: fix audio issueVinod G
bug 820773 Fix the audio issue resulted from code merge. Change-Id: I37999fabec7de077eac337db33eb2b01939349fc Reviewed-on: http://git-master/r/29684 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-04-29ARM:tegra:cardhu: Adding Vibrator power rail infovenu byravarasu
Adding power rail details for Vibrator on E118x board. bug 810072 Change-Id: Ibf50c986b843fb36515f36493b5a07323ac940ab Reviewed-on: http://git-master/r/29631 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-04-29ARM: tegra: clocks: make pclk div dynamicPrashant Gaikwad
dynamic changing of pclk divider to follow APB clock minimum frequency requirements with respect to sclk frequency. Bug 819796 Change-Id: Id6d4f9321fe3d49922ace9b50cb6e5114f63b9b5 Reviewed-on: http://git-master/r/29643 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-04-29ARM: tegra: clocks: Add dfs for sclkPrashant Gaikwad
sclk continues to be clocked at 120MHz even when there is no activity. Add dfs so that different modules can set sclk rate as required and it will be clocked to minimum when there is no activity. Minimum limit changed to 40MHz for sclk. Bug 819796 Change-Id: I09931c89c584631830a6d0cea45d98b3ed934b80 Reviewed-on: http://git-master/r/28764 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-04-29ARM: tegra: clock: Remove "sole parent" requirementAlex Frid
During dvfs initialization, change propagation of sleeping attribute from "current_parent-to-child" to "possible_parent-to-child". This would guarantee that any non-sleeping clock has only non-sleeping parents, and it is no longer required for sleeping clock to be a sole parent of all its children. Change-Id: I11110f6cb9c538c1e71bf00195c3f49dd09ea1f7 Reviewed-on: http://git-master/r/29706 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-04-29ARM: tegra: clock: Show cansleep attribute in clock treeAlex Frid
Change-Id: Iff900aa5b69329696bcd250c824e0a191f6f6299 Reviewed-on: http://git-master/r/29705 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-01-31 00:53:14 +0000