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MX50 requires inclusion of PxP, Maxim 17135, and EPDC drivers as defaults
in order to have proper E-Ink display support.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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Reconfigure the PAD's configurations to level up the HW
timing compatibility.
MX51:Some MMC cards such as transcend mmc plus cards can't
be recognized and initialized correctly on the second
esdhc slot of the BBG boards that populated the new DDR chips.
MX53:Same Kingstone SDHC card can work well on EVK REVA board, but
failed in initialization on EVK REVB board without
any sw modifications.
After adjust the slot pin's pad configurations,
fix the HW compatible issues listed above.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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Maxim 17135 PMIC init added to MSL in conjunction with addition
of Maxim 17135 regulator driver and I2C client.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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support imx53 evk board OTG and Host1 vbus active
and inactive to low the power consume, fix fsl_otg.c
build failt, add vbus power control function pointer
in struct fsl_usb2_platform_data.
Signed-off-by: Hu hui <b29976@freescale.com>
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The pad settings for the over-current detection pins on MX50 ARM2
CPU board needs to have a pull-up.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
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Add reference counting of driver opens for multi-context support.
Increase command buffer to 64KB.
Signed-off-by: Rob Herring <r.herring@freescale.com>
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Increase vpu iram size to 80K on mx51 and mx53 to
use more iram for video decoding and encoding.
It can cover 720P encoder and 1080P decoder except VC-1 AP.
Signed-off-by: Sammy He <r62914@freescale.com>w
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Add support for i.MX50 and arm2 board with lpddr/mddr.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Rob Herring <r.herring@freescale.com>
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The serial device setup code includes board configuration header,
but is common for all boards. So make the configuration common for
all boards and remove the board headers as nothing else is used.
Signed-off-by: Rob Herring <r.herring@freescale.com>
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CCM is different on various MX5x chips, so limit its include.
SRPG is only initialized on MX51 3DS, but should be done on all
MX5x chips.
Signed-off-by: Rob Herring <r.herring@freescale.com>
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Make ESAI as a platform device, and pass the audio data to use
the external memory by default.
Signed-off-by: William Lai <b04597@freescale.com>
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CS4288 is built in as default for MX53, but with a command parameter
of apc in the commandline to enable.
Signed-off-by: William Lai <b04597@freescale.com>
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Make ESAI a platform device and pass the register base address
by resource and then use ioremap.
Signed-off-by: William Lai <b04597@freescale.com>
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Sata can work well on EVK boards, and pass the unit-tests.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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1. correct mx53 sdma script variable
2. CSPI should not use cspi_main_clk
3. remove duplicated M4IF setting codes in clock.c, which
are already in cpu.c
Signed-off-by: Lily Zhang <r58066@freescale.com>
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1 correct the pata platform device resource check codes
2 Change the end statment of the sdhc1 det pin
iomux definition on mx51 board from ',' to ';'.
3 sdhc driver max blk count on MX31, sinc
customer report that the emmc would be failed when
the blk count is more than 32.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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The default partitions are missing in MX53 SPI NOR MTD.
It's because spi nor driver and mx53 msl include different
header files. It causes struct definitions are different.
For i.MX SPI nor driver, need to use asm/mach/flash.h by
aligning with NAND driver.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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If not, the board will be reset as no one
serices the watchdog.
At USB recovery mode, the watchdog will be
enabled at rom code.
Signed-off-by: Peter Chen <b29397@freescale.com>
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Fix clock div zero issue in mx5 clock file
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Add ADV7180 TV decoder support on mx53. OV3640 module must be
removed before ADV7180 TVIN test.
Signed-off-by: Sammy He <r62914@freescale.com>
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Change adv7180_pwdn callback function on mx35 due to pwdn parameter
defintion update.
Signed-off-by: Sammy He <r62914@freescale.com>
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Add CCIR interlaced mode for TV decoder. And add pwdn callback
function in mxc_camera_platform_data.
Signed-off-by: Sammy He <r62914@freescale.com>
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To reslove the problem when resuming a playback from pausing
Signed-off-by: Lionel Xu <r63889@freescale.com>
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1. MLB can only work with "jtag=on" option enable or after system
resume now. It's cuased by emi_int2 clock gate bit setting.
MX53 enables the internal memory power saving mode which requires
emi_intr CCGR bits must be set as 0x11 if using IRAM. To fix current
issue, add additional mlb clock which is associated with emi_int2.
2. Update MLB PIN setting.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Add persistent bit for MX28
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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The old one can't work and no ubi support
Signed-off-by: Peter Chen <b29397@freescale.com>
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MX5x, MX37: Fix DVFS memory resource issue.
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
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Add SPDIF Tx support for MX53 EVK board.
1. Support 44.1KHZ sample rate.
2. 48K and 32K sample rates require 24.576MHZ OSC connected to
CKIH2. But it's "DNP" in EVK.
Test conditions:
1. Connect MX51 Accessory Card with J94 port in EVK.
2. SPDIF_OUT pin conflicts with 12V pin used by CAN feature.
Add "spdif" command option in the command line to enable SPDIF
Signed-off-by: Lily Zhang <r58066@freescale.com>
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The old imx51_updater_defconfig is out-dated, so delete it,
and mfg firmware will use imx5_updater_defconfig in future.
Signed-off-by: Peter Chen <b29397@freescale.com>
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MX51: Fix slow TS issue.
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
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1. USB gadget driver can't work if we insmod usb host module first,
At default, we should not define CONFIG_USB_EHCI_ARC_OTG
(Taking the first usb port as host), otherwise the usb gadget driver
will can't work due to its resource have already claimed by usb0 host.
2. Fixes some warnings and error format for Kconfig
and defconfig
Signed-off-by: Peter Chen <b29397@freescale.com>
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Enhancement the UTP protocol and give more comments
for source code
Signed-off-by: Peter Chen <b29397@freescale.com>
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Add debug-uart pm function
Signed-off-by: Jeremy Yao <r65161@freescale.com>
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add dvfs-core platform device and device data
Signed-off-by: Shen Yong <b00984@freescale.com>
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Add appropriate secondary clocks to GPU2d and GPU3d clocks.
Also fix the naming scheme for the clocks needed by GPU so
that the same clocks can be used on both MX51 and MX53.
Fixed the round_rate function for many clocks so that the rate
returned is not greater than the maximum rate supported for that clock.
Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
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If iram_alloc fails, should warn and fall back to external ram.
Signed-off-by: Alan Tull <r80115@freescale.com>
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Set AXI_B_CLK to be 200MHz in case it is set to other clock rate in bootloader.
This can make sure IPU has sufficient clock rate.
Signed-off-by: Liu Ying <b17645@freescale.com>
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Added improved timing calculations to the driver, and various other
support work.
Signed-off-by: Patrick Turley <patrick.turley@freescale.com>
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Add config file
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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Add opt uuid support
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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copy file from stmp plat
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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Because of a documentation error, the bitmask for gpu_2d clock select
is defined incorrectly.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
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MX28: System hangs when set different cpu freq continuously.
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
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Fix system timer suspend/resume operation in mx23 pm module
Signed-off-by: Jeremy Yao <r65161@freescale.com>
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Due to the LCDIF clock caculation problem.
Signed-off-by: Robby Cai <R63905@freescale.com>
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The WindowsXP can only recognize the ramdisk size above 8MiB.
Signed-off-by: Peter Chen <b29397@freescale.com>
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There are bad turnaround erros when copying data from SD to Udisk
via Host port in i.mx53. Tunning TX fifo fill threshold from 2 to 8.
FIFO Burst Threshold:(Read/Write) [Default = 2] This register controls
the number of data bursts that are posted to the TX latency FIFO in host
mode before the packet begins on to the bus. The minimum value is 2 and
this value should be a low as possible to maximize USB performance. A
higher value can be used in systems with unpredictable latency and/or
insufficient bandwidth where the FIFO may underrun because the data
transferred from the latency FIFO to USB occurs before it can be
replenished from system memory. This value is ignored if the Stream
Disable bit in USBMODE register is set.
Signed-off-by: Li Jun <r65092@freescale.com>
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fix ethernet can not enter suspend state
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
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Miss CONFIG_PACKET at default config
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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Smalle change due to the bootloader change and fix Mx23 fail
caused by clock module change.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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