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path: root/drivers/base/regmap/regcache.c
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2012-04-15regmap: implement register stridingStephen Warren
regmap_config.reg_stride is introduced. All extant register addresses are a multiple of this value. Users of serial-oriented regmap busses will typically set this to 1. Users of the MMIO regmap bus will typically set this based on the value size of their registers, in bytes, so 4 for a 32-bit register. Throughout the regmap code, actual register addresses are used. Wherever the register address is used to index some array of values, the address is divided by the stride to determine the index, or vice-versa. Error- checking is added to all entry-points for register address data to ensure that register addresses actually satisfy the specified stride. The MMIO bus ensures that the specified stride is large enough for the register size. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit f01ee60fffa4dc6c77122121233a793f7f696e67) Change-Id: I634977dcb0fe9ff95c7932e9195a2c1918eb1c18 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96510 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-15regmap: introduce fast_io busses, and use a spinlock for themStephen Warren
Some bus types have very fast IO. For these, acquiring a mutex for every IO operation is a significant overhead. Allow busses to indicate their IO is fast, and enhance regmap to use a spinlock for those busses. [Currently limited to native endian registers -- broonie] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit bacdbe077342ecc9e7b3e374cc5a41995116706a) Change-Id: I337f27a09f2b176b46e8f6d05401957a1abc0609 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96503 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-15regmap: Export regcache_sync_region()Mark Brown
regcache_sync_region() isn't going to be useful to most drivers if we don't export it since otherwise they can't use it when built modular. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit e466de05194b666114713b753e2f4be1d4200140) Change-Id: I38b12c791f0a462ebbbfbe4a6b25cfa3265ffacc Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96500 Reviewed-by: Automatic_Commit_Validation_User
2012-04-15regmap: Allow drivers to sync only part of the register cacheMark Brown
Provide a regcache_sync_region() operation which allows drivers to write only part of the cache back to the hardware. This is intended for use in cases like power domains or DSP memories where part of the device register map may be reset without fully resetting the device. Fully supporting these devices is likely to require additional work to make specific regions of the register map cache only while they are in reset, but this is enough for most devices. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 4d4cfd1656b5f6c88eae51c40741a695b108b006) Change-Id: Ia8cccf7986611485ae090e234bb68084671d7641 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96490 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-15regmap: Supply ranges to the sync operationsMark Brown
In order to allow us to support partial sync operations add minimum and maximum register arguments to the sync operation and update the rbtree and lzo caches to use this new information. The LZO implementation is obviously not good, we could exit the iteration earlier, but there may be room for more wide reaching optimisation there. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit ac8d91c801905a061ca883dca427a5e19602a1e7) Change-Id: I92ceee1c704ea7c864bff0559d36cf34554c3ba5 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96489 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-15regmap: Add tracepoints for cache only and cache bypassMark Brown
Useful for figuring out where the hardware interaction went or came from. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 5d5b7d4f80ed6e861c1c220fd57e3dad0912526e) Change-Id: Ie7c0659458a3a4a2f100d86db552c606d9da0e6b Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96488 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-15regmap: Mark the cache as clean after a successful syncMark Brown
Previously the cache would never be marked clean, meaning syncs would never be suppressed which isn't the end of the world but could be inefficient. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 6ff7373809a9b4eb644d83e2e299da297e1cbffa) Change-Id: I52aef73bc6bc0df10dd64da92d0bf591e44ddc0e Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96487 Reviewed-by: Automatic_Commit_Validation_User
2012-04-15regmap: Remove default cache sync implementationMark Brown
It's not used as all cache types have sync operations so it's just dead code which never gets tested. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit c3ec23288a92e20e0aff84a4cb6fbc7cc9bcf567) Change-Id: I3ba8c8afee9a7c945dc0a52e87c9f4a357e79308 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96486 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-15regmap: Implement support for 32 bit registers and valuesMark Brown
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 7d5e525b9ceda0e3b85da0acdaa2de19fea51edc) Change-Id: I6f6fec44b439b4916eba7f32ece1fa011e3ac021 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96480 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-05regmap: Bypassing cache when initializing cacheLaxman Dewangan
During regcache_init, if client has not passed the default data of cached register then it is directly read from the hw to initialize cache. This hw register read happens before cache ops are initialized and hence avoiding register read to check for the data available on cache or not by enabling flag of cache_bypass. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit df00c79f78d8b0ad788daf689ea461ace9d0811f) Change-Id: I4398162bd6b12689c795afe5ee02397e975e456c Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87593
2012-03-05regmap: Fix cache defaults initialization from raw cache defaultsLars-Peter Clausen
Currently registers with a value of 0 are ignored when initializing the register defaults from raw defaults. This worked in the past, because registers without a explicit default were assumed to have a default value of 0. This was changed in commit b03622a8 ("regmap: Ensure rbtree syncs registers set to zero properly"). As a result registers, which have a raw default value of 0 are now assumed to have no default. This again can result in unnecessary writes when syncing the cache. It will also result in unnecessary reads for e.g. the first update operation. In the case where readback is not possible this will even let the update operation fail, if the register has not been written to before. So this patch removes the check. Instead it adds a check to ignore raw defaults for registers which are volatile, since those registers are not cached. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@vger.kernel.org (cherry picked from commit 61cddc57dc14a5dffa0921d9a24fd68edbb374ac) Change-Id: Iccd58a95a432d222befd8b339fe0c6edd26666bb Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87592
2012-03-05regmap: Remove incorrect unreachable comment in regcache_set_val()Axel Lin
regcache_set_val() returns false if cache[idx] != val. Thus it actually is not unreachable. Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit aa795d129246cb4c973076e3242b8a2eb374f1ef) Change-Id: I83bbce848914e4648723a5c5dd0ca7f04ba0c64e Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87586
2012-03-05regmap: Bypass the cache when applying patchesMark Brown
Otherwise any patch that affects a register which is writable may trash cached values. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 8a892d6996b60c822f19ad1844eb15b96ce393c7) Change-Id: I278d4f4aa34709e2e15d0cc83238e4b419f159cb Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87580
2012-03-05regmap: Skip patch application when the cache is not dirty on syncMark Brown
On the basis that if we don't actually need to resync the cache then the patches are probably also already applied. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit d9db762708e27c2892db9d8a54e735a8e506e16e) Change-Id: I1b41ea112ae97812be6c9e2e3ea8c490e0835732 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87579
2012-03-05regmap: Unexport regcache_write() and regcache_read()Mark Brown
They have no current users which is fortunate as they don't take the lock and therefore aren't safe to use externally. We'll need to add new operations if direct cache access is needed. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 7e53b195e412a813e915843adc7e4d91868e8e94) Change-Id: I6a273d8f42fafe5f2d0f2269dd9e0253e8ac8e3f Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87578
2012-03-05regmap: Support register patch setsMark Brown
Device manufacturers frequently provide register sequences, usually not fully documented, to be run at startup in order to provide better defaults for devices (for example, improving performance in the light of silicon evaluation). Support such updates by allowing drivers to register update sets with the core. These updates will be written to the device immediately and will also be rewritten when the cache is synced. The assumption is that the reason for resyncing the cache will always be that the device has been powered off. If this turns out to not be the case then a separate operation can be provided. Currently the implementation only allows a single set of updates to be specified for a device, this could be extended in future. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 22f0d90a34827812413bb3fbeda6a2a79bb58423) Change-Id: I02f4ead9866a90b3635c4b98f1f9c3be3109c5ea Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87577
2012-03-05regmap: Add trace event for successful cache readsMark Brown
Currently we only trace physical reads, there's no instrumentation if the read is satisfied from cache. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit bc7ee55633867909bb05e71f957a4d3c1aa1b488) Change-Id: Ibbd7caff4e97b8a511f1d36b98bfdaa706ff8af4 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87572
2012-03-05regmap: Remove indexed cache typeMark Brown
There should be no situation where it offers any advantage over rbtree and there are no current users so remove the code for simplicity. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 4c691664583ef6a91f9ed0e08a75fbd30a5ffd5c) Change-Id: I58f92ec9b989b2eaaab767b4201aeb04edec50a8 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87565
2012-03-05regmap: Drop check whether a register is readable in regcache_readLars-Peter Clausen
One of the reasons for using a cache is to have a software shadow of a register which is writable but not readable. This allows us to do a read-modify-write operation on such a register. Currently regcache checks whether a register is readable when performing a cached read and returns an error if it is not. Drop this check, since it will prevent us from using the cache for registers where read-back is not possible. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit b44d48c1ccf70273a91b7d3a920b0b54c3cb314f) Change-Id: Iafe9afea14b09e69f698d71bcd1dd85695cc1ad5 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87564
2012-03-05regmap: Properly round cache_word_sizeLars-Peter Clausen
regcache currently only properly works with val bit sizes of 8 or 16, since it will, when calculating the cache word size, round down. This causes the cache storage to be too small to hold the full register value. Fix this by rounding up instead. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 064d4db11e23949c40b8a2f2f6be11c131b53932) Change-Id: Ie7f90ca33c75a86fa41d9dd4548e3de5f33f9db4 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87563
2012-03-05regmap: Make reg_config reg_defaults constLars-Peter Clausen
The reg_defaults field usually points to a static per driver array, which should not be modified. Make requirement this explicit by making reg_defaults const. To allow this the regcache_init code needs some minor changes. Previoulsy the reg_config was not available in regcache_init and regmap->reg_defaults was used to pass the default register set to regcache_init. Now that the reg_config is available we can work on it directly. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 720e4616e8fd85284ef1addd8b8d93d8415e8dbc) Change-Id: Ia56e48e948f6eaf23d0781bc8a7ea4c9d3761a98 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87560
2012-03-05regmap: Move initialization of regcache related fields to regcache_initLars-Peter Clausen
Move the initialization regcache related fields of the regmap struct to regcache_init. This allows us to keep regmap and regcache code better separated. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit e5e3b8abeda1cf45f5a079458dbc267952694c7a) Change-Id: If8bf565e163855a58a51bb5ce01967aba6d84fce Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87559
2012-03-05regmap: Fix memory leak in regcache_init error pathLars-Peter Clausen
Make sure all allocated memory gets freed again in case initializing the cache failed. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit bd061c78cabc28bb64ed79f784d24918b6bdb791) Change-Id: I3ece3442c4e1162e481c0c207b2add27a57a6676 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87556
2012-03-05regmap: Fix memory leak in regcache_hw_init error pathLars-Peter Clausen
Make sure reg_defaults_raw gets freed in case of an error. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 021cd616decb4e8a4b31f1f8c466a847e8c04e67) Change-Id: I7e9cbfa66b52197b22551e794912185dfc120ada Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87555
2012-03-05regmap: Track if the register cache is dirty and suppress unneeded syncsMark Brown
Allow drivers to optimise out the register cache sync if they didn't need to do one. If the hardware is desynced from the register cache (by power loss for example) then the driver should call regcache_mark_dirty() to let the core know about this. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 8ae0d7e8a918e9603748abe9b31984fc5d96abb3) Change-Id: If3380b73669ebaaf474cf46fdd2f4339345c66a3 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87549
2011-10-10regmap: Allow caches for devices with no defaultsMark Brown
We only really need the defaults in order to cut down the number of registers we sync and to satisfy reads while the device is powered off but not all devices are going to need to do that (always on devices like PMICs being the prime example) so don't require those devices to supply a default. Instead only try to fall back to hardware defaults if the driver told us to. Devices using LZO won't be able to instantiate with this, that will require some updates in the LZO code to handle this case. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
2011-10-10regmap: Return a sensible error code if we fail to read the cacheMark Brown
If a register isn't cached then let callers know that so they can fall back or error handle appropriately. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
2011-10-09regmap: Use bsearch() to search the register defaultsMark Brown
Rather than open coding a binary search use the standard bsearch() using the comparison function we're already using for sort() on insert. This fixes a lockup I was observing due to iterating on min <= max rather than min < max when we fail to look up. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
2011-10-03regmap: Fix doc commentDimitris Papastamos
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-10-03regmap: Optimize the lookup path to use binary searchDimitris Papastamos
Since there are more lookups than insertions in a typical scenario, optimize the linear search into a binary search. For this to work, we need to keep reg_defaults sorted upon insertions, for now be lazy and use sort(). Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-30regmap: Ensure we scream if we enable cache bypass/only at the same timeDimitris Papastamos
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-30regmap: Implement regcache_cache_bypass helper functionDimitris Papastamos
Ensure we've got a function so users can enable/disable the cache bypass option. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-30regmap: Save/restore the bypass state upon syncingDimitris Papastamos
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-30regmap: Lock the sync path, ensure we use the lockless _regmap_write()Dimitris Papastamos
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-30regmap: Fix apostrophe usageMark Brown
An apostrophe does not mean "look out, here comes an s!". Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-29regmap: Fix lock used for regcache_cache_only()Mark Brown
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-28regmap: Grab the lock in regcache_cache_only()Dimitris Papastamos
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-28regmap: Modify map->cache_bypass directlyDimitris Papastamos
In preperation for the upcoming patches, modify map->cache_bypass directly. The helper functions will grab an exclusive lock. Because we'll have acquired the same lock we need to avoid a deadlock. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-28regmap: Fix regcache_sync generic implementationDimitris Papastamos
We want to use regmap_write() to actually write anything to the HW. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-27regmap: Implement generic syncing functionalityDimitris Papastamos
In the absence of a sync callback, do it manually. This of course can't take advantange of the specific optimizations of each cache type but it will do well enough in most cases. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-19regmap: Allow drivers to control cache_only flagMark Brown
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-19regmap: A cache type of _NONE behaves like a bypassed cacheMark Brown
Avoid extra special casing by setting the cache_bypass flag when we're not caching. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-19regmap: Add the regcache_sync trace eventDimitris Papastamos
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-19regmap: Add the LZO cache supportDimitris Papastamos
This patch adds support for LZO compression when storing the register cache. For a typical device whose register map would normally occupy 25kB or 50kB by using the LZO compression technique, one can get down to ~5-7kB. There might be a performance penalty associated with each individual read/write due to decompressing/compressing the underlying cache, however that should not be noticeable. These memory benefits depend on whether the target architecture can get rid of the memory occupied by the original register defaults cache which is marked as __devinitconst. Nevertheless there will be some memory gain even if the target architecture can't get rid of the original register map, this should be around ~30-32kB instead of 50kB. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-19regmap: Add the rbtree cache supportDimitris Papastamos
This patch adds support for the rbtree cache compression type. Each rbnode manages a variable length block of registers. There can be no two nodes with overlapping blocks. Each block has a base register and a currently top register, all the other registers, if any, lie in between these two and in ascending order. The reasoning behind the construction of this rbtree is simple. In the snd_soc_rbtree_cache_init() function, we iterate over the register defaults provided by the regcache core. For each register value that is non-zero we insert it in the rbtree. In order to determine in which rbnode we need to add the register, we first look if there is another register already added that is adjacent to the one we are about to add. If that is the case we append it in that rbnode block, otherwise we create a new rbnode with a single register in its block and add it to the tree. There are various optimizations across the implementation to speed up lookups by caching the most recently used rbnode. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Tested-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-19regmap: Add the indexed cache supportDimitris Papastamos
This is the simplest form of a cache available in regcache. Any registers whose default value is 0 are ignored. If any of those registers are modified in the future, they will be placed in the cache on demand. The cache layout is essentially using the provided register defaults by the regcache core directly and does not re-map it to another representation. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-19regmap: Introduce caching supportDimitris Papastamos
This patch introduces caching support for regmap. The regcache API has evolved essentially out of ASoC soc-cache so most of the actual caching types (except LZO) have been tested in the past. The purpose of regcache is to optimize in time and space the handling of register caches. Time optimization is achieved by not having to go over a slow bus like I2C to read the value of a register, instead it is cached locally in memory and can be retrieved faster. Regarding space optimization, some of the cache types are better at packing the caches, for e.g. the rbtree and the LZO caches. By doing this the sacrifice in time still wins over doing I2C transactions. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Tested-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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