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path: root/drivers/clk/sunxi
AgeCommit message (Expand)Author
2013-09-29clk: sunxi: declare OF clock providerSebastian Hesselbarth
2013-08-27clk: sunxi: Fix incorrect placement of __initconstSachin Kamat
2013-08-26clk: sunxi: Add Allwinner A20 gatesMaxime Ripard
2013-08-26clk: sunxi: Add A31 clocks supportMaxime Ripard
2013-08-26clk: sunxi: Allow to specify the divider width from the dividers dataMaxime Ripard
2013-08-26clk: sunxi: Rename the structure to prepare the addition of sun6iMaxime Ripard
2013-08-26clk: sunxi: fix initialization of basic clocksEmilio López
2013-08-26clk: sunxi: Add A10s gatesMaxime Ripard
2013-08-19clk: add CLK_SET_RATE_NO_REPARENT flagJames Hogan
2013-08-08clk: sunxi: Fix checking return value of clk_register_[composite|factors]Axel Lin
2013-05-29clk: sunxi: "cpu_data" is defined in header files of some architecturesGiacomo A. Catenazzi
2013-05-28clk: sun5i: Add compatibles for Allwinner A13Maxime Ripard
2013-04-12clk: sunxi: Unify oscillator clockEmilio López
2013-04-04clk: sunxi: drop an unnecesary kmallocEmilio López
2013-04-04clk: sunxi: drop CLK_IGNORE_UNUSEDEmilio López
2013-04-04clk: sunxi: Add support for AXI, AHB, APB0 and APB1 gatesEmilio López
2013-03-27clk: sunxi: rename compatible stringsEmilio López
2013-03-27clk: arm: sunxi: Add a new clock driver for sunxi SOCsEmilio López
generated by cgit v1.2.3 (git 2.0.4) at 2024-11-14 13:39:27 +0000