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path: root/drivers/clk
AgeCommit message (Expand)Author
2018-09-26clk: imx6ul: fix missing of_node_put()Nicholas Mc Guire
2018-07-25clk: tegra: Fix PLL_U post divider and initial rate on Tegra30Lucas Stach
2018-05-30clk: samsung: exynos3250: Fix PLL ratesAndrzej Hajda
2018-05-30clk: samsung: exynos5250: Fix PLL ratesAndrzej Hajda
2018-05-30clk: samsung: exynos5433: Fix PLL ratesAndrzej Hajda
2018-05-30clk: samsung: exynos5260: Fix PLL ratesAndrzej Hajda
2018-05-30clk: samsung: s3c2410: Fix PLL ratesAndrzej Hajda
2018-05-30clk: rockchip: Prevent calculating mmc phase if clock rate is zeroShawn Lin
2018-05-30clk: Don't show the incorrect clock phaseShawn Lin
2018-04-24clk: bcm2835: De-assert/assert PLL reset signal when appropriateBoris Brezillon
2018-04-24clk: mvebu: armada-38x: add support for missing clocksRichard Genoud
2018-04-24clk: mvebu: armada-38x: add support for 1866MHz variantsRalph Sennhauser
2018-04-13clk: Fix __set_clk_rates error print-stringBryan O'Donoghue
2018-04-13clk: scpi: fix return type of __scpi_dvfs_round_rateSudeep Holla
2018-03-28clk: bcm2835: Protect sections updating shared registersBoris Brezillon
2018-03-24clk: si5351: Rename internal plls to avoid name collisionsSergej Sawazki
2018-03-24clk: ns2: Correct SDIO bitsBharat Kumar Reddy Gooty
2018-03-22clk: qcom: msm8916: fix mnd_width for codec_digcodecSrinivas Kandagatla
2017-12-20clk: tegra: Fix cclk_lp divisor registerMichał Mirosław
2017-12-20clk: imx6: refine hdmi_isfr's parent to make HDMI work on i.MX6 SoCs w/o VPUSébastien Szymanski
2017-12-20clk: mediatek: add the option for determining PLL source clockChen Zhong
2017-11-30clk: ti: dra7-atl-clock: fix child-node lookupsJohan Hovold
2017-11-30clk: ti: dra7-atl-clock: Fix of_node reference countingPeter Ujfalusi
2017-05-14clk: Make x86/ conditional on CONFIG_COMMON_CLKPierre-Louis Bossart
2017-05-02clk: sunxi: Add apb0 gates for H3Krzysztof Adamski
2017-01-12clk: imx31: fix rewritten input argument of mx31_clocks_init()Vladimir Zapolskiy
2017-01-12clk: clk-wm831x: fix a logic errorPan Bian
2017-01-09clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clkBoris Brezillon
2017-01-06clk: ti: omap36xx: Work around sprz319 advisory 2.1Richard Watts
2016-11-26clk: mmp: mmp2: fix return value check in mmp2_clk_init()Wei Yongjun
2016-11-26clk: mmp: pxa168: fix return value check in pxa168_clk_init()Wei Yongjun
2016-11-26clk: mmp: pxa910: fix return value check in pxa910_clk_init()Wei Yongjun
2016-11-18clk: qoriq: Don't allow CPU clocks higher than starting valueScott Wood
2016-10-31clk: divider: Fix clk_divider_round_rate() to use clk_readl()Geert Uytterhoeven
2016-10-31clk: qoriq: fix a register offset errorTang Yuantian
2016-10-31ARM: clk-imx35: fix name for ckil clkUwe Kleine-König
2016-10-28clk: imx6: initialize GPU clocksLucas Stach
2016-10-07clk: xgene: Add missing parenthesis when clearing divider valueLoc Ho
2016-09-15clk: xgene: Fix divider with non-zero shift valueLoc Ho
2016-08-10clk: rockchip: initialize flags of clk_init_data in mmc-phase clockHeiko Stuebner
2016-06-07clk: bcm2835: divider value has to be 1 or moreMartin Sperl
2016-06-07clk: bcm2835: pll_off should only update CM_PLL_ANARSTMartin Sperl
2016-06-07clk: at91: fix check of clk_register() returned valueVladimir Zapolskiy
2016-06-07clk: bcm2835: Fix PLL poweronEric Anholt
2016-06-07ARM: dts: imx35: restore existing used clock enumerationAlexander Kurz
2016-06-01clk: bcm2835: add locking to pll*_on/off methodsMartin Sperl
2016-06-01clk: qcom: msm8916: Fix crypto clock flagsAndy Gross
2016-05-11clk: qcom: msm8960: Fix ce3_src register offsetStephen Boyd
2016-05-11clk: versatile: sp810: support reentranceLinus Walleij
2016-05-11clk: qcom: msm8960: fix ce3_core clk enable registerSrinivas Kandagatla