Age | Commit message (Collapse) | Author |
|
- Add compilation flag to treat warning as error
bug 949219
Change-Id: Ie5b8eb8ebb3ca37ac111fb0acc64cd8667e2c8e1
Signed-off-by: schowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/118079
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
|
|
Because SE interrupts could be enabled in bootloader, if it's not
cleared before jumping into kernel, it continues to assert the
interrupt line to interrupt controller. When SE interrupts is
enabled in kernel, to access SE registers in IST without clock
enabled hung the CPU. To fix this issue, interrupt enabling is
moved after clock is enabled.
bug 1010334
Change-Id: I1b909efce2c9d92c3112039fc217f7c1360f9bbb
Reviewed-on: http://git-master/r/113073
(cherry picked from commit b06e6662f738ad01a3b2b6803db654abaa03385e)
Signed-off-by: Victor(Weiguo) Pan <wpan@nvidia.com>
Change-Id: Ide4b0295c781e0bba7aa071616e3e6160e44ee76
Reviewed-on: http://git-master/r/114064
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
- Using the dma sync apis to keep coherency.
bug 984039
Change-Id: I9e389d2679f05c519ae4a51462247b7efeae01ca
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/111612
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
|
|
- Correcting the size of the dma buffer allocated for the key table.
Change-Id: I34c0d0554710219021cb534e61a558cf217ccc19
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/111577
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
Use sg_next to get next sg
Bug 958431
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Change-Id: I14aa7c9c551d0230b9c5b681a2699dd5355d0a6d
Reviewed-on: http://git-master/r/98449
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Multiple queue were getting scheduled leading to race condition.
Bug 955259
Change-Id: I7dd8d0d15b17552c3a611449642439ae21fa4b5d
Signed-off-by: Amit Kamath <akamath@nvidia.com>
Reviewed-on: http://git-master/r/93097
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Gerrit_Virtual_Submit
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
Save the key in hardware when the key setting call comes. Currently it is
set at later time.
Bug 917607
Change-Id: Ibdacb07c16c161eeba00eda6716884518e40c40a
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/90072
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
Added check for valid requested process buffer size.
Bug 928454
Change-Id: I2dc389af64cb3de2f0a0a3f0bbc5057dd9bd676c
Reviewed-on: http://git-master/r/89381
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Should have been "GPL v2", not "GPLv2".
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Change-Id: I7b4669c023c48e1080de7f87ed7166dc9b47884a
Reviewed-on: http://git-master/r/88101
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
Bug 917607
Change-Id: I049ca03efe7953dc6a6c03eaa4acce85e15662d1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/76154
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
|
|
Bug 917607
Change-Id: I6036b12456d3b5fb22f479a9e0eefd500cb6c059
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/76153
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
|
|
Bug 917607
Change-Id: I7497411932b6ba8c155026f1662063e87c21eb40
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/74012
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
|
|
Fixed the case where SG buffer length is more than actual number
of bytes to process.
Bug 922857
Change-Id: I8445d8ae74b8fc6c964c19523fcd731f7ba4bd37
Reviewed-on: http://git-master/r/75701
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/75891
Reviewed-by: Automatic_Commit_Validation_User
|
|
RNG support for less than 16 Bytes and or not a multiple of
16 Bytes.
Bug 893463
Change-Id: I37fff0f90004dd3116b621c5aa956cebbd6a085a
Reviewed-on: http://git-master/r/74263
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Venkata Jagadish <vjagadish@nvidia.com>
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-on: http://git-master/r/74559
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Venkata Jagadish <vjagadish@nvidia.com>
|
|
- Workqueue of tegra-se does not need to be CPU bound
Bug 911397
Change-Id: I8786e8574cf3ec2e33b3869de8c8be3f0939e13f
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/71527
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
|
|
Check for valid key size before setting the key.
Bug 915210
Change-Id: I081e2af9505ea89719d447b4b0ca2b0177860d09
Reviewed-on: http://git-master/r/70046
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
store the keys in the individual request context structure,
since there is no other way to manage keys across different
crypto operations. also retry requests thrice in case of
errors
Reviewed-on: http://git-master/r/40008
(cherry picked from commit 5437e3230679fbc6e342f7e6787e3cc1692e5df6)
Change-Id: Iba23e20371661c8732995d13774cf3dbba6e24b4
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
Conflicts:
arch/arm/Kconfig
Change-Id: If8aaaf3efcbbf6c9017b38efb6d76ef933f147fa
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
commit 274252862f386b7868f35bf5ceaa5391a8ccfdf3 upstream.
This was broken by commit 7759995c75ae0cbd4c861582908449f6b6208e7a (yes,
myself). The basic problem here is since the digest state is only saved
after the last chunk, the state array is only valid when handling the
first chunk of the next buffer. Broken since linux-3.0.
Signed-off-by: Phil Sutter <phil.sutter@viprinet.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
In platform_pm_suspend, if there's a dev->driver->pm struct,
it expects the suspend routine to be filled in there.
With a pm struct, it won't use the platform_legacy_suspend
path, which is how tegra_se_suspend had been hooked up. This
change just moves suspend/resume into the pm ops struct.
Bug 883391
Change-Id: Iee8245676ba104d2e4cc0f2f2ffe406674cb1d5b
Signed-off-by: Chris Johnson <cwj@nvidia.com>
Reviewed-on: http://git-master/r/67989
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
- Suspension of the device does not need to happen immediately
Bug 904152
Change-Id: I900f79faf85c5aca95b67b1284be18d89f36d3a9
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/68318
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
|
|
Problem description:
- runtime_idle is called even if the device is being used
as it is called without a lock
- This happens when power.usage_count is incremented during rpm_idle
- In case runtime_idle is called when the device is being used, write
to the bus can happen with clock disabled
Fix description:
- Instead of disabling clock on runtime_idle, disable on runtime_suspend
Bug 904152
Change-Id: I1489c62a0c8cfd84eca788d53d2013487fb7f737
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/68293
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
|
|
These changes have no effect if CONFIG_GCOV_KERNEL is not set in
defconfig. It is easier to trigger GCOV for kernel if this patch
is in by only setting the before mentioned flag.
Change-Id: I8aade309da2da62c4b3889bd84e4123ba8f182da
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/62999
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Rebase-Id: R4c238f707f1db600f188ae83426336753992b7be
|
|
Change-Id: I9d03b3a6876b858983739c5e8d8a166a08fb2d78
Signed-off-by: Colin Patrick McCabe <cmccabe@nvidia.com>
Reviewed-on: http://git-master/r/59170
Reviewed-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R73da0f98f4e0d9912ff37cd9faebf06ef11e7bef
|
|
bug 886813
Change-Id: Ia016c0f783b0396d8433b202ccef1659d10085f5
Reviewed-on: http://git-master/r/57850
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Rebase-Id: R5a13865e200c1345bc30ab86b8d3286d47af5796
|
|
To prevent unauthorized access to keys loaded into key
slots in Security engine, disabled read access for all
key slots.
Bug 868040
Original-Change-Id: I01229ff9a523192a041b7fab94ed154a65ee15e5
Reviewed-on: http://git-master/r/48998
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Rebase-Id: Rc625e9ea7b76ba35bfd1de30c1c2d800f93d9c93
|
|
tegra-aes driver can also be used on tegra3.
Original-Change-Id: Ic0d5e705abfefea9b43d64a9a85d748df189abc9
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/47720
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R790a786e22b3c6a4d0339971419d2be03ed2e272
|
|
Added support for generating RNG for more than 16 bytes.
Bug 861777
Original-Change-Id: I414063378c1b7c31c9ef2ade950adcaa4e7db388
Reviewed-on: http://git-master/r/46066
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Rebase-Id: Ra4ff01903b00f98b317606be3ffdfef58668aa92
|
|
Added LP context save support in Security Engine
Bug 855476
Original-Change-Id: I384f3adcacd9e94325d40cd98d1c96a98e01aee5
Reviewed-on: http://git-master/r/44810
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Rebase-Id: R5d891e6908a2e5f6206c7c509d7d0585b1522aee
|
|
support to use ssk for some special encrypt
decrypt operations. algo names changed to match
the ones accessed by /dev/tegra-crypto
Bug 850434
Original-Change-Id: I8f13ae1fd15ffeae4aceee5799552d173560479a
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/41012
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Rebase-Id: R86620bd834ae7740377f43c285ba86aee74bb4cc
|
|
Changed dev_err to pr_err because 'dd' can be NULL.
Added NULL checking before clock disable of engine->pclk
Reviewed-on: http://git-master/r/37857
(cherry picked from commit 851ffd0a30cbe67a5033a9792825b319f0bcd7ed)
Original-Change-Id: If5a2bbd550f3dc038b42d8a185647d02df9cb593
Reviewed-on: http://git-master/r/38446
Tested-by: Jubeom Kim <jubeomk@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R57fa4ce4a2e95d80813448ad5234fb9bdf74faf1
|
|
instead of checking for NULL, IS_ERR() should
be used to check the validity of a clock handle
Reviewed-on: http://git-master/r/#change,35619
(cherry picked from commit cfb16f57d0a846dba4cd5d6a87c05dcb8efd188d)
Change-Id: If844a166deabc7e67c9af69e4d05f59757773895
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/36218
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R9a6137402ee132e6b4c1a38ab5d51a3acb035a28
|
|
- get some basic struct definitions from the header to
the .c file
- read SE config register before disabling the clock.
there are scenarios seen where some write transactions
are not posted before we disable clock. a dummy SE
register read fixes that issue.
Bug 835859
Original-Change-Id: I5e09c13262dbc392cac233a1fb6d69240b3460f2
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/35636
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R8a7380e843db8dd8fda379b9d0a2c4270d1bd40b
|
|
- reset intr_status if error occur while encrypt/decrypt
- rename iram variables to _phys and _virt
- use bsea for rng
- remove unwanted macros from the header file
Bug 833165
Reviewed-on: http://git-master/r/#change,34552
(cherry picked from commit 4f2f0431fe196829c8ec61ab10ed5cb2ea6b5038)
Original-Change-Id: I76f221bde1e5fdb331b9b75f826c822bd3246e14
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/35194
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Ra044f128c66a8591c9d6ed29725c167334efd05d
|
|
* set bsea sclk to ulong_max
* use unbounded work queues with 1 max_active
work item on each of them
* clear INTR_STATUS per operation
* free nvmap handle after using it
Bug 803932
Reviewed-on: http://git-master/r/#change,30196
(cherry picked from commit b0f6c074aab8a9f3bddec4a204b618180df630db)
Original-Change-Id: Ica9d702db9a247110d0639c64ab65672f02d7451
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/31936
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R5a51f9a8f7133a7e08f6544bbee581e30b46c6b5
|
|
Added support for Security Engine.
Following HW features are supported:
CBC,ECB,CTR,OFB,SHA1,SHA224,SHA384,SHA512 and AES-CMAC
Original-Change-Id: Ic45c29add689f55be68966d333d1cb7cdb378353
Reviewed-on: http://git-master/r/29950
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R57f92020a7a713f624afe3b1d42da489bf89daba
|
|
* add bsea engine support for encryption and decryption
* add arbitration semaphore id for bsea
Bug 803932
Original change: http://git-master/r/#change,29672
(cherry picked from commit 0008cdb0f38d0cd0c074671fc067c4321f340b06)
Original-Change-Id: I59fcaab29c47a8b42e7470b30486851cfe90848f
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/30190
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R6f1bf287860a24d0a535e49f516581b31092d182
|
|
Original-Change-Id: I158d2be97c795313e7e74ce9fb4ec0bdc7d95496
Reviewed-on: http://git-master/r/27559
Tested-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Hiro Sugawara <hsugawara@nvidia.com>
Reviewed-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: I0ff198daa548ed2837f7fb1794013bf0adf7e5a1
Rebase-Id: R46eb4226a3d37331db92f05d1a6e1c8e45f682a2
|
|
Original-Change-Id: I2ffeaf6f8dfeb279b40ca6f69f6c9157401a746a
Rebase-Id: Rb4bacf7db8c96e1865380466ef7eca71d72d08bc
|
|
Bug 787628
Original-Change-Id: I73c3b8f0b3e69f1c4bc13bdaea84b19b14eb73d1
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/28003
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rdf987e66c66135392489bd73ca16429d4d05d636
|
|
clients call the algorithm's close api, which
results in the algo's cra_exit getting called, when
they are done using the hardware. we need to free the
key slot which was being used by the client when its
cra_exit is called.
Original-Change-Id: Ib42d445f5068c4ea1ef6b3edbbc547fe9eeef583
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/24673
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R8676bc01e6930c3164f8cc22d96023e0aeb44a3e
|
|
Original-Change-Id: I7d8fe24ab5aa914fc2753f256eec261fcbf746bc
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/22594
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Re4de8ecdfd6507cad5e0196882326d00f5ae79e0
|
|
This reverts commit 8bc4f710e981d53a9bd161c6c054241231e09149.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Original-Change-Id: I0497afd3ec54e7b835de37e9941b2418e3dad4e3
Reviewed-on: http://git-master/r/22963
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Rf393b9a6102e4550c44bc538ccc541879890f924
|
|
This reverts commit a8dbfda58a6980976de60ba46f22a5f0b2ecab5f.
Original-Change-Id: I70407c45cc5605ad9924a5a1145e18371dc9d2ef
Reviewed-on: http://git-master/r/22554
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rdfc2a43ce9137e1a7ff81b78868c2e48f91f1b02
|
|
- set the key only at the start of encrypt/decrypt operations
- avoid using mutex in handle_req, since it is already serialised
- sanity checks while setting the iv
Original-Change-Id: I026e138f59d661cd705db6820bed63e5e15f02c5
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/22162
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R11bd949802ebf158b87b8705aab5271c27da844b
|
|
ssk slot is write-locked so the driver should not
track in its free slot pool.
Original-Change-Id: Ibf04a949a2894ef2c41851e7e92c13901c873bf2
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/22161
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R7ae05f50294e8a7f0241296aee53cda57aa36a5f
|
|
Original-Change-Id: I41ba8dfc193b346eda522eadfb0f9035f4d838f8
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/22160
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R8351adfba377ede436f101194551e8091aa5528b
|
|
Change-Id: I69731fcd50933ccea73542d046c3c5d86d03fcd9
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
The hardware aes engine is required for key management for
HDCP, but since it's performance is bad, we don't want it
enabled for dm-crypt. This hack changes the cra_name field
so dm-crypt won't find a match, but leaves the cra_driver_name
field unchanged to the device file interface will still find it.
Signed-off-by: Ken Sumrall <ksumrall@android.com>
|
|
- enable/disable clocks only once per request
- create a thread for handling the driver's work queue
- always set vde clocks to the max before processing a request
Change-Id: I935e5523e9e913c93705cc694f8a475d212c15ce
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|