Age | Commit message (Collapse) | Author |
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If there's no dependency, build will be broken when do
`make ARCH=arm CROSS_COMPILE=<cross-compiler path> allmodconfig'
`make'
because PXP module will be turned on. This patch fixed it.
Signed-off-by: Robby Cai <R63905@freescale.com>
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add ePxP v2 DMAENGINE driver
Signed-off-by: Robby Cai <R63905@freescale.com>
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enable the mxs-dma for mx6q.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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[1] Background :
The GPMI does ECC read page operation with a DMA chain consist of three DMA
Command Structures. The middle one of the chain is used to enable the BCH,
and read out the NAND page.
The WAIT4END(wait for command end) is a comunication signal between
the GPMI and MXS-DMA.
[2] The current DMA code sets the WAIT4END bit at the last one, such as:
+-----+ +-----+ +-----+
| cmd | ------------> | cmd | ------------------> | cmd |
+-----+ +-----+ +-----+
^
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set WAIT4END here
This chain works fine in the mx23/mx28.
[3] But in the new GPMI version (used in MX50/MX60), the WAIT4END bit should
be set not only at the last DMA Command Structure,
but also at the middle one, such as:
+-----+ +-----+ +-----+
| cmd | ------------> | cmd | ------------------> | cmd |
+-----+ +-----+ +-----+
^ ^
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set WAIT4END here too set WAIT4END here
If we do not set WAIT4END, the BCH maybe stalls in "ECC reading page" state.
In the next ECC write page operation, a DMA-timeout occurs.
This has been catched in the MX6Q board.
[4] In order to fix the bug, rewrite the last parameter of
mxs_dma_prep_slave_sg(), and use the dma_ctrl_flags:
---------------------------------------------------------
DMA_PREP_INTERRUPT : append a new DMA Command Structrue.
DMA_CTRL_ACK : set the WAIT4END bit for this DMA Command Structure.
---------------------------------------------------------
[5] changes to the relative drivers:
For gpmi-nand driver: use the new flags.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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use the new header : mxs-dma.h.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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The patch converts mxs-dma driver to clk_prepare/clk_unprepare by
using helper functions clk_prepare_enable/clk_disable_unprepare.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Vinod Koul <vinod.koul@linux.intel.com>
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This is how the original Freescale code (unintentionally) worked,
because the code path which would have asserted the CLKGATE bit was
never actually reached in their code.
This fixes the nefarious "DMA timout" bug when multiple DMA channels
(e.g. GPMI NAND and MMC) are used at the same time.
If a better fix for this problem should be found, the clkgate handling
could be reinstated.
See http://lists.infradead.org/pipermail/linux-arm-kernel/2011-September/065228.html
Also reverse the order of mxs_dma_disable_chan() and
mxs_dma_reset_chan() in mxs_dma_control() because mxs_dma_reset_chan()
can only work when the DMA channel is enabled.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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Using a static variable for counting the number of CCWs attached to
a DMA channel when appending a new descriptor is not multi user safe.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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There is no need to have the clock enabled all the time the driver is
loaded.
It will be enabled anyway in mxs_dma_alloc_chan_resources() when a
channel is actually going to be used.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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fixup usage of dma direction by introducing dma_transfer_direction,
this patch moves dma/drivers/* to use new enum
Cc: Jassi Brar <jaswinder.singh@linaro.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Viresh Kumar <viresh.kumar@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Mika Westerberg <mika.westerberg@iki.fi>
Cc: H Hartley Sweeten <hartleys@visionengravers.com>
Cc: Li Yang <leoli@freescale.com>
Cc: Zhang Wei <zw@zh-kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Yong Wang <yong.y.wang@intel.com>
Cc: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com>
Cc: Boojin Kim <boojin.kim@samsung.com>
Cc: Barry Song <Baohua.Song@csr.com>
Acked-by: Mika Westerberg <mika.westerberg@iki.fi>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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Before dma_transfer_direction was introduced to replace
dma_data_direction, some dmaengine device uses DMA_NONE of
dma_data_direction for some talk with its client drivers.
The mxs-dma and its clients mxs-mmc and gpmi-nand are such case.
This patch adds DMA_TRANS_NONE to dma_transfer_direction and
migrate the DMA_NONE use in mxs-dma to it.
It also fixes the compile warning below.
CC drivers/dma/mxs-dma.o
drivers/dma/mxs-dma.c: In function ‘mxs_dma_prep_slave_sg’:
drivers/dma/mxs-dma.c:420:16: warning: comparison between ‘enum dma_transfer_direction’ and ‘enum dma_data_direction’
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually).
To prevent mm.h inclusion via other channels also extract "enum dma_data_direction"
definition into separate header. This tiny piece is what gluing netdevice.h with mm.h
via "netdevice.h => dmaengine.h => dma-mapping.h => scatterlist.h => mm.h".
Removal of mm.h from scatterlist.h was tried and was found not feasible
on most archs, so the link was cutoff earlier.
Hope people are OK with tiny include file.
Note, that mm_types.h is still dragged in, but it is a separate story.
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This reverts commit 6257fa54c1c66de2c9f72172895ea7e0e3c0845c.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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This reverts commit ab11e98c15ecb29eaf93114cb928478c98d637e9.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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This reverts commit a1a43335ccbf5578eb48edbf16c11e53d76c0123.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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For a long DMA chain which may have more then two DMA Command Structures,
the current DMA code sets the WAIT4END bit at the last one, such as:
+-----+ +-----+ +-----+
| cmd | ------------> | cmd | ------------------> | cmd |
+-----+ +-----+ +-----+
^
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set WAIT4END here
But in the NAND ECC read case, the WAIT4END bit should be set
not only at the last DMA Command Structure, but also at the middle one,
such as:
+-----+ +-----+ +-----+
| cmd | ------------> | cmd | ------------------> | cmd |
+-----+ +-----+ +-----+
^ ^
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set WAIT4END here too set WAIT4END here
We set the WAIT4END in the middle DMA Command Structure to ensure
the BCH module finishs its job. If we do not wait in this situation,
the BCH module may be changed in the following DMA Command Structures,
and it maybe becomes unstable which will cause a DMA timeout
This has been catched in the MX6Q board.
So rewrite the last parameter of mxs_dma_prep_slave_sg().
Add some more flags to let the driver sets the WAIT4END as it needs.
Acked-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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After calling mxs_dma_disable_chan() for a channel, that channel
becomes unusable because some controller registers can only be written
when the clock is enabled via CLKGATE.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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We met some channels in abnormal state after disable.
Reset it to get a clean state.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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In general, the mxs-dma users get separate irq for each channel,
but gpmi is special one which has only one irq shared by all gpmi
channels. It causes mxs_dma channel allocation function fail for
all other gpmi channels except the first one calling into the
function.
The patch gets request_irq call skipped for NO_IRQ case, and leaves
this gpmi specific quirk to gpmi driver to sort out. It will fix
above problem if gpmi driver sets chan_irq as gpmi irq for only one
channel and NO_IRQ for all the rest channels.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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When we use the SDMA in the UART driver(such as imx6q), we will
meet one situation:
Assume we set 64 bytes for the RX DMA buffer.
The receiving DMA buffer has received some data, but not full.
An Aging DMA request will be received by the SDMA controller if we enable the
IDDMAEN(UCR4[6]) in this case.
So the UART driver needs to know the count of the real received bytes,
and push them to upper layer.
Add two new fields to sdmac, and update the `residue` in sdma_tx_status().
Signed-off-by: Huang Shijie <b32955@freescale.com>
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When SDMA is not used, close SDMA clock.
Signed-off-by: Gary Zhang <b13634@freescale.com>
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- Add support for 8-bit grayscale colormaps to be used
during EPDC update processing
- Add support in PxP for programming of colormaps
Signed-off-by: Danny Nold <dannynold@freescale.com>
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New sdma driver in 2.6.38 kernel not map event to channel correctly by
ignore events bigger than 32.
Fix it by remove this restriction
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
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add the dma support for imx6q.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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The asrc_2_mcu script is not supported well by this driver.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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MX6Q desclare dma memory bufferable, which cause sdma
load context failed in 60% possibility.
To fix it, we need to add dsb to flush write buffer before
start dma transfer.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
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Add sdma support for mx6q.
add mx6 dependency for sdma, and add sdma mx6 firmware.
Note: firmware not release by owner, this version only for test.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
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- Add drivers/dma/pxp and all PxP driver files within
Signed-off-by: Danny Nold <dannynold@freescale.com>
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add the DMA driver for mx50.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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In very seldom, play audio will caused system hangs in 2.6.38 kernel.
This is caused by new sdma driver wrongly enable irq after enable channel.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
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Linux 2.6.38 kernel bootup slow, it stopped at sdma firmware
loading for about one minute.
It is caused by firmware store on rootfs lib/firmware directory,
while sdma initialization happens before rootfs mounted.
To fix it, we have to build firmware in kernel image.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
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Fix the recently added SH_DMAC_MAX_CHANNELS handling code in
300e5f9 dmaengine: shdma: Fix SH_DMAC_MAX_CHANNELS handling
Without this fix the shdma driver outputs silly messages in
case SH_DMAC_MAX_CHANNELS happens to match the platform data:
sh-dma-engine sh-dma-engine.0: Attempting to register 20 DMA channels when a max
imum of 20 are supported.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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A recent patch has introduced a regression, where repeating a memcpy
DMA test with shdma module unloading between them skips the DMA channel
configuration. Fix this regression by always configuring the channel
during its allocation.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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The runtime PM changes introduce sh_dmae_rst() wrapping via the
runtime_resume helper, depending on dev_get_drvdata() to fetch the
platform data needed for the DMAOR initialization default at a time
where drvdata hasn't yet been established by the probe path, resulting
in general probe misery:
Unable to handle kernel NULL pointer dereference at virtual address 000000c4
pc = 8025adee
*pde = 00000000
Oops: 0000 [#1]
Modules linked in:
Pid : 1, Comm: swapper
CPU : 0 Not tainted (3.0.0-rc1-00012-g9436b4a-dirty #1456)
PC is at sh_dmae_rst+0x28/0x86
PR is at sh_dmae_rst+0x22/0x86
PC : 8025adee SP : 9e803d10 SR : 400080f1 TEA : 000000c4
R0 : 000000c4 R1 : 0000fff8 R2 : 00000000 R3 : 00000040
R4 : 000000f0 R5 : 00000000 R6 : 00000000 R7 : 804f184c
R8 : 00000000 R9 : 804dd0e8 R10 : 80283204 R11 : ffffffda
R12 : 000000a0 R13 : 804dd18c R14 : 9e803d10
MACH: 00000000 MACL: 00008f20 GBR : 00000000 PR : 8025ade8
Call trace:
[<8025ae70>] sh_dmae_runtime_resume+0x24/0x34
[<80283238>] pm_generic_runtime_resume+0x34/0x3c
[<80283370>] rpm_callback+0x4a/0x7e
[<80283efc>] rpm_resume+0x240/0x384
[<80283f54>] rpm_resume+0x298/0x384
[<8028428c>] __pm_runtime_resume+0x44/0x7c
[<8038a358>] __ioremap_caller+0x0/0xec
[<80284296>] __pm_runtime_resume+0x4e/0x7c
[<8038a358>] __ioremap_caller+0x0/0xec
[<80666254>] sh_dmae_probe+0x180/0x6a0
[<802803ae>] platform_drv_probe+0x26/0x2e
Fix up the ordering accordingly.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (33 commits)
x86: poll waiting for I/OAT DMA channel status
maintainers: add dma engine tree details
dmaengine: add TODO items for future work on dma drivers
dmaengine: Add API documentation for slave dma usage
dmaengine/dw_dmac: Update maintainer-ship
dmaengine: move link order
dmaengine/dw_dmac: implement pause and resume in dwc_control
dmaengine/dw_dmac: Replace spin_lock* with irqsave variants and enable submission from callback
dmaengine/dw_dmac: Divide one sg to many desc, if sg len is greater than DWC_MAX_COUNT
dmaengine/dw_dmac: set residue as total len in dwc_tx_status if status is !DMA_SUCCESS
dmaengine/dw_dmac: don't call callback routine in case dmaengine_terminate_all() is called
dmaengine: at_hdmac: pause: no need to wait for FIFO empty
pch_dma: modify pci device table definition
pch_dma: Support new device ML7223 IOH
pch_dma: Support I2S for ML7213 IOH
pch_dma: Fix DMA setting issue
pch_dma: modify for checkpatch
pch_dma: fix dma direction issue for ML7213 IOH video-in
dmaengine: at_hdmac: use descriptor chaining help function
dmaengine: at_hdmac: implement pause and resume in atc_control
...
Fix up trivial conflict in drivers/dma/dw_dmac.c
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For certain system configurations a 5 usec udelay before checking I/OAT DMA
channel status is sometimes not sufficient, resulting in a false failure
status and unnecessary freeing of channel resources. Conversely, for many
configurations 5 usec is longer than necessary.
Loop for up to 20 usec waiting for successful status before failing.
Signed-off-by: Dimitri Sivanich <sivanich@sgi.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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With the addition of a device platform mfd_cell pointer, MFD drivers
can go back to passing platform data back to their sub drivers.
This allows for an mfd_cell->mfd_data removal and thus keep the
sub drivers MFD agnostic. This is mostly needed for non MFD aware
sub drivers.
Acked-by: Richard Röjfors <richard.rojfors@pelagicore.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Nobody is currently maintaining dw_dmac. We are using dw_dmac for SPEAr13xx and
are currently maintaining it. After discussing with Vinod, sending this patch to
update maintainer-ship of dw_dmac.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Havard Skinnemoen <hskinnemoen@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Update SH_DMAC_MAX_CHANNELS to support the 20 DMA
channels included in the sh73a0 SY-DMAC hardware.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Fix the shdma.c handing of SH_DMAC_MAX_CHANNELS
to avoid overwriting the chan_irq[] and chan_flag[]
arrays in the case of pdata->channel_num is larger
than SH_DMAC_MAX_CHANNELS.
With this patch applied up to SH_DMAC_MAX_CHANNELS
will be used by the shdma.c driver. If more channels
are available in the platform data the user will
be notified on the console.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch makes the shdma.c driver allow slave operation
on DMA hardware mapped with a single I/O-memory window.
The dmae_set_dmars() function is adjusted to use the
first memory window in case of a missing DMARS window.
At probe() time the code is updated to enable DMA_SLAVE
only if slave information is passed with the platform data.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (23 commits)
sh: Ignore R_SH_NONE module relocations.
SH: SE7751: Fix pcibios_map_platform_irq prototype.
sh: remove warning and warning_symbol from struct stacktrace_ops
sh: wire up sys_sendmmsg.
clocksource: sh_tmu: Runtime PM support
clocksource: sh_tmu: __clocksource_updatefreq_hz() update
clocksource: sh_cmt: Runtime PM support
clocksource: sh_cmt: __clocksource_updatefreq_hz() update
dmaengine: shdma: synchronize RCU before freeing, simplify spinlock
dmaengine: shdma: add runtime- and system-level power management
dmaengine: shdma: fix locking
sh: sh-sci: sh7377 and sh73a0 build fixes
sh: cosmetic improvement: use an existing pointer
serial: sh-sci: suspend/resume wakeup support V2
serial: sh-sci: Runtime PM support
sh: select IRQ_FORCED_THREADING.
sh: intc: Set virtual IRQs as nothread.
sh: fixup fpu.o compile order
i2c: add a module alias to the sh-mobile driver
ALSA: add a module alias to the FSI driver
...
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git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits)
b43: fix comment typo reqest -> request
Haavard Skinnemoen has left Atmel
cris: typo in mach-fs Makefile
Kconfig: fix copy/paste-ism for dell-wmi-aio driver
doc: timers-howto: fix a typo ("unsgined")
perf: Only include annotate.h once in tools/perf/util/ui/browsers/annotate.c
md, raid5: Fix spelling error in comment ('Ofcourse' --> 'Of course').
treewide: fix a few typos in comments
regulator: change debug statement be consistent with the style of the rest
Revert "arm: mach-u300/gpio: Fix mem_region resource size miscalculations"
audit: acquire creds selectively to reduce atomic op overhead
rtlwifi: don't touch with treewide double semicolon removal
treewide: cleanup continuations and remove logging message whitespace
ath9k_hw: don't touch with treewide double semicolon removal
include/linux/leds-regulator.h: fix syntax in example code
tty: fix typo in descripton of tty_termios_encode_baud_rate
xtensa: remove obsolete BKL kernel option from defconfig
m68k: fix comment typo 'occcured'
arch:Kconfig.locks Remove unused config option.
treewide: remove extra semicolons
...
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After discovering that wide use of prefetch on modern CPUs
could be a net loss instead of a win, net drivers which were
relying on the implicit inclusion of prefetch.h via the list
headers showed up in the resulting cleanup fallout. Give
them an explicit include via the following $0.02 script.
=========================================
#!/bin/bash
MANUAL=""
for i in `git grep -l 'prefetch(.*)' .` ; do
grep -q '<linux/prefetch.h>' $i
if [ $? = 0 ] ; then
continue
fi
( echo '?^#include <linux/?a'
echo '#include <linux/prefetch.h>'
echo .
echo w
echo q
) | ed -s $i > /dev/null 2>&1
if [ $? != 0 ]; then
echo $i needs manual fixup
MANUAL="$i $MANUAL"
fi
done
echo ------------------- 8\<----------------------
echo vi $MANUAL
=========================================
Signed-off-by: Paul <paul.gortmaker@windriver.com>
[ Fixed up some incorrect #include placements, and added some
non-network drivers and the fib_trie.c case - Linus ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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List elements, deleted using list_del_rcu(), cannot be freed without
synchronising RCU. Further, the spinlock, used to protect the RCU
writer, is called in process context, so, we don't have to save flags.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch extends and fixes runtime power management in the shdma
driver to support powering down the DMA controller and adds support
for system-level suspend and resume.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Close multiple theoretical races, especially the one in
.device_free_chan_resources().
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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