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2012-04-05dmaengine: add context parameter to prep_slave_sg and prep_dma_cyclicAlexandre Bounine
Add context parameter to device_prep_slave_sg() and device_prep_dma_cyclic() interfaces to allow passing client/target specific information associated with the data transfer. Modify all affected DMA engine drivers. Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> Cherry-picked from mainline 185ecb5f4fd43911c35956d4cc7d94a1da30417f Change-Id: Ief79d20f6e9d367ee2b530d08df72864fb16895a Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/94464 Reviewed-by: Automatic_Commit_Validation_User
2012-04-03dmaengine/dw_dmac: Reconfigure interrupt and chan_cfg register on resumeViresh Kumar
In S2R all DMA registers are reset by hardware and thus they are required to be reprogrammed. The channels which aren't reprogrammed are channel configuration and interrupt enable registers, which are currently programmed at chan_alloc time. This patch creates another routine to initialize a channel. It will try to initialize channel on every dwc_dostart() call. If channel is already initialised then it simply returns, otherwise it configures registers. This routine will also initialize registers on wakeup from S2R, as we mark channels as uninitialized on suspend. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> cherry-picked from mainline 61e183f8306934a9f66557f69f1f0f56f18dca06 Change-Id: I4ede3e1db8844533161bd4a836b1fece0d0ee716 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/93784 Reviewed-by: Automatic_Commit_Validation_User
2012-04-03dmaengine: consolidate initialization of cookiesRussell King - ARM Linux
Provide a common function to initialize a channels cookie values. Change-Id: Idc822d69971d7a6d26ffea8809df4825b87020e5 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> (cherry picked from mainline commit d3ee98cdcd6198ea1cf75c603178acc8a805b69b) Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: Id7d52f05b78d15b0c61cb04122b19810e78b9269 Reviewed-on: http://git-master/r/93783
2012-04-03dmaengine: consolidate tx_status functionsRussell King - ARM Linux
Now that we have the completed cookie in the dma_chan structure, we can consolidate the tx_status functions by providing a function to set the txstate structure and returning the DMA status. We also provide a separate helper to set the residue for cookies which are still in progress. Change-Id: I4b7672bbd17d072bfde348d04481c8db48e814c4 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> (cherry picked from mainline commit 96a2af41c78b1fbb1f567a3486bdc63f7b31c5fd) Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: Ifdb55d85eb4789f221679f1f38f5566168e5c643 Reviewed-on: http://git-master/r/93782 Reviewed-by: Automatic_Commit_Validation_User
2012-04-03dmaengine: provide a common function for completing a dma descriptorRussell King - ARM Linux
Provide a common function to do the cookie mechanics for completing a DMA descriptor. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> Cherry-picked from mainline commit f7fbce07c6ce26a25b4e0cb5f241c361fde87901 Change-Id: I0b0a9d4ad538db4fda227cc91436c44bc4a6f206 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/93781 Reviewed-by: Automatic_Commit_Validation_User
2012-04-03dmaengine: consolidate assignment of DMA cookiesRussell King - ARM Linux
Everyone deals with assigning DMA cookies in the same way (it's part of the API so they should be), so lets consolidate the common code into a helper function to avoid this duplication. Change-Id: I730882ff0f84f9ae42dd137a8926b7ae10868370 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> (cherry picked from mainline commit 884485e1f12dcd39390f042e772cdbefc9ebb750) Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: Ifc4a395a5dbafad03f8b28e052ad0e7ea5d90163 Reviewed-on: http://git-master/r/93780 Reviewed-by: Automatic_Commit_Validation_User
2012-04-03dmaengine: add private header fileRussell King - ARM Linux
Add a local private header file to contain definitions and declarations which should only be used by DMA engine drivers. We also fix linux/dmaengine.h to use LINUX_DMAENGINE_H to guard against multiple inclusion. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> (cherry picked from mainline commit d2ebfb335b0426deb1a4fb14e4e926d81ecd8235) Change-Id: I91b051537fa1890e2651ebe0409fa97cbc9191dd Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/93779 Reviewed-by: Automatic_Commit_Validation_User
2012-04-03dmaengine: move last completed cookie into generic dma_chan structureRussell King - ARM Linux
Every DMA engine implementation declares a last completed dma cookie in their private dma channel structures. This is pointless, and forces driver specific code. Move this out into the common dma_chan structure. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> cherry-picked from mainline 4d4e58de32a192fea65ab84509d17d199bd291c8 Change-Id: Ib653bcfa5f492986946fd34006a8de3090db0441 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/93778
2011-09-05dmaengine/ste_dma40: fix memory leak due to prepared descriptorsPer Forlin
Prepared descriptors that are not submitted will not be freed. Add prepared descriptor to a list to be able to release them upon dmaengine_terminate_all(). Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-09-05dmaengine/ste_dma40: fix Oops due to double free of client descriptorPer Forlin
The client list may exist in two lists at the same time. This makes free fail since the same desc is freed multiple times. Remove desc from client list when adding it to the pending queue. Move free of client owned descriptors from free_dma() to terminate_all(). Unable to handle kernel paging request at virtual address 00100104 pgd = dea8c000 [00100104] *pgd=1ea62831, *pte=00000000, *ppte=00000000 Internal error: Oops: 817 [#1] PREEMPT SMP Modules linked in: CPU: 0 Not tainted (3.1.0-rc3+ #58) PC is at d40_free_chan_resources+0x64/0x330 Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-09-05dmaengine/ste_dma40: remove duplicate call to d40_pool_lli_free().Per Forlin
d40_desc_free() already calls d40_pool_lli_free(). Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-09-05dmaengine/ste_dma40: add missing kernel doc for pending_queuePer Forlin
Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-10Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: drop experimental status for ARM_PATCH_PHYS_VIRT ARM: 7008/1: alignment: Make SIGBUS sent to userspace POSIXly correct ARM: 7007/1: alignment: Prevent ignoring of faults with ARMv6 unaligned access model ARM: 7010/1: mm: fix invalid loop for poison_init_mem ARM: 7005/1: freshen up mm/proc-arm946.S dmaengine: PL08x: Fix trivial build error ARM: Fix build error for SMP=n builds
2011-08-09dmaengine: PL08x: Fix trivial build errorRussell King
Something changed during the 3.1 merge window in the include files which now causes the pl08x DMA engine driver to fail to build. Fix this by adding the now necessary dma-mapping.h include: drivers/dma/amba-pl08x.c: In function ■pl08x_unmap_buffers■: drivers/dma/amba-pl08x.c:1524: error: implicit declaration of function ■dma_unmap_single■ drivers/dma/amba-pl08x.c:1527: error: implicit declaration of function ■dma_unmap_page■ Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-04Merge branch 'next' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: dmaengine: use DEFINE_IDR for static initialization ioat: fix xor_idx_to_desc Avoid section type conflict in dma/ioat/dma_v3.c ioat: Adding PCI IDs for IOAT devices on SandyBridge platforms
2011-08-03dmaengine: use DEFINE_IDR for static initializationAxel Lin
We could use DEFINE_IDR for statically allocated idr that allow us to save a few lines of code. And also remove unneeded mutex_init() for dma_list_mutex, as dma_list_mutex is initialized automatically by DEFINE_MUTEX(). Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-08-03ioat: fix xor_idx_to_descDan Williams
For versions of the device that implement operation-types 0x87, 0x88 (IOAT_OP_XOR, IOAT_OP_XOR_VAL) this map determines whether a given source is located in the base or extended descriptor. Source addresses 6 through 8 require an extended descriptor, hence 0xe0, not 0xd0. No shipping hardware currently implements these operation types. Reported-by: Evgueni Smogailov <evgueni.smogailov@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-08-01Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds
* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (37 commits) Improve slave/cyclic DMA engine documentation dmaengine: pl08x: handle the rest of enums in pl08x_width DMA: PL08x: cleanup selection of burst size DMA: PL08x: avoid recalculating cctl at each prepare DMA: PL08x: cleanup selection of buswidth DMA: PL08x: constify plchan->cd and plat->slave_channels DMA: PL08x: separately store source/destination cctl DMA: PL08x: separately store source/destination slave address DMA: PL08x: clean up LLI debugging DMA: PL08x: select LLI bus only once per LLI setup DMA: PL08x: remove unused constants ARM: mxs-dma: reset after disable channel dma: intel_mid_dma: remove redundant pci_set_drvdata calls dma: mxs-dma: fix unterminated platform_device_id table dmaengine: pl330: make platform data optional dmaengine: imx-sdma: return proper error if kzalloc fails pch_dma: Fix CTL register access issue dmaengine: mxs-dma: skip request_irq for NO_IRQ dmaengine/coh901318: fix slave submission semantics dmaengine/ste_dma40: allow memory buswidth/burst to be configured ... Fix trivial whitespace conflict in drivers/dma/mv_xor.c
2011-08-01Merge branch 'sh-latest' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-3.x * 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-3.x: (39 commits) SH: static should be at beginning of declaration sh: move CLKDEV_xxx_ID macro to sh_clk.h sh: clock-shx3: add CLKDEV_ICK_ID for cleanup sh: clock-sh7786: add CLKDEV_ICK_ID for cleanup sh: clock-sh7785: add CLKDEV_ICK_ID for cleanup sh: clock-sh7757: add CLKDEV_ICK_ID for cleanup sh: clock-sh7366: add CLKDEV_ICK_ID for cleanup sh: clock-sh7343: add CLKDEV_ICK_ID for cleanup sh: clock-sh7722: add CLKDEV_ICK_ID for cleanup sh: clock-sh7724: add CLKDEV_ICK_ID for cleanup sh: clock-sh7366: modify I2C clock settings sh: clock-sh7343: modify I2C clock settings sh: clock-sh7723: modify I2C clock settings sh: clock-sh7722: modify I2C clock settings sh: clock-sh7724: modify I2C clock settings serial: sh-sci: Fix up pretty name printing for port IRQs. serial: sh-sci: Kill off per-port enable/disable callbacks. serial: sh-sci: Add missing module description/author bits. serial: sh-sci: Regtype probing doesn't need to be fatal. sh: Tidy up pre-clkdev clk_get() error handling. ...
2011-07-27Merge branch 'next' into for-linus-3.0Vinod Koul
2011-07-27dmaengine: imx-sdma: add device tree probe supportShawn Guo
It adds device tree probe support for imx-sdma driver. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Vinod Koul <vinod.koul@intel.com>
2011-07-27dmaengine: imx-sdma: sdma_get_firmware does not need to copy fw_nameShawn Guo
It does not need to allocate space and copy fw_name in function sdma_get_firmware(). Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Vinod Koul <vinod.koul@intel.com>
2011-07-27dmaengine: imx-sdma: use platform_device_id to identify sdma versionShawn Guo
It might be not good to use software defined version to identify sdma device type, when hardware does not define such version. Instead, soc name is stable enough to define the device type. The patch uses platform_device_id rather than version number passed by platform data to identify sdma device type/version. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26Merge branch 'next/devel' of ↵Linus Torvalds
ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (128 commits) ARM: S5P64X0: External Interrupt Support ARM: EXYNOS4: Enable MFC on Samsung NURI ARM: EXYNOS4: Enable MFC on universal_c210 ARM: S5PV210: Enable MFC on Goni ARM: S5P: Add support for MFC device ARM: EXYNOS4: Add support FIMD on SMDKC210 ARM: EXYNOS4: Add platform device and helper functions for FIMD ARM: EXYNOS4: Add resource definition for FIMD ARM: EXYNOS4: Change devname for FIMD clkdev ARM: SAMSUNG: Add IRQ_I2S0 definition ARM: SAMSUNG: Add platform device for idma ARM: EXYNOS4: Add more registers to be saved and restored for PM ARM: EXYNOS4: Add more register addresses of CMU ARM: EXYNOS4: Add platform device for dwmci driver ARM: EXYNOS4: configure rtc-s3c on NURI ARM: EXYNOS4: configure MAX8903 secondary charger on NURI ARM: EXYNOS4: configure ADC on NURI ARM: EXYNOS4: configure MAX17042 fuel gauge on NURI ARM: EXYNOS4: configure regulators and PMIC(MAX8997) on NURI ARM: EXYNOS4: Increase NR_IRQS for devices with more IRQs ... Fix up tons of silly conflicts: - arch/arm/mach-davinci/include/mach/psc.h - arch/arm/mach-exynos4/Kconfig - arch/arm/mach-exynos4/mach-smdkc210.c - arch/arm/mach-exynos4/pm.c - arch/arm/mach-imx/mm-imx1.c - arch/arm/mach-imx/mm-imx21.c - arch/arm/mach-imx/mm-imx25.c - arch/arm/mach-imx/mm-imx27.c - arch/arm/mach-imx/mm-imx31.c - arch/arm/mach-imx/mm-imx35.c - arch/arm/mach-mx5/mm.c - arch/arm/mach-s5pv210/mach-goni.c - arch/arm/mm/Kconfig
2011-07-26dmaengine: pl08x: handle the rest of enums in pl08x_widthVinod Koul
pl08x_width function does not handle rest of enums for DMA_SLAVE_BUSWIDTH_xxxx which causes gcc to emit below warining drivers/dma/amba-pl08x.c: In function 'pl08x_width': drivers/dma/amba-pl08x.c:1119: warning: enumeration value 'DMA_SLAVE_BUSWIDTH_UNDEFINED' not handled in switch drivers/dma/amba-pl08x.c:1119: warning: enumeration value 'DMA_SLAVE_BUSWIDTH_8_BYTES' not handled in switch this patch adds a default case which returns error Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26DMA: PL08x: cleanup selection of burst sizeRussell King - ARM Linux
Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26DMA: PL08x: avoid recalculating cctl at each prepareRussell King - ARM Linux
Now that we have separate cctl values for M>P and P>M transfers, we can avoid calculating the cctl value each time we prepare a transaction. Move the bus selection and increment setting to the slave configuration and initialization functions. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26DMA: PL08x: cleanup selection of buswidthRussell King - ARM Linux
Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26DMA: PL08x: separately store source/destination cctlRussell King - ARM Linux
Store the source/destination cctl values into the channel structure. This moves us towards being able to avoid a configuration call each time we use the channel. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26DMA: PL08x: separately store source/destination slave addressRussell King - ARM Linux
Store the source/destination slave address separately into the channel structure. This moves us towards being able to avoid a configuration call each time we use the channel. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26DMA: PL08x: clean up LLI debuggingRussell King - ARM Linux
Clean up debugging when setting up the LLI list. This reduces the amount of output while preserving the information, and makes it easier to read. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26DMA: PL08x: select LLI bus only once per LLI setupRussell King - ARM Linux
Avoid re-selecting the LLI bus each time we create an LLI. Move it out of the LLI setup loops. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26DMA: PL08x: remove unused constantsRussell King - ARM Linux
PL08X_WQ_PERIODMIN and PL08X_MAX_ALLOCS are not used, remove them. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26ARM: mxs-dma: reset after disable channelDong Aisheng
We met some channels in abnormal state after disable. Reset it to get a clean state. Signed-off-by: Dong Aisheng <b29396@freescale.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26dma: intel_mid_dma: remove redundant pci_set_drvdata callsAxel Lin
Call pci_set_drvdata() once in intel_mid_dma_probe() is enough. Remove redundant pci_set_drvdata() calls in dma_suspend() and dma_resume(). Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26dma: mxs-dma: fix unterminated platform_device_id tableAxel Lin
Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-26dmaengine: pl330: make platform data optionalRob Herring
The pl330 needs platform data for describing peripheral connections, but some platforms may only support memory to memory dma channels. In this case, we can probe for how many channels there are and don't need the platform data. As memcpy requests don't need channel private data to hold peripheral info, allow private data to be NULL in this case. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Jassi Brar <jassisinghbrar@gmail.com> Cc: Vinod Koul <vkoul@infradead.org> Cc: Dan Williams <dan.j.williams@intel.com> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-25Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (43 commits) fs: Merge split strings treewide: fix potentially dangerous trailing ';' in #defined values/expressions uwb: Fix misspelling of neighbourhood in comment net, netfilter: Remove redundant goto in ebt_ulog_packet trivial: don't touch files that are removed in the staging tree lib/vsprintf: replace link to Draft by final RFC number doc: Kconfig: `to be' -> `be' doc: Kconfig: Typo: square -> squared doc: Konfig: Documentation/power/{pm => apm-acpi}.txt drivers/net: static should be at beginning of declaration drivers/media: static should be at beginning of declaration drivers/i2c: static should be at beginning of declaration XTENSA: static should be at beginning of declaration SH: static should be at beginning of declaration MIPS: static should be at beginning of declaration ARM: static should be at beginning of declaration rcu: treewide: Do not use rcu_read_lock_held when calling rcu_dereference_check Update my e-mail address PCIe ASPM: forcedly -> forcibly gma500: push through device driver tree ... Fix up trivial conflicts: - arch/arm/mach-ep93xx/dma-m2p.c (deleted) - drivers/gpio/gpio-ep93xx.c (renamed and context nearby) - drivers/net/r8169.c (just context changes)
2011-07-25Merge branch 'next/fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (35 commits) ARM: msm: platsmp: determine number of CPU cores at boot time ARM: Tegra: Seaboard: Fix I2C bus numbering for ADT7461 ARM: Tegra: Trimslice: Tri-state DAP3 pinmux ARM: orion5x: fixup 5181 MPP mask check ARM: mxs-dma: include <linux/dmaengine.h> ARM: i.MX53: consistently use MX53_UART_PAD_CTRL for uart txd/rxd/rts/cts ARM: i.MX53: UARTn_CTS pin should not change RTS input select ARM: i.MX53: UARTn_TXD pin should not change RXD input select ARM: mx25: Fix typo on CAN1_RX pad setting iomux-mx53: add missing 'IOMUX_CONFIG_SION' for some I2C pad definitions ARM: NUC93X: add UL suffix to VMALLOC_END to ensure it is properly typed ARM: LPC32XXX: add UL suffix to VMALLOC_END to ensure it is properly typed ARM: CNS3XXX: add UL suffix to VMALLOC_END to ensure it is properly typed ARM: i.MX53: Fix IOMUX type o's ARM i.MX dma: Fix burstsize settings mach-mx5: fix the I2C clock parents ARM: mxs/tx28: according to the TX28's datasheet D4-D7 are not used for MMC0 ARM i.MX23/28: platform-mxsfb: Add missing include of linux/dma-mapping.h ARM: mx53: Fix some interrupts marked as reserved. MXC: iomux-v3: correct NO_PAD_CTRL definition ... Fix up trivial conflict in arch/arm/mach-imx/mach-mx31_3ds.c
2011-07-25dmaengine: imx-sdma: return proper error if kzalloc failsAxel Lin
Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-25pch_dma: Fix CTL register access issueTomoya MORINAGA
Currently, Mode-Control register is accessed by read-modify-write. According to DMA hardware specifications datasheet, prohibits this method. Because this register resets to 0 by DMA HW after DMA transfer completes. Thus, current read-modify-write processing can cause unexpected behavior. The datasheet says in case of writing Mode-Control register, set the value for only target channel, the others must set '11b'. e.g. Set DMA0=01b DMA11=10b CTL0=33333331h CTL2=00002333h NOTE: CTL0 includes DMA0~7 Mode-Control register. CTL2 includes DMA8~11 Mode-Control register. This patch modifies the issue. Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-22Merge branch 'spi/next' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds
* 'spi/next' of git://git.secretlab.ca/git/linux-2.6: (34 commits) spi/imx: add device tree probe support spi/imx: copy gpio number passed by platform data into driver private data spi/imx: use soc name in spi device type naming scheme spi/imx: merge type SPI_IMX_VER_0_7 into SPI_IMX_VER_0_4 spi/imx: do not use spi_imx2_3 to name SPI_IMX_VER_2_3 function and macro spi/imx: use mx21 to name SPI_IMX_VER_0_0 function and macro spi/imx: do not make copy of spi_imx_devtype_data spi/dw: Add spi number into spi irq desc spi/tegra: Use engineering names in DT compatible property spi/fsl_spi: fix CPM spi driver mach-s3c2410: remove unused spi-gpio.h file spi: remove obsolete spi-s3c24xx-gpio driver mach-gta2: remove unused spi-gpio.h include mach-qt2410: convert to spi_gpio mach-jive: convert to spi_gpio spi/pxa2xx: Remove unavailable ssp_type from documentation spi/bfin_spi: uninline fat queue funcs spi/bfin_spi: constify pin array spi/bfin_spi: use structs for accessing hardware regs spi/topcliff-pch: Support new device ML7223 IOH ... Fix up trivial conflict in arch/arm/mach-ep93xx/Makefile
2011-07-22Avoid section type conflict in dma/ioat/dma_v3.cAndi Kleen
const __read_mostly is not legal and causes section type conflicts. That's because the read.mostly section is not read only. Simply drop the __read_mostly designation. Signed-off-by: Andi Kleen <ak@linux.intel.com> [drop __read_mostly instead of const] Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-07-22ioat: Adding PCI IDs for IOAT devices on SandyBridge platformsDave Jiang
Adding to pci_id.h and the device table for ioat. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-07-14dmaengine: mxs-dma: skip request_irq for NO_IRQShawn Guo
In general, the mxs-dma users get separate irq for each channel, but gpmi is special one which has only one irq shared by all gpmi channels. It causes mxs_dma channel allocation function fail for all other gpmi channels except the first one calling into the function. The patch gets request_irq call skipped for NO_IRQ case, and leaves this gpmi specific quirk to gpmi driver to sort out. It will fix above problem if gpmi driver sets chan_irq as gpmi irq for only one channel and NO_IRQ for all the rest channels. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-14dmaengine/coh901318: fix slave submission semanticsLinus Walleij
While testing Per Forlins MMC speed improvements I noticed a semantic bug in the COH901318 driver: it will write to channel registers in the prep_slave_sg() function, instead of deferring it to later, breaking the assumption from the drivers to be able to queue up new jobs while another job is running. Fix this by storing up the initial register writes in the job descriptors and write them to hardware when we process the descriptor instead. Now the stress tests work. Acked-by: Per Forlin <per.forlin@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-14dmaengine/ste_dma40: allow memory buswidth/burst to be configuredRabin Vincent
Currently the runtime config implementation forces the memory side parameters to be the same as the peripheral side. Allow these to be different, and check for misconfiguration. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Reviewed-by: Ulf HANSSON <ulf.hansson@stericsson.com> Tested-by: Stefan Nilsson <stefan.xk.nilsson@stericsson.com> Reviewed-by: Per Forlin <per.forlin@stericsson.com> Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Robert Marklund <robert.marklund@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-14dmaengine/ste_dma40: use AMBA PrimeCell helper macrosLinus Walleij
The DMA40 is not a PrimeCell from ARM, but it still use the same ID registers. So let's utilize the existing macros in the PrimeCell header to identify manufacturer and revision of the IP block instead of reinventing the wheel. Cc: Robert Marklund <robert.marklund@stericsson.com> Cc: Per Forlin <per.forlin@linaro.org> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-14dmaengine/ste_dma40: make the cyclic alloc NOWAITRobert Marklund
This function may be initiated from IRQ context, so the allocation must allocate NOWAIT memory. Signed-off-by: Robert Marklund <robert.marklund@stericsson.com> Reviewed-by: Rabin Vincent <rabin.vincent@stericsson.com> Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-07-14dmaengine/ste_dma40: fix missing kernel-docom prakash
Missing documentation creates kernel-doc warnings, so add the documenation. Signed-off-by: Om Prakash <omprakash.pal@stericsson.com> Reviewed-by: Rabin Vincent <rabin.vincent@stericsson.com> Reviewed-by: Jonas Aberg <jonas.aberg@stericsson.com> Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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