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path: root/drivers/gpu/drm/amd/display
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2026-05-19drm/amd/display: Use lockdep_assert_held() for dc_lock checkRay Wu
[Why] mutex_is_locked() only tells whether *some* task holds the mutex, not the current one, so the existing ASSERT can silently pass when the caller violates the contract. [How] Use the kernel's lockdep debugging utility (include/linux/lockdep.h) and replace ASSERT(mutex_is_locked(&dm->dc_lock)) with lockdep_assert_held(&dm->dc_lock), which checks the current task's held-lock stack. Reviewed-by: Sun peng (Leo) Li <sunpeng.li@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-19drm/amd/display: Fix ISM dc_lock deadlock during suspendRay Wu
[Why] System hang observed during suspend/resume while video is playing. amdgpu_dm_ism_disable() is called under dc_lock and waits for ISM delayed work via disable_delayed_work_sync(). The work handlers themselves take dc_lock, producing an ABBA deadlock when a worker is in flight at suspend time. [How] Split the disable path into two phases with opposite locking contracts: 1. amdgpu_dm_ism_disable() -- quiesces workers, must NOT hold dc_lock. 2. amdgpu_dm_ism_force_full_power() (new) -- drives the ISM FSM back to FULL_POWER_RUNNING, must hold dc_lock. Reviewed-by: Sun peng (Leo) Li <sunpeng.li@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-19drm/amd/display: Enable additional wait for pipe pending checksAric Cyr
[why] In cases where there are two FULL updates within the same display frame, it's possible for some blocks to be programmed a second time without having been latched completely from the first programming. DCN 3.5 and up already work around this with additional validation checks for frame count and defer as needed via fsleep. [how] Enabled existing pipe checks generically for all DCN versions to avoid HW programming hazards. Also removed redundant max_frame_count which can be determined by the register mask and shift. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Aric Cyr <Aric.Cyr@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-19drm/amd/display: Fix assertion due to disable/enable CM blocksAric Cyr
[why] Some dc state transitions can result in CM blocks being disabled, then re-enabled. The disable will set a defer bit, but re-enable will not clear it. When optimizing later, an assert will be hit due to incorrect expected HW state. [how] Clear defer bits if the block is re-enabled before optimization is executed. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Aric Cyr <Aric.Cyr@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-19drm/amd/display: Refactor PSR functionality into dedicated power_psr moduleLohita Mudimela
[Why] Extract all PSR (Panel Self Refresh) related functions from power.c into a new power_psr.c module for better code organization and maintainability. [How] Create new power_psr.c file containing all PSR-related functions moved from power.c. Remove static qualifier from shared functions to enable cross-file access: - psr_context_to_mod_power_psr_context: Convert PSR context to module power PSR context - map_index_from_stream: Map stream to power entity index - delay_two_frames: Wait for two frame periods Add function declarations to header. Maintain forward declaration of struct core_power for type compatibility. Reviewed-by: Anthony Koo <anthony.koo@amd.com> Signed-off-by: Lohita Mudimela <lohita.mudimela@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-18drm/amd/display: Fix eDP receiver ready status check in T7 sequenceSung-huai Wang
[Why] Some eDP panels return sinkstatus as 0x5, causing the original sinkstatus == 1 check to never match and resulting in unnecessary polling delay. The equality check is too restrictive and doesn't properly validate the specific status bit that indicates receiver readiness. [How] Replace direct value comparison with proper bitmask check using DP_RECEIVE_PORT_0_STATUS constant. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Sung-huai Wang <Danny.Wang@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-18Revert "drm/amd/display: dmub_cmd.h: add missing kernel-doc for enums"James Lin
[Why & How] This reverts commit f71d0b68ec58b781f4f44ea642846bedce075e85. 1. Auto-generated Header: The file 'dmub_cmd.h' is an auto-generated header managed in an external repository (dmu_stg). Manual changes made directly in this repository will be overwritten and lost during the next automated weekly synchronization. 2. Tooling Compatibility: This header is governed by internal AMD firmware standards which require Doxygen formatting for cross-team documentation. Moving to kernel-doc syntax may break internal documentation pipelines. 3. Suppressing Warnings: Current 'make htmldocs' and 'make W=1' builds do not actively scan 'dmub_cmd.h' for kernel-doc compliance, thus no warnings are triggered during standard compilation. To address warnings generated when manually running './scripts/kernel-doc', we have added a notice at the file header indicating that this is an auto-generated file that does not strictly follow kernel-doc formatting. This ensures that any future linting tools or manual checks recognize the formatting as intentional. Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-18drm/amd/display: Add some missing code for dcn42James Lin
[why & how] Some DCN4.2 related code is missing from upstream Fixes: e56e3cff2a1b ("drm/amd/display: Sync dcn42 with DC 3.2.373") Acked-by: ChiaHsuan Chung <ChiaHsuan.Chung@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Wrap DCN32 phantom-plane allocation in ↵Mikhail Gavrilov
DC_RUN_WITH_PREEMPTION_ENABLED [Why] dcn32_validate_bandwidth() wraps dcn32_internal_validate_bw() with DC_FP_START()/DC_FP_END(). In x86 non-RT, DC_FP_START takes fpregs_lock(), which disables local softirqs. The DML1 path through dcn32_enable_phantom_plane() calls kvzalloc() to allocate ~335 KiB for dc_plane_state. This triggers the vmalloc path, which calls BUG_ON(in_interrupt()) because it's invoked within the FPU-enabled (softirq disabled) region, leading to a kernel crash. [How] Wrap the dc_state_create_phantom_plane() call with the DC_RUN_WITH_PREEMPTION_ENABLED() macro to allow preemption during this memory allocation. Fixes: 235c67634230 ("drm/amd/display: add DCN32/321 specific files for Display Core") Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/4470 Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 885ccbef7b94a8b38f69c4211c679021aa27ad11) Cc: stable@vger.kernel.org
2026-05-11drm/amd/display: Promote DC to 3.2.382Taimur Hassan
This version brings along following update: -Revert "Enable HUBP/OPTC/DPP power gating" -Revert "Unify fast update classification paths" -enable ODM 2:1 on single eDP based on pixel clock -Enable IPS on DCN42 -Add additional IPS entry/exit for PSR/Replay -Separate ABM functions into dedicated power_abm.c file -Fix always-true lower-bound assert -Refactor dc_link_aux_transfer_raw -only call pmfw if smu present flags true -Fix multiple compiler warnings -Fix CRC open failure during active rendering -Fix white screen on boot with OLED panel -Fix refresh rate round up case Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: [FW Promotion] Release 0.1.59.0Taimur Hassan
[Why & How] Update DMUB related command structure. Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Wrap DCN32 phantom-plane allocation in ↵Mikhail Gavrilov
DC_RUN_WITH_PREEMPTION_ENABLED [Why] dcn32_validate_bandwidth() wraps dcn32_internal_validate_bw() with DC_FP_START()/DC_FP_END(). In x86 non-RT, DC_FP_START takes fpregs_lock(), which disables local softirqs. The DML1 path through dcn32_enable_phantom_plane() calls kvzalloc() to allocate ~335 KiB for dc_plane_state. This triggers the vmalloc path, which calls BUG_ON(in_interrupt()) because it's invoked within the FPU-enabled (softirq disabled) region, leading to a kernel crash. [How] Wrap the dc_state_create_phantom_plane() call with the DC_RUN_WITH_PREEMPTION_ENABLED() macro to allow preemption during this memory allocation. Fixes: 235c67634230 ("drm/amd/display: add DCN32/321 specific files for Display Core") Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/4470 Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Revert "Enable HUBP/OPTC/DPP power gating"Leo Chen
[why & how] Pipe power gating is causing regressions. Revert to unblock testing and promotion This reverts commit 2eb0681ea7604880ade2d715e4212132c393c132. Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Signed-off-by: Leo Chen <leo.chen@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Revert "Unify fast update classification paths"Ovidiu Bunea
[why & how] This change causes regressions in ACPI and display off/on testing. Revert the change to unblock testing. This reverts commit 5f6937c1afb151c85af721fad180d588060430d7. Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: enable ODM 2:1 on single eDP based on pixel clockCharlene Liu
[Why & How] this is to force ODM 2:1 on single eDP to lower dispclk/dppclk. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Fix enum decl warningsGaghik Khachatrian
[Why] warnings were triggered by enum forward declarations that are not valid in C++ without an explicit underlying type. [How] - Replace problematic enum forward declarations with C++-safe forms where applicable. - Use plain integer types for interface-only declarations that do not require strong enum typing. - Update dependent winterface signatures and related type usage consistently. - Add required include and type-visibility fixes to avoid follow-on parse and type-resolution issues. Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Enable IPS on DCN42Ivan Lipski
[Why & How] Fully enable IPS to achieve higher power savings. Reviewed-by: Sunpeng Li <sunpeng.li@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Add additional IPS entry/exit for PSR/ReplayIvan Lipski
[Why] Multiple paths issue DMUB commands without managing IPS state, causing dc_wake_and_execute_gpint/dmub_cmd to internally wake from IPS and reallow idle. This flips idle_allowed back to true while idle_optimizations_allowed remains false during in-flight commits, desynchronizing the two flags. Affected paths: - amdgpu_dm_psr_set_event() and amdgpu_dm_replay_set_event() calls from amdgpu_dm_handle_vrr_transition(), amdgpu_dm_commit_planes() and amdgpu_dm_mod_power_update_streams(), that are invoked on atomic commits. - debugfs psr_get(), psr_read_residency(), replay_get_state(), replay_set_residency() access hardware without holding dc_lock or disabling IPS. [How] - Explicitly exit IPS before PSR/Replay set_event w/ hw_programming, called within atomic commit. - Wrap debugfs PSR/Replay state getters and setters with IPS exit/entry + dc_lock. Reviewed-by: Sunpeng Li <sunpeng.li@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Separate ABM functions into dedicated power_abm.c fileLohita Mudimela
[Why] Improves code organization by separating Adaptive Backlight Modulation functionality from general power management. This modular approach enhances maintainability and makes the codebase easier to navigate. [How] Create new power_abm.c file containing all ABM-related functions moved from power.c. Remove static qualifier from shared functions to enable cross-file access: - initialize_backlight_caps: Initialize backlight capabilities - validate_ext_backlight_caps: Validate external backlight capabilities - backlight_millipercent_to_pwm: Convert brightness percent to PWM - backlight_millipercent_to_millinit: Convert brightness percent to nits - fill_backlight_level_params: Populate backlight level parametersAdd function declarations to mod_power.h header. Update CMakeLists.txt to include power_abm.c in build. Maintain forward declaration of struct core_power for type compatibility. Rename struct core_power field from 'public' to 'mod_public'. Move internal structures (backlight_state, backlight_properties, dmcu_varibright_cached_properties, core_power) to power_helpers.h to ensure consistent memory layouts across compilation units. Reviewed-by: Martin Leung <martin.leung@amd.com> Signed-off-by: Lohita Mudimela <lohita.mudimela@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: always-true lower-bound assertGaghik Khachatrian
[Why] A recent type change made the lower-bound part of the OTG instance assert redundant, which can trigger static-analysis noise and distract from actionable diagnostics. [How] Kept the meaningful upper-bound range validation required for safe narrowing to uint8_t. Removed the redundant non-negative portion of the assert so the check matches current type semantics. Revalidated with the latest debug build log: no warnings and no build-failure markers. Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Introduce dc_plane_cm and migrate surface update color pathRafal Ostrowski
[Why] Introduce dc_plane_cm struct. TRIM_CM2 flag is used to synchronize between old and new implementation. [How] Introduce dc_plane_cm struct. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Rafal Ostrowski <rafal.ostrowski@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Refactor dc_link_aux_transfer_rawMatthew Stewart
[Why & How] The logic for choosing between the dce_aux_transfer function variants is moved into dce_aux.c rather than link_ddc.c. The "dce_aux_transfer_with_retries" function now uses dce_aux_transfer_raw in its implementation as the logic is equivalent. Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com> Reviewed-by: Gabe Teeger <gabe.teeger@amd.com> Signed-off-by: Matthew Stewart <Matthew.Stewart2@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: only call pmfw if smu present flags trueCharlene Liu
[Why & How] for fault safe case: only call pmfw if smu present flags true and default to 2 channle for bios intergration info table error. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Fix warningsClay King
[Why & How] Fix various warnings related to unsigned/signed mismatches - Consistently use the same signedness for a given value - Explcitly cast between types when needed Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Clay King <clayking@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Fix multiple compiler warningsGaghik Khachatrian
[Why] Unreachable Code; Copy Constructor Deleted; Local Declaration Hides Parameter; Local Declaration Hides Outer Scope; Uninitialized or Suspicious Memory Use. [How] - Removed or refactored unreachable code paths - Ensured proper copy constructors in C++ classes - Renamed local variables that shadowed function parameters - Renamed inner loop/block variables to avoid shadowing outer scope Fixed in 8 files across several FPU layers Also fixed in color_gamma and cs_funcs modules - Reordered guard conditions to validate pipe type before accessing stream - Ensures safe memory access patterns in DC DMUB service layer All changes maintain backward compatibility and preserve functional behavior. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Fix compiler warnings in dml2Gaghik Khachatrian
[Why & How] In dml2_translation_helper.c, rename the inner loop index inside dml2_init_soc_states() for several project cases to avoid shadowing the outer function-scope index variable. In display_mode_core.c, replace shift-based power-of-two expressions used to compute dpte_row_height and dpte_row_height_linear with an equivalent floating-point power function, consistent with existing usage elsewhere in the file. Behavior for valid inputs is preserved in both cases. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Fix signed/unsigned comparison mismatchesGaghik Khachatrian
[Why] Address signed/unsigned comparison warnings in DC paths to keep builds warning-clean and improve type safety at comparison boundaries. Most warnings came from signed loop/index temporaries compared against unsigned counters (for example pipe_count, num_states, and resource-cap counters), plus a small number of mixed signed/unsigned checks in writeback and clock-related assertions. [How] Aligned iterator and temporary variable types with the semantic type of the compared bounds. Used unsigned indices for loops bounded by unsigned counters, and retained signed types where values are semantically signed (for example arithmetic with sentinel or signed intermediate values). Where mixed signed/unsigned comparisons are intentional, applied explicit boundary casts or split assertions (for example non-negative signed-cap checks before unsigned comparisons) instead of broad type changes. No functional behavior changes are intended; this is a warning-resolution and type-alignment cleanup. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Fix CRC open failure during active renderingTom Chung
[Why] Opening the CRC data file during active rendering can fail with -EINVAL. The wait for commit->hw_done returns remaining jiffies on success, but the CRC path was treating that as an error. [How] Handle wait_for_completion_interruptible_timeout() correctly: positive return as success, 0 as timeout, and negative as error. Reviewed-by: Ray Wu <ray.wu@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Fix white screen on boot with OLED panelRay Wu
[Why] During mode change, replay_event_general_ui may remain set on the old stream while replay_event_hw_programming is set. This can re-enable Replay too early before hardware programming is complete. [How] Clear replay_event_general_ui in the mode-change path when setting replay_event_hw_programming to keep Replay blocked until programming finishes, avoiding white screen on OLED panels after boot. Reviewed-by: Sunpeng Li <sunpeng.li@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-11drm/amd/display: Fix refresh rate round up caseChunTao Tso
[Why & How] fix refresh rate round up case Reviewed-by: Robin Chen <robin.chen@amd.com> Signed-off-by: ChunTao Tso <ChunTao.Tso@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-07Merge tag 'amd-drm-next-7.2-2026-05-06' of ↵Dave Airlie
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-7.2-2026-05-06: amdgpu: - GFX9 fixes - Hawaii SMU fixes - SDMA4 fix - GART fixes - Userq fixes - Finish support for using multiple SDMA queues for TTM operations - SWSMU updates - Misc cleanups and fixes - GC 12.1 updates - RAS updates - SMU 15.0.8 updates - DCN 4.2 updates - DC type conversion fixes - Enable DC power module - Replay/PSR updates - SMU 13.x updates - Compute queue quantum MQD updates - ASPM fix - GPUVM fixes - DCE 6 fixes - Align VKMS with common implementation - RDNA 4 fix - DC analog support fixes - UVD 3 fixes - TCC harvesting fixes for SI - GC 11 APU module reload fix - NBIO 6.3.2 support - IH 7.1 updates - DC cursor fixes - VCN user fence fixes - JPEG user fence fixes - DC support for connectors without DDC - Prefer ROM BAR for default VGA device - DC bandwidth fixes amdkfd: - GPUVM TLB flush fix - Hotplug fix - Boundary check fixes - Misc cleanups and fixes - SVM fixes - CRIU fixes radeon: - Hawaii SMU fixes - Misc cleanups and fixes From: Alex Deucher <alexander.deucher@amd.com> Link: https://patch.msgid.link/20260506164726.1733646-1-alexander.deucher@amd.com Signed-off-by: Dave Airlie <airlied@redhat.com>
2026-05-05drm/amd/display: Promote DC to 3.2.381Taimur Hassan
This version brings along following update: -add max bandwidth budget to QoS interface -Update tmz field for LSDMA -fix buffer overruns warnings -add memory bandwidth override debug interface -Find link encoder for flexible DIG mapping cases -Fix type mismatches using guards and explicit casts -Fix type mismatches in DC and DMUB modules -Skip HDR metadata update when Smart Power OLED enabled -Rename backlight_properties to pwr_backlight_properties -remove watermark range notify -Clean Up Legacy DML Content -Implement block sequencing infrastructure for modular hardware operations. -Do DML float narrowing explicit -Fix type mismatches in DML and normalize loop bounds -Remove unused state param from enable_link_analog -Fix Color Manager (3DLUT, Shaper, Blend) Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: add max bandwidth budget to QoS interfaceWenjing Liu
[Why] The QoS reporting interface lacked a field to expose the maximum active memory bandwidth budget. Adding this field allows callers to observe the effective bandwidth ceiling. [How] Rename struct memory_qos to dc_measured_memory_qos and introduce a new struct dc_requested_memory_qos holding bandwidth lower bound, calculated average bandwidth, latency upper bounds, and max bandwidth budget. Add a get_requested_memory_qos function pointer to clk_mgr_funcs. Update dc_get_qos_info to call through the new function pointer and populate all requested QoS fields including qos_max_bw_budget_in_mbps in dc_qos_info. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: Update tmz field for LSDMAAlvin Lee
[Why & How] TMZ field should be 4-bits wide instead of 1. Also add missing src/dst_cache_policy fields to tiled copy struct. Reviewed-by: Rafal Ostrowski <rafal.ostrowski@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: fix buffer overruns warningsGaghik Khachatrian
[Why & How] Fixes a warning by adding bounds checks and index validation in dml2_0 sources to address static analysis warnings. Ensures safe array access and prevents out-of-bounds reads by validating indices before use, improving robustness and reliability in the affected files. Reviewed-by: Austin Zheng <austin.zheng@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: add memory bandwidth override debug interfaceWenjing Liu
[Why & How] Add override_memory_bandwidth_request to clk_mgr_funcs and get_utm_qos_model callback to soc_and_ip_translator_funcs for future test use. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: Find link encoder for flexible DIG mapping casesOvidiu Bunea
[why & how] link->link_enc can only be used to identify the link's link encoder when the link is not permitted to use flexible link encoder assignments. Use the correct function for identifying link encoder and add function pointer guards before calling them. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: Fix type mismatches using guards and explicit castsGaghik Khachatrian
[Why] Address signed/unsigned comparison warnings across dc paths to keep builds warning-clean and improve type safety at comparison boundaries. Most warnings came from signed loop/index temporaries compared against unsigned counters and table sizes, plus a smaller number of mixed signed/unsigned clock, bandwidth, and geometry comparisons. [How] Aligned iterator and temporary variable types with the semantic type of the compared bounds. Used unsigned indices for loops bounded by unsigned counters and table sizes, while retaining signed types where values are semantically signed or participate in arithmetic that may legitimately go negative. Where mixed signed/unsigned comparisons are intentional, applied explicit boundary casts or guarded comparisons instead of broad type changes. No functional behavior changes are intended; this is a warning-resolution and type-alignment cleanup. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: Fix type mismatches in DC and DMUB modulesGaghik Khachatrian
[Why] Address signed/unsigned comparison warnings across dc paths to keep builds warning-clean and improve type safety at comparison boundaries. Most warnings came from signed loop/index temporaries compared against unsigned counters and table sizes, plus a smaller number of mixed signed/unsigned clock, bandwidth, and geometry comparisons. [How] Aligned loop/index and bound types in the affected modules and DMUB sources, including color, freesync, power, stats, and vmid paths. Used unsigned iterators where bounds/counters are unsigned, preserved signed types where negative values are meaningful, and updated related format specifiers where type changes required it. Changes are limited to warning resolution and type alignment. No functional behavior change is intended. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: Skip HDR metadata update when Smart Power OLED enabledIan Chen
[Why & How] While smart power oled is enabled, the infopacket contents are tied to the frame histogram, so it does not need driver side to update the hdr metadata. Reviewed-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Anthony Koo <anthony.koo@amd.com> Signed-off-by: Ian Chen <ian.chen@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: Rename backlight_properties to pwr_backlight_propertiesRay Wu
[Why] 'struct backlight_properties' in power.c has the same name as the kernel's struct defined in <linux/backlight.h>. In out-of-tree backport build environments, the header is forcefully injected via command-line includes, causing a redefinition error. [How] Rename the file-local 'struct backlight_properties' to 'pwr_backlight_properties' to avoid the name collision. No functional change. Reviewed-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: remove watermark range notifyCharlene Liu
[Why & How] dcn42 only use one set of watermark A, driver always update set A runtime. no need to notify pmfw the clock range. Reviewed-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: Clean Up Legacy DML ContentZheng, Austin
[Why & How] Legacy files were used for the transition period between DML1 and DML2. Fully transitioned away from DML1 so these legacy files can be removed since they are not actively being used. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Zheng Austin <Austin.Zheng@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: Implement block sequencing infrastructure for modular ↵Bhuvanachandra Pinninti
hardware operations. [why] Hardware sequencer operations need better modularity and testability. Current monolithic functions make it difficult to unit test individual operations and create maintainable workflows. [how] Implement new hwss_add_* helper functions with standardized parameter structures. Add block_sequence_state framework for execution context management. Create cursor, info frame, DSC, and stream encoder sequence functions with comprehensive unit test support. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Bhuvanachandra Pinninti <BhuvanaChandra.Pinninti@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: Do DML float narrowing explicitGaghik Khachatrian
[Why] Shared DML wrapper helpers in [dc/dml/dml_inline_defs.h](dc/dml/dml_inline_defs.h) pass double and int values to float-based dcn_bw_* helpers. Make these intentional narrowing boundaries explicit to reduce warning noise without changing behavior. [How] Add explicit C-style casts at the float API boundary in the shared DML inline wrappers used by the DCN DML paths. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: Fix type mismatches in DML and normalize loop boundsGaghik Khachatrian
[Why] Address signed/unsigned comparison warnings across DML paths to keep builds warning-clean and improve type safety at comparison boundaries. Most warnings came from signed loop/index temporaries compared against unsigned counters (for example pipe_count, num_states, and candidate/state counts), plus a small number of mixed signed/unsigned clock and geometry checks. [How] Aligned iterator and temporary variable types with the semantic type of the compared bounds. Used unsigned indices for loops bounded by unsigned counters, and retained signed types where values are semantically signed (for example plane_count math, timing/micro-schedule arithmetic, and reverse/sentinel-style iteration). Where mixed signed/unsigned comparisons are intentional, applied explicit boundary casts instead of broad type changes (for example dispclk minimum clamp and selected timing/height comparisons). As a side effect of converting count parameters such as NumberOfActivePlanes to unsigned, normalized equivalent loop forms from: for (i = 0; i <= NumberOfActivePlanes - 1; i++) into the normalized form: for (i = 0; i < NumberOfActivePlanes; i++) to keep bound style coherent and avoid avoidable mismatch patterns. No functional behavior changes are intended; this is a warning-resolution and type-alignment cleanup. Assisted-by: Copilot Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: Remove unused state param from enable_link_analogAlex Hung
[WHY & HOW] The 'state' parameter in enable_link_analog() is never used within the function body. Remove it from the function. Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: Fix Color Manager (3DLUT, Shaper, Blend)Dillon Varone
[WHY & HOW] The original refactor and fixes are causing regressions. Revert them for now until they can be resolved Fixes: e56e3cff2a1b ("drm/amd/display: Sync dcn42 with DC 3.2.373") Reviewed-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Dillon Varone <Dillon.Varone@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: dmub_cmd.h: add missing kernel-doc for enumsRandy Dunlap
For enums that have a kernel-doc ("/**") comment block, add or correct their kernel-doc to eliminate all kernel-doc enum warnings. Some of these needed "struct" changed to "enum" in the kernel-doc header. For a few of them, I changed the "/**" comment to a plain "/*" comment since there was no kernel-doc content there. Example: Warning: drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h:2673 Enum value 'FAMS2_ALLOW_DELAY_CHECK_NONE' not described in enum 'dmub_fams2_allow_delay_check_mode' Warning: drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h:2673 Enum value 'FAMS2_ALLOW_DELAY_CHECK_FROM_START' not described in enum 'dmub_fams2_allow_delay_check_mode' Warning: drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h:2673 Enum value 'FAMS2_ALLOW_DELAY_CHECK_FROM_PREPARE' not described in enum 'dmub_fams2_allow_delay_check_mode' All .o files are the same with or without this patch. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-05-05drm/amd/display: dmub_cmd.h: correct all kernel-doc prototype warningsRandy Dunlap
Correct all typedef, struct, and union prototype warnings in dmub_cmd.h by using the matching names or "typedef" keyword: Warning: drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h:961 cannot understand function prototype: 'typedef uint32_t dmub_trace_code_t;' Warning: drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h:1183 expecting prototype for union dmub_shared_state_ips_fw. Prototype was for union dmub_shared_state_ips_fw_signals instead Warning: drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h:1203 expecting prototype for union dmub_shared_state_ips_signals. Prototype was for union dmub_shared_state_ips_driver_signals instead Warning: drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h:1253 expecting prototype for struct dmub_shared_state_cursor_offload_v1. Prototype was for struct dmub_shared_state_cursor_offload_stream_v1 instead Warning: drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h:1269 struct dmub_shared _state_feature_common { uint32_t padding[62]; };: error: Cannot parse enum! Warning: drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h:1278 struct dmub_shared _state_feature_header { uint16_t id; uint16_t version; uint32_t reserved; };: error: Cannot parse enum! Warning: drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h:2001 expecting prototype for struct dmub_cmd_read_modify_write_sequence. Prototype was for struct dmub_rb_cmd_read_modify_write instead Warning: drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h:2191 expecting prototype for struct dmub_rb_cmd_cab. Prototype was for struct dmub_rb_cmd_cab_for_ss instead Warning: drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h:2875 expecting prototype for struct dmub_cmd_set_pixel_clock_data. Prototype was for struct dmub_rb_cmd_set_pixel_clock instead Warning: drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h:3398 expecting prototype for union dpia_notify_data_type. Prototype was for union dpia_notification_data instead Warning: drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h:3447 expecting prototype for struct dmub_rb_cmd_hpd_sense_notify. Prototype was for struct dmub_rb_cmd_hpd_sense_notify_data instead Warning: drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h:6267 expecting prototype for struct dmub_cmd_cable_id_input. Prototype was for struct dmub_cmd_cable_id_output instead Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.0.4) at 2026-08-05 02:16:00 +0000