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path: root/drivers/gpu/drm/i915/intel_dp.c
AgeCommit message (Expand)Author
2015-10-13drm/i915: Throw out some useless variablesVille Syrjälä
2015-10-08drm/i915: use error pathSudip Mukherjee
2015-10-06drm/i915: Rename DP link training functionsAnder Conselvan de Oliveira
2015-10-06drm/i915: Don't bypass LRC on CHVVille Syrjälä
2015-09-30drm/i915: make backlight hooks connector specificJani Nikula
2015-09-30drm/i915: Constify adjusted_modeVille Syrjälä
2015-09-30Merge remote-tracking branch 'airlied/drm-next' into drm-intel-nextDaniel Vetter
2015-09-23drm/i915: Make sure we don't detect eDP on g4xVille Syrjälä
2015-09-23drm/i915: Check live status before reading edidSonika Jindal
2015-09-21drm/i915/skl: handle port E in cpt_digital_port_connectedJani Nikula
2015-09-14drm/i915/bxt: Use intel_encoder->hpd_pin to check live statusSonika Jindal
2015-09-08drm/i915: Handle DP_AUX_I2C_WRITE_STATUS_UPDATEVille Syrjälä
2015-09-04drm/i915: use the yesno helper for loggingJani Nikula
2015-09-04drm/i915: ignore link rate in TPS3 selectionJani Nikula
2015-09-04drm/i915/dp: move TPS3 logic to where it's usedJani Nikula
2015-09-02Merge tag 'drm-intel-next-fixes-2015-09-02' into drm-intel-next-queuedDaniel Vetter
2015-09-02drm/i915: move intel_hrawclk() to intel_display.cJani Nikula
2015-09-01drm/i915: Clean up CHV lane soft reset programmingVille Syrjälä
2015-09-01i915: Set ddi_pll_sel in DP MST pathAnder Conselvan de Oliveira
2015-09-01drm/i915/dp: use the drm dp helper for determining sink tps3 supportJani Nikula
2015-09-01drm/i915: Don't use link_bw for PLL setupVille Syrjälä
2015-08-31drm/i915: eDP can be present on DDI-ERodrigo Vivi
2015-08-31drm/i915: Check DP link status on long hpd tooVille Syrjälä
2015-08-26drm/i915: Force common lane on for the PPS kick on CHVVille Syrjälä
2015-08-26drm/i915: Trick CL2 into life on CHV when using pipe B with port BVille Syrjälä
2015-08-26drm/i915: Implement PHY lane power gating for CHVVille Syrjälä
2015-08-26drm/i915/bxt: Use correct live status register for BXT platformJani Nikula
2015-08-26drm/i915: split g4x_digital_port_connected to g4x and vlv variantsJani Nikula
2015-08-26drm/i915: split ibx_digital_port_connected to ibx and cpt variantsJani Nikula
2015-08-26drm/i915: add common intel_digital_port_connected functionJani Nikula
2015-08-26drm/i915: add MISSING_CASE annotation to ibx_digital_port_connectedJani Nikula
2015-08-26drm/i915: make g4x_digital_port_connected return boolean statusJani Nikula
2015-08-26drm/i915: move ibx_digital_port_connected to intel_dp.cJani Nikula
2015-08-26drm/i915: Add encoder->post_pll_disable() hooks and move CHV clock buffer dis...Ville Syrjälä
2015-08-26drm/i915: Always program unique transition scale for CHVVille Syrjälä
2015-08-26drm/i915: Put back lane_count into intel_dp and add link_rate tooVille Syrjälä
2015-08-26drm/i915/skl: enable DDI-E hotplugXiong Zhang
2015-08-24drm/i915: fix link rates reported for SKLThulasimani,Sivakumar
2015-08-24Merge tag 'v4.2-rc8' into drm-nextDave Airlie
2015-08-19drm/i915: Avoid TP3 on CHVThulasimani,Sivakumar
2015-08-19drm/i915: remove HBR2 from chv supported listThulasimani,Sivakumar
2015-08-19Revert "drm/i915: Add eDP intermediate frequencies for CHV"Thulasimani,Sivakumar
2015-08-14drm/i915: Kill intel_dp->{link_bw, rate_select}Ville Syrjälä
2015-08-14drm/i915: Don't use link_bw to select between TP1 and TP3Ville Syrjälä
2015-08-14drm/i915: Move intel_dp->lane_count into pipe_configVille Syrjälä
2015-08-14drm/i915: Avoid confusion between DP and TRANS_DP_CTL in DP .get_config()Ville Syrjälä
2015-08-14drm/i915: Don't use link_bw for PLL setupVille Syrjälä
2015-08-14drm/i915: Clean up DP/HDMI limited color range handlingVille Syrjälä
2015-08-14drm/i915/bxt: WA for swapped HPD pins in A steppingSonika Jindal
2015-08-14drm/i915: Dont -ETIMEDOUT on identical new and previous (count, crc).Rodrigo Vivi
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