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2024-11-11drm/msm/adreno: Setup SMMU aparture for per-process page tableBjorn Andersson
Support for per-process page tables requires the SMMU aparture to be setup such that the GPU can make updates with the SMMU. On some targets this is done statically in firmware, on others it's expected to be requested in runtime by the driver, through a SCM call. One place where configuration is expected to be done dynamically is the QCS6490 rb3gen2. The downstream driver does this unconditioanlly on any A6xx and newer, so follow suite and make the call. Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Link: https://lore.kernel.org/r/20241110-adreno-smmu-aparture-v2-2-9b1fb2ee41d4@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-11-04Backmerge v6.12-rc6 of ↵Dave Airlie
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into drm-next Backmerge Linus tree for some drm-fixes needed for msm and xe merges. Signed-off-by: Dave Airlie <airlied@redhat.com>
2024-11-03drm/msm/dpu: rework documentation commentsDmitry Baryshkov
Unfortunately the tooling doesn't check documents placed before funciton prototypes. Such comments frequently become outdated, miss several params, etc. Move documentation for the functions to be placed before the actual function body, allowing 'make W=1' to actually check these comments and report an error. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/622690/ Link: https://lore.kernel.org/r/20241102-dpu-docs-rework-v1-1-d735853fd6db@linaro.org
2024-11-02drm/msm/mdss: use register definitions instead of hand-coding themDmitry Baryshkov
Move existing register definitions to mdss.xml and use generated defines for registers access instead of hand-coding everything in the source file. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/615312/ Link: https://lore.kernel.org/r/20240921-msm-mdss-ubwc-v1-2-411dcf309d05@linaro.org
2024-11-02drm/msm: move MDSS registers to separate header fileDmitry Baryshkov
In preparation of adding more registers, move MDSS-related headers to the separate top-level file. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/615310/ Link: https://lore.kernel.org/r/20240921-msm-mdss-ubwc-v1-1-411dcf309d05@linaro.org
2024-11-02drm/msm/dpu: move rot90 checking to dpu_plane_atomic_check_sspp()Dmitry Baryshkov
Move a call to dpu_plane_check_inline_rotation() to the dpu_plane_atomic_check_sspp() function, so that the rot90 constraints are checked for both SSPP blocks. Also move rotation field from struct dpu_plane_state to struct dpu_sw_pipe_cfg. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/621485/ Link: https://lore.kernel.org/r/20241025-dpu-virtual-wide-v6-6-0310fd519765@linaro.org
2024-11-02drm/msm/dpu: split dpu_plane_atomic_check()Dmitry Baryshkov
Split dpu_plane_atomic_check() function into two pieces: dpu_plane_atomic_check_nosspp() performing generic checks on the pstate, without touching the associated SSPP blocks, and dpu_plane_atomic_check_sspp(), which takes into account used SSPPs. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/621484/ Link: https://lore.kernel.org/r/20241025-dpu-virtual-wide-v6-5-0310fd519765@linaro.org
2024-11-02drm/msm/dpu: move scaling limitations out of the hw_catalogDmitry Baryshkov
Max upscale / downscale factors are constant between platforms. In preparation to adding support for virtual planes and allocating SSPP blocks on demand move max scaling factors out of the HW catalog and handle them in the dpu_plane directly. If any of the scaling blocks gets different limitations, this will have to be handled separately, after the plane refactoring. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/621481/ Link: https://lore.kernel.org/r/20241025-dpu-virtual-wide-v6-4-0310fd519765@linaro.org
2024-11-02drm/msm/dpu: drop virt_formats from SSPP subblock configurationDmitry Baryshkov
The virt_formats / virt_num_formats are not used by the current driver and are not going to be used in future since formats for virtual planes are handled in a different way, by forbidding unsupported combinations during atomic_check. Drop those fields now. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/621479/ Link: https://lore.kernel.org/r/20241025-dpu-virtual-wide-v6-3-0310fd519765@linaro.org
2024-11-02drm/msm/dpu: move pstate->pipe initialization to dpu_plane_atomic_checkDmitry Baryshkov
In preparation for virtualized planes support, move pstate->pipe initialization from dpu_plane_reset() to dpu_plane_atomic_check(). In case of virtual planes the plane's pipe will not be known up to the point of atomic_check() callback. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/621477/ Link: https://lore.kernel.org/r/20241025-dpu-virtual-wide-v6-2-0310fd519765@linaro.org
2024-11-02drm/msm/dpu: use drm_rect_fp_to_int()Dmitry Baryshkov
Use the drm_rect_fp_to_int() helper instead of using the hand-written code. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/621476/ Link: https://lore.kernel.org/r/20241025-dpu-virtual-wide-v6-1-0310fd519765@linaro.org
2024-11-01drm/msm: drop MAX_BRIDGES defineDmitry Baryshkov
The const MAX_BRIDGES is unused after the commit 4d1a1e4686bd ("drm/msm: remove msm_drm_private::bridges field"), drop it now. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/622537/ Link: https://lore.kernel.org/r/20241031-dpu-move-topology-v1-3-8ffa8122d3b6@linaro.org
2024-11-01drm/msm: move MAX_H_TILES_PER_DISPLAY to the DPU driverDmitry Baryshkov
The MAX_H_TILES_PER_DISPLAY const is only used by the DPU driver, move it to the corresponding header. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/622536/ Link: https://lore.kernel.org/r/20241031-dpu-move-topology-v1-2-8ffa8122d3b6@linaro.org
2024-11-01drm/msm: move msm_display_topology to the DPU driverDmitry Baryshkov
The struct msm_display_topology is only used by the DPU driver. Remove it from the global header and move it to DPU-specific header. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/622534/ Link: https://lore.kernel.org/r/20241031-dpu-move-topology-v1-1-8ffa8122d3b6@linaro.org
2024-10-31drm/msm/dpu: cast crtc_clk calculation to u64 in _dpu_core_perf_calc_clk()Zichen Xie
There may be a potential integer overflow issue in _dpu_core_perf_calc_clk(). crtc_clk is defined as u64, while mode->vtotal, mode->hdisplay, and drm_mode_vrefresh(mode) are defined as a smaller data type. The result of the calculation will be limited to "int" in this case without correct casting. In screen with high resolution and high refresh rate, integer overflow may happen. So, we recommend adding an extra cast to prevent potential integer overflow. Fixes: c33b7c0389e1 ("drm/msm/dpu: add support for clk and bw scaling for display") Signed-off-by: Zichen Xie <zichenxie0106@gmail.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/622206/ Link: https://lore.kernel.org/r/20241029194209.23684-1-zichenxie0106@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-10-31drm/msm/dp: tidy up platform data namesDmitry Baryshkov
Follow the established symbol name pattern and rename platform data structures. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/622213/ Link: https://lore.kernel.org/r/20241029-msm-dp-rename-v2-3-13c5c03fad44@linaro.org
2024-10-31drm/msm/dp: rename edp_ bridge functions and structDmitry Baryshkov
Follow the estalished prefix and rename eDP bridge symbols to use msm_edp_ prefix, moving the edp to the end of the symbol name. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/622210/ Link: https://lore.kernel.org/r/20241029-msm-dp-rename-v2-2-13c5c03fad44@linaro.org
2024-10-31drm/msm/dp: prefix all symbols with msm_dp_Dmitry Baryshkov
For historical reasons a lot of symbols in the MSM DisplayPort driver used the generic dp_ prefix. Perform a mass-rename of those symbols to use msm_dp prefix. Basically this is a result of the following script: sed drivers/gpu/drm/msm/dp/* -i -e 's/\<dp_/msm_dp_/g' sed drivers/gpu/drm/msm/dp/* -i -e 's/"msm_dp_/"dp_/g' sed drivers/gpu/drm/msm/dp/* -i -e 's/msm_\(dp_sdp_header\|dp_sdp\)\>/\1/g' Yes, this also results in renaming of several struct fields in addition to renaming the structs and functions, but I think the simple solution is better than the more complex one. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202410250305.UHKDhtxy-lkp@intel.com/ Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/622211/ Link: https://lore.kernel.org/r/20241029-msm-dp-rename-v2-1-13c5c03fad44@linaro.org
2024-10-30Merge remote-tracking branch 'drm-misc/drm-misc-next' into msm-nextRob Clark
Merging to pick up commit 785324db2d7a ("drm/msm/dp: migrate the ycbcr_420_allowed to drm_bridge"). Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-10-28drm/msm/a6xx: Fix excessive stack usageAkhil P Oommen
Clang-19 and above sometimes end up with multiple copies of the large a6xx_hfi_msg_bw_table structure on the stack. The problem is that a6xx_hfi_send_bw_table() calls a number of device specific functions to fill the structure, but these create another copy of the structure on the stack which gets copied to the first. If the functions get inlined, that busts the warning limit: drivers/gpu/drm/msm/adreno/a6xx_hfi.c:631:12: error: stack frame size (1032) exceeds limit (1024) in 'a6xx_hfi_send_bw_table' [-Werror,-Wframe-larger-than] Fix this by kmalloc-ating struct a6xx_hfi_msg_bw_table instead of using the stack. Also, use this opportunity to skip re-initializing this table to optimize gpu wake up latency. Cc: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/621814/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-10-27drm/msm/gpu: Check the status of registration to PM QoSLukasz Luba
There is a need to check the returned value of the registration function. In case of returned error, print that and stop the init process. Fixes: 7c0ffcd40b16 ("drm/msm/gpu: Respect PM QoS constraints") Signed-off-by: Lukasz Luba <lukasz.luba@arm.com> Patchwork: https://patchwork.freedesktop.org/patch/620336/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-10-27drm/msm/adreno: Use IRQF_NO_AUTOEN flag in request_irq()Jinjie Ruan
disable_irq() after request_irq() still has a time gap in which interrupts can come. request_irq() with IRQF_NO_AUTOEN flag will disable IRQ auto-enable when request IRQ. Fixes: 4b565ca5a2cb ("drm/msm: Add A6XX device support") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Patchwork: https://patchwork.freedesktop.org/patch/614075/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-10-27drm/msm: Fix some typos in commentShen Lichuan
Fixed some spelling errors, the details are as follows: -in the code comments: collpase->collapse firwmare->firmware everwhere->everywhere Fixes: 2401a0084614 ("drm/msm: gpu: Add support for the GPMU") Fixes: 5a903a44a984 ("drm/msm/a6xx: Introduce GMU wrapper support") Fixes: f97decac5f4c ("drm/msm: Support multiple ringbuffers") Signed-off-by: Shen Lichuan <shenlichuan@vivo.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/614109/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-10-27drm/msm/a6xx: Add support for A663Puranam V G Tejaswi
Add support for Adreno 663 found on sa8775p based platforms. Signed-off-by: Puranam V G Tejaswi <quic_pvgtejas@quicinc.com> Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/620768/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-10-27drm/msm/a6xx: Remove logically deadcode in a6xx_preempt.cEverest K.C.
The ternary operator never returns -1 as `ring` will never be NULL. Thus, the ternary operator is not needed. Fix this by removing the ternary operation and only including the value it will return when the `ring` is not NULL. This was reported by Coverity Scan. https://scan7.scan.coverity.com/#/project-view/51525/11354?selectedIssue=1600286 Fixes: 35d36dc1692f ("drm/msm/a6xx: Add traces for preemption") Signed-off-by: Everest K.C. <everestkc@everestkc.com.np> Patchwork: https://patchwork.freedesktop.org/patch/619349/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2024-10-27drm/msm: Simplify NULL checking in msm_disp_state_dump_regs()Douglas Anderson
The msm_disp_state_dump_regs(): - Doesn't allocate if the caller already allocated. ...but there's one caller and it doesn't allocate so we don't need this check. - Checks for allocation failure over and over even though it could just do it once right after the allocation. Clean this up. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/619660/ Link: https://lore.kernel.org/r/20241014093605.3.I66049c2c17bd82767661f0ecd741b20453da02b2@changeid Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-10-24drm/msm/dp: migrate the ycbcr_420_allowed to drm_bridgeDmitry Baryshkov
Instead of forcing the ycbcr_420_allowed flag to be set on the created drm_connector, set it on the drm_bridge instance and allow drm_bridge_connecgtor to propagate it to the drm_connector. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20241019-bridge-yuv420-v1-5-d74efac9e4e6@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-10-21drm/msm/dpu: sync mode_config limits to the FB limits in dpu_plane.cDmitry Baryshkov
Lift mode_config limits set by the DPU driver to the actual FB limits as handled by the dpu_plane.c. Move 2*max_lm_width check where it belongs, to the drm_crtc_helper_funcs::mode_valid() callback. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/612259/ Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-15-617e1ecc4b7a@linaro.org
2024-10-21drm/msm/dpu: merge MAX_IMG_WIDTH/HEIGHT with DPU_MAX_IMG_WIDTH/HEIGHTDmitry Baryshkov
dpu_formats.c defines DPU_MAX_IMG_WIDTH and _HEIGHT, while dpu_hw_catalog.h defines just MAX_IMG_WIDTH and _HEIGHT. Merge these constants to remove duplication. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/612255/ Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-14-617e1ecc4b7a@linaro.org
2024-10-21drm/msm/dpu: check for the plane pitch overflowDmitry Baryshkov
Check that the plane pitch doesn't overflow the maximum pitch size allowed by the hardware. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/612253/ Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-13-617e1ecc4b7a@linaro.org
2024-10-21drm/msm/dpu: move layout setup population out of dpu_plane_prepare_fb()Dmitry Baryshkov
Move the call to dpu_format_populate_plane_sizes() to the atomic_check step, so that any issues with the FB layout can be reported as early as possible. At the same time move the call to dpu_format_populate_addrs() to dpu_plane_sspp_atomic_update(). This way the all layout management is performed only for the visible planes: the .prepare_fb callback is called for not visible planes too, so keeping dpu_format_populate_addrs in dpu_plane_prepare_fb() will require dpu_format_populate_plane_sizes() to be called for !visible planes too. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/612251/ Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-12-617e1ecc4b7a@linaro.org
2024-10-21drm/msm/dpu: make dpu_format_populate_addrs return voidDmitry Baryshkov
The function msm_framebuffer_iova() can not fail, it always returns a valid address. Drop the useless checks (that were already performed at the time) and make dpu_format_populate_addrs() return void. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/612247/ Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-11-617e1ecc4b7a@linaro.org
2024-10-21drm/msm/dpu: split dpu_format_populate_layoutDmitry Baryshkov
Split dpu_format_populate_layout() into addess-related and pitch/format-related parts. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/612244/ Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-10-617e1ecc4b7a@linaro.org
2024-10-21drm/msm/dpu: move pitch check to _dpu_format_get_plane_sizes_linear()Dmitry Baryshkov
The _dpu_format_get_plane_sizes_linear() already compares pitches of the framebuffer with the calculated pitches. Move the check to the same place, demoting DPU_ERROR to DPU_DEBUG to prevent user from spamming the kernel log. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/612245/ Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-9-617e1ecc4b7a@linaro.org
2024-10-21drm/msm/dpu: pass drm_framebuffer to _dpu_format_get_plane_sizes()Dmitry Baryshkov
Instead of passing width / height / pitches, pass drm_framebuffer directly. This allows us to drop the useless check for !pitches, since an array can not be NULL. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/612248/ Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-8-617e1ecc4b7a@linaro.org
2024-10-21drm/msm/dpu: drop msm_format from struct dpu_hw_fmt_layoutDmitry Baryshkov
The struct dpu_hw_fmt_layout defines hardware data layout (addresses, sizes and pitches. Drop format field from this structure as it's not a part of the data layout. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/612242/ Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-7-617e1ecc4b7a@linaro.org
2024-10-21drm/msm/dpu: drop extra aspace checks in dpu_formatsDmitry Baryshkov
The DPU driver isn't expected to be used without an IOMMU. Thus the aspace will be always present. Not to mention that mdp4/mdp5 drivers call msm_framebuffer_iova() without such checks, as the whole msm_framebuffer layer is expected to support both IOMMU and IOMMU-less configurations. Drop these useless if (aspace) checks. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/612249/ Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-6-617e1ecc4b7a@linaro.org
2024-10-21drm/msm/dpu: drop dpu_format_populate_layout from dpu_plane_sspp_atomic_updateDmitry Baryshkov
The dpu_plane_prepare_fb() already calls dpu_format_populate_layout(). Store the generated layout in the plane state and drop this call from dpu_plane_sspp_update(). Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/612240/ Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-5-617e1ecc4b7a@linaro.org
2024-10-21drm/msm/dpu: drop dpu_format_check_modified_formatDmitry Baryshkov
The msm_kms_funcs::check_modified_format() callback is not used by the driver. Drop it completely. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/612239/ Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-4-617e1ecc4b7a@linaro.org
2024-10-21drm/msm/dpu: Add SA8775P supportMahadevan
Add definitions for the display hardware used on the Qualcomm SA8775P platform. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Mahadevan <quic_mahap@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/620499/ Link: https://lore.kernel.org/r/20241019-patchv3_1-v5-4-d2fb72c9a845@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-10-21drm/msm: mdss: Add SA8775P supportMahadevan
Add Mobile Display Subsystem (MDSS) support for the SA8775P platform. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Mahadevan <quic_mahap@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/620496/ Link: https://lore.kernel.org/r/20241019-patchv3_1-v5-3-d2fb72c9a845@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-10-21drm/msm: Use video aperture helpersThomas Zimmermann
DRM's aperture functions have long been implemented as helpers under drivers/video/ for use with fbdev. Avoid the DRM wrappers by calling the video functions directly. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Cc: Rob Clark <robdclark@gmail.com> Cc: Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: Sean Paul <sean@poorly.run> Cc: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Javier Martinez Canillas <javierm@redhat.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-10-21drm/msm/dpu: drop LM_3 / LM_4 on MSM8998Dmitry Baryshkov
On the MSM8998 platform ther are no LM_3 and LM_4 blocks. Drop them from the MSM8998 catalog. Fixes: 94391a14fc27 ("drm/msm/dpu1: Add MSM8998 to hw catalog") Reported-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/612585/ Link: https://lore.kernel.org/r/20240905-dpu-fix-sdm845-catalog-v1-3-3363d03998bd@linaro.org
2024-10-21drm/msm/dpu: drop LM_3 / LM_4 on SDM845Dmitry Baryshkov
On the SDM845 platform ther are no LM_3 and LM_4 blocks. Drop them from the SDM845 catalog. Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/612586/ Link: https://lore.kernel.org/r/20240905-dpu-fix-sdm845-catalog-v1-2-3363d03998bd@linaro.org
2024-10-21drm/msm/dpu: on SDM845 move DSPP_3 to LM_5 blockDmitry Baryshkov
On the SDM845 platform the DSPP_3 is used by the LM_5. Correct corresponding entries in the sdm845_lm array. Fixes: c72375172194 ("drm/msm/dpu/catalog: define DSPP blocks found on sdm845") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/612584/ Link: https://lore.kernel.org/r/20240905-dpu-fix-sdm845-catalog-v1-1-3363d03998bd@linaro.org
2024-10-21drm/msm8998: make const arrays ratio_list and band_list staticColin Ian King
Don't populate the const read-only arrays ratio_list and band_list on the stack at run time, instead make them static. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/614156/ Link: https://lore.kernel.org/r/20240912151037.592477-1-colin.i.king@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-10-21drm/msm: Remove unneeded semicolonYang Li
./drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c:282:2-3: Unneeded semicolon This patch removes an unneeded semicolon after a switch statement in the pll_get_post_div function. Adding a semicolon after a switch statement is unnecessary and can lead to confusion in the code structure. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9852 Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/614767/ Link: https://lore.kernel.org/r/20240918023357.59399-1-yang.lee@linux.alibaba.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-10-21drm/msm/dpu: Add support for MSM8917Dmitry Baryshkov
Add support for MSM8917, which has MDP5 v1.15. It looks like trimmed down version of MSM8937. Even fewer PP, LM and no DSI1. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> [Remove intr_start from CTLs config, reword the commit] Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/617311/ Link: https://lore.kernel.org/r/20240930-dpu-msm8953-msm8996-v2-4-594c3e3190b4@mainlining.org
2024-10-21drm/msm/dpu: Add support for MSM8937Dmitry Baryshkov
Add support for MSM8937, which has MDP5 v1.14. It looks like trimmed down version of MSM8996. Less SSPP, LM and PP blocks. No DSC, etc. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> [Remove intr_start from CTLs config, reword the commit] Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/617312/ Link: https://lore.kernel.org/r/20240930-dpu-msm8953-msm8996-v2-3-594c3e3190b4@mainlining.org
2024-10-21drm/msm/dpu: Add support for MSM8953Dmitry Baryshkov
Add support for MSM8953, which has MDP5 v1.16. It looks like trimmed down version of MSM8996. Less SSPP, LM and PP blocks. No DSC, etc. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> [Remove intr_start from CTLs config, reword the commit] Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/617310/ Link: https://lore.kernel.org/r/20240930-dpu-msm8953-msm8996-v2-2-594c3e3190b4@mainlining.org