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path: root/drivers/gpu/drm/tegra/dc.c
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2014-06-05drm/tegra: Add hardware cursor supportThierry Reding
Enable hardware cursor support on Tegra124. Earlier generations support the hardware cursor to some degree as well, but not in a way that can be generically exposed. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05drm/tegra: Remove host1x drm_bus implementationThierry Reding
The DRM core can now cope with drivers that don't have an associated struct drm_bus, so the host1x implementation is no longer useful. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05drm/tegra: dc - Compute shift clock divider in output driversThierry Reding
The shift clock divider is highly dependent on the type of output, so push computation of it down into the output drivers. The old code used to work merely by accident. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05drm/tegra: dc - Move around shift clock programmingThierry Reding
Program the shift clock divider in tegra_crtc_setup_clk() since that's where the divider is computed, so passing it around can be avoided. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05drm/tegra: dc - Use proper H/V ref-to-sync valuesThierry Reding
For HDMI compliance both of these values need to be set to 1. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05drm/tegra: dc - Do not touch power control registerThierry Reding
Setting the bits in this register is dependent on the output type driven by the display controller. All output drivers already set these properly so there is no need to do it here again. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05drm/tegra: dc - Reshuffle code to get rid of prototypesThierry Reding
The tegra_dc_format() and tegra_dc_setup_window() functions are only used internally by the display controller driver. Move them upwards in order to make them static and get rid of the function prototypes. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05drm/tegra: dc - Rename INVERT_V to V_DIRECTIONThierry Reding
V_DIRECTION is the name of the field in the documentation, so use that for consistency. Also add the H_DIRECTION field for completeness. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05drm/tegra: dc - Add YUYV supportThierry Reding
YUYV is UYVY with swapped bytes. Luckily the Tegra DC hardware can swap bytes during scan-out, so supporting YUYV is simply a matter of writing the correct value to the byteswap register. This patch modifies tegra_dc_format() to return the byte swap parameter via an output parameter in addition to returning the pixel format. Many other formats can potentially be supported in a similar way. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-24drm/tegra: restrict plane loops to legacy planesDaniel Vetter
In Matt Ropers primary plane series a set of prep patches like commit af2b653bfb4ef40931b4d101ca842ce0c5da57ef Author: Matt Roper <matthew.d.roper@intel.com> Date: Tue Apr 1 15:22:32 2014 -0700 drm/i915: Restrict plane loops to only operate on overlay planes (v2) ensured that all exisiting users of the mode_config->plane_list wouldn't change behaviour. Unfortunately tegra seems to have fallen through the cracks. Fix it. This regression was introduced in commit e13161af80c185ecd8dc4641d0f5df58f9e3e0af Author: Matt Roper <matthew.d.roper@intel.com> Date: Tue Apr 1 15:22:38 2014 -0700 drm: Add drm_crtc_init_with_planes() (v2) The result was that we've unref'ed the fb for the primary plane twice, leading to a use-after free bug. This is because the drm core will already set crtc->primary->fb to NULL and do the unref for us, and the crtc disable hook is called by the drm crtc helpers for exactly this case. Aside: Now that the fbdev helpers clean up planes there's no longer a need to do this in drivers. So this could probably be nuked entirely in linux-next. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-01drm: Replace crtc fb with primary plane fb (v3)Matt Roper
Now that CRTC's have a primary plane, there's no need to track the framebuffer in the CRTC. Replace all references to the CRTC fb with the primary plane's fb. This patch was generated by the Coccinelle semantic patching tool using the following rules: @@ struct drm_crtc C; @@ - (C).fb + C.primary->fb @@ struct drm_crtc *C; @@ - (C)->fb + C->primary->fb v3: Generate patch via coccinelle. Actual removal of crtc->fb has been moved to a subsequent patch. v2: Fixup several lingering crtc->fb instances that were missed in the first patch iteration. [Rob Clark] Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-01-23drm/tegra: Obtain head number from DTThierry Reding
The head number of a given display controller is fixed in hardware and required to program outputs appropriately. Relying on the driver probe order to determine this number will not work, since that could yield a situation where the second head was probed first and would be assigned head number 0 instead of 1. By explicitly specifying the head number in the device tree, it is no longer necessary to rely on these assumptions. As a fallback, if the property isn't available, derive the head number from the display controller node's position in the device tree. That's somewhat more reliable than the previous default but not a proper solution. Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-20drm/tegra: Relocate some output-specific codeThierry Reding
Some of the code in the CRTC's mode setting code is specific to the RGB output or needs to be called slightly differently depending on the type of output. Push that code down into the output drivers. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-20drm/tegra: Add Tegra124 DC supportThierry Reding
Tegra124 and later support interlacing, but the driver doesn't support it yet. Make sure interlacing stays disabled on hardware that supports it. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-11drm/tegra: use reset frameworkStephen Warren
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
2013-10-31drm/tegra: Support bottom-up buffer objectsThierry Reding
The gr3d engine renders images bottom-up. Allow buffers that are used for 3D content to be marked as such and implement support in the display controller to present them properly. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Add support for tiled buffer objectsThierry Reding
The gr2d and gr3d engines work more efficiently on buffers with a tiled memory layout. Allow created buffers to be marked as tiled so that the display controller can scan them out properly. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Allocate resources at probe timeThierry Reding
Since the .init() and .exit() functions are executed whenever the DRM driver is loaded or unloaded, care must be taken not to use them for resource allocation. Otherwise deferred probing cannot be used, since the .init() and .exit() are not run at probe time. Similarly the code that frees resources must be run at .remove() time. If it is run from the .exit() function, it can release resources multiple times. To handle this more consistently, rename the tegra_output_parse_dt() function to tegra_output_probe() and introduce tegra_output_remove() which can be used to free output-related resources. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Properly cleanup and zero out resourcesThierry Reding
When the DRM driver is unloaded, all the associated resources must be cleaned up and zeroed out. This is necessary because of the architecture of the Tegra DRM driver, where not all subdrivers are unloaded along with the DRM driver. Therefore device-managed managed won't be freed and memory cannot be assumed to have been cleared (because it hasn't been reallocated using kzalloc()) by the time the DRM driver is reloaded. It is therefore necessary to zero out the structures to prevent strange errors (such as slab corruptions) from occurring. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Move driver to DRM treeThierry Reding
In order to make subsystem-wide changes easier, move the Tegra DRM driver back into the DRM tree. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-04-22drm/tegra: Move drm to live under host1xTerje Bergstrom
Make drm part of host1x driver. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-25Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds
Pull drm merge from Dave Airlie: "Highlights: - TI LCD controller KMS driver - TI OMAP KMS driver merged from staging - drop gma500 stub driver - the fbcon locking fixes - the vgacon dirty like zebra fix. - open firmware videomode and hdmi common code helpers - major locking rework for kms object handling - pageflip/cursor won't block on polling anymore! - fbcon helper and prime helper cleanups - i915: all over the map, haswell power well enhancements, valleyview macro horrors cleaned up, killing lots of legacy GTT code, - radeon: CS ioctl unification, deprecated UMS support, gpu reset rework, VM fixes - nouveau: reworked thermal code, external dp/tmds encoder support (anx9805), fences sleep instead of polling, - exynos: all over the driver fixes." Lovely conflict in radeon/evergreen_cs.c between commit de0babd60d8d ("drm/radeon: enforce use of radeon_get_ib_value when reading user cmd") and the new changes that modified that evergreen_dma_cs_parse() function. * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (508 commits) drm/tilcdc: only build on arm drm/i915: Revert hdmi HDP pin checks drm/tegra: Add list of framebuffers to debugfs drm/tegra: Fix color expansion drm/tegra: Split DC_CMD_STATE_CONTROL register write drm/tegra: Implement page-flipping support drm/tegra: Implement VBLANK support drm/tegra: Implement .mode_set_base() drm/tegra: Add plane support drm/tegra: Remove bogus tegra_framebuffer structure drm: Add consistency check for page-flipping drm/radeon: Use generic HDMI infoframe helpers drm/tegra: Use generic HDMI infoframe helpers drm: Add EDID helper documentation drm: Add HDMI infoframe helpers video: Add generic HDMI infoframe helpers drm: Add some missing forward declarations drm: Move mode tables to drm_edid.c drm: Remove duplicate drm_mode_cea_vic() gma500: Fix n, m1 and m2 clock limits for sdvo and lvds ...
2013-02-22drm/tegra: Fix color expansionThierry Reding
bpp stores the number of bytes per pixel, but color expansion needs to be enabled for less than 24 bits per pixel. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-22drm/tegra: Split DC_CMD_STATE_CONTROL register writeThierry Reding
The Tegra TRM says that the ACT_REQ and UPDATE fields cannot be programmed at the same time so they are updated in two consecutive writes instead. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-22drm/tegra: Implement page-flipping supportThierry Reding
All the necessary support bits like .mode_set_base() and VBLANK are now available, so page-flipping case easily be implemented on top. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-22drm/tegra: Implement VBLANK supportThierry Reding
Implement support for the VBLANK IOCTL. Note that Tegra is somewhat special in this case because it doesn't use the generic IRQ support provided by the DRM core (DRIVER_HAVE_IRQ) but rather registers one interrupt handler for each display controller. While at it, clean up the way that interrupts are enabled to ensure that the VBLANK interrupt only gets enabled when required. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-22drm/tegra: Implement .mode_set_base()Thierry Reding
The sequence for replacing the scanout buffer is much shorter than a full mode change operation so implementing this callback considerably speeds up cases where only a new framebuffer is to be scanned out. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-22drm/tegra: Add plane supportThierry Reding
Add support for the B and C planes which support RGB and YUV pixel formats and can be used as overlays or hardware cursor. Currently 32-bit XRGB as well as UYVY, YUV420 and YUV422 pixel formats are advertised. Other formats should be easy to add but these are the most common ones and should cover the majority of use-cases. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-22drm/tegra: Remove bogus tegra_framebuffer structureThierry Reding
Tegra uses the CMA FB helpers so framebuffers passed to the driver need to use the corresponding functions to access the underlying GEM objects. This used to work because struct tegra_framebuffer was sufficiently similar to struct drm_fb_cma but that isn't guaranteed to stay that way. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-21Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds
Pull ARM SoC-specific updates from Arnd Bergmann: "This is a larger set of new functionality for the existing SoC families, including: - vt8500 gains support for new CPU cores, notably the Cortex-A9 based wm8850 - prima2 gains support for the "marco" SoC family, its SMP based cousin - tegra gains support for the new Tegra4 (Tegra114) family - socfpga now supports a newer version of the hardware including SMP - i.mx31 and bcm2835 are now using DT probing for their clocks - lots of updates for sh-mobile - OMAP updates for clocks, power management and USB - i.mx6q and tegra now support cpuidle - kirkwood now supports PCIe hot plugging - tegra clock support is updated - tegra USB PHY probing gets implemented diffently" * tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (148 commits) ARM: prima2: remove duplicate v7_invalidate_l1 ARM: shmobile: r8a7779: Correct TMU clock support again ARM: prima2: fix __init section for cpu hotplug ARM: OMAP: Consolidate OMAP USB-HS platform data (part 3/3) ARM: OMAP: Consolidate OMAP USB-HS platform data (part 1/3) arm: socfpga: Add SMP support for actual socfpga harware arm: Add v7_invalidate_l1 to cache-v7.S arm: socfpga: Add entries to enable make dtbs socfpga arm: socfpga: Add new device tree source for actual socfpga HW ARM: tegra: sort Kconfig selects for Tegra114 ARM: tegra: enable ARCH_REQUIRE_GPIOLIB for Tegra114 ARM: tegra: Fix build error w/ ARCH_TEGRA_114_SOC w/o ARCH_TEGRA_3x_SOC ARM: tegra: Fix build error for gic update ARM: tegra: remove empty tegra_smp_init_cpus() ARM: shmobile: Register ARM architected timer ARM: MARCO: fix the build issue due to gic-vic-to-irqchip move ARM: shmobile: r8a7779: Correct TMU clock support ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles ARM: mxs: use apbx bus clock to drive the timers on timrotv2 ...
2013-01-28ARM: tegra: migrate to new clock codePrashant Gaikwad
Migrate Tegra clock support to drivers/clk/tegra, this involves moving: 1. definition of tegra_cpu_car_ops to clk.c 2. definition of reset functions to clk-peripheral.c 3. change parent of cpu clock. 4. Remove legacy clock initialization. 5. Initialize clocks using DT. 6. Remove all instance of mach/clk.h Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: use to_clk_periph_gate().] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-25drm: Convert to devm_ioremap_resource()Thierry Reding
Convert all uses of devm_request_and_ioremap() to the newly introduced devm_ioremap_resource() which provides more consistent error handling. devm_ioremap_resource() provides its own error messages so all explicit error messages can be removed from the failure code paths. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Cc: David Airlie <airlied@linux.ie> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-12-30Revert "drm: tegra: protect DC register access with mutex"Dave Airlie
This reverts commit 83c0bcb694be31dcd6c04bdd935b96a95a0af548. Lucas pointed out this was a mistake, and I missed the discussion, so just revert it out to save a rebase. Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-12-30drm: tegra: program only one window during modesetLucas Stach
The intention is to program exactly WIN_A, not WIN_A and possibly others. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-12-30drm: tegra: protect DC register access with mutexLucas Stach
Window properties are programmed through a shared aperture and have to happen atomically. Also we do the read-update-write dance on some of the shared regs. To make sure that different functions don't stumble over each other protect the register access with a mutex. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-12-30drm: tegra: fix front_porch <-> back_porch mixupLucas Stach
Fixes wrong picture offset observed when using HDMI output with a Technisat HD TV. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Mark Zhang <markz@nvidia.com> Tested-by: Mark Zhang <markz@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-11-28drm: tegra: Add Tegra30 supportThierry Reding
Add support for host1x, the display controllers and HDMI on the Tegra30 SoC. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Stephen Warren <swarren@nvidia.com> Tested-by: Mark Zhang <markz@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-11-28drm: tegra: Use framebuffer pitch as line strideThierry Reding
Instead of using the stride derived from the display mode, use the pitch associated with the currently active framebuffer. This fixes a bug where the LCD display content would be skewed when enabling HDMI with a video mode different from that of the LCD. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Mark Zhang <markz@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-11-20drm: Add NVIDIA Tegra20 supportThierry Reding
This commit adds a KMS driver for the Tegra20 SoC. This includes basic support for host1x and the two display controllers found on the Tegra20 SoC. Each display controller can drive a separate RGB/LVDS output. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Mark Zhang <markz@nvidia.com> Reviewed-by: Mark Zhang <markz@nvidia.com> Tested-by: Mark Zhang <markz@nvidia.com> Tested-and-acked-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-09-19 14:26:15 +0000