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2014-04-10iommu/tegra: smmu: sg_num_pages(sg) calc number of pagesHiroshi Doyu
Introduced a new macro sg_num_pages() to calculate the number of pages in sg. Bug 1418514 Change-Id: I0d48ce3e4d9f28d3a1cfab118508eadcc59c3a9b Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/394580 Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
2014-04-10iommu/tegra: smmu: fix unaliged sg mappingHiroshi Doyu
map_sg() miscaluculated the number of pages to map where 'offset' and PAGE_ALIGN was ignored. This patch fixes the ext4 memory corruption problem when USB is used. This patch was based on Nilesh More's hard working journey to narrow down the root cause of this problem. This bug was introduced by the commit: f46788a6f7d9 - iommu/tegra: smmu: Optimize smmu_iommu_map_sg() Bug 1418514 Change-Id: I3492ca3aad48f63bc81e50886eefc32cb6a17a8b Reported-by: Nilesh More <nmore@nvidia.com> Tested-by: Nilesh More <nmore@nvidia.com> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/394554 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Nilesh More <nmore@nvidia.com> Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
2014-04-06iommu/tegra: smmu: add dump IOMMU pagetableHiroshi Doyu
Add pagetable dump feature in debugfs. SMMU has a pagetable per address space(AS). There are multiple pagetables, page_tables<ASID#>. This also shows attribute, 'R'eadable, 'W'ritable and 'N'onsecure. For exmaple, $ cat /sys/kernel/debug/tegra_smmu/page_tables0001 .......... 0x80008000-0x8000b000 12K RW- Bug 1399946 Change-Id: I53ddac6cbc4b5ef6fb05daddd6a1b019ded2896d Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/392353
2014-03-25iommu/tegra: smmu: Properly mask PA for PTC flushAlex Waterman
The PTC per address flush ignores (at least) the bottom four physical address bits. The PTC flush register expects the bottom four bits to be masked out. This patch ensures that those four bottom address bits from the PA are masked. Change-Id: If39ef5e435558d6cda7bbb639b030a59bfe10c89 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/385744 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com> Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
2014-03-13Merge branch 'linux-3.10.33' into dev-kernel-3.10Deepak Nibade
Bug 1456092 Change-Id: I3021247ec68a3c2dddd9e98cde13d70a45191d53 Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
2014-03-04iommu/tegra: smmu: remove release_mapping funcJubeom Kim
Even though arm_iommu_attach_device() is failed, we don't need arm_iommu_release_mapping() because we don't need kref_put() to decrease kref->refcount. arm_iommu_release_mapping() is needed by arm_iommu_create_mapping(). And, if smmu_clients remain when iommu domain is destroyed, next smmu_client should be stored in temporary variable before smmu_iommu_detach_dev(), because current smmu_client->list.next will be invalid. So, list_for_each_entry() needs to be replaced with list_for_each_entry_safe(). Bug 1437038 Change-Id: Id246711b74ad1983b4765415fa4674407f09fbcc Signed-off-by: Jubeom Kim <jubeomk@nvidia.com> Reviewed-on: http://git-master/r/356451 Reviewed-on: http://git-master/r/377057 Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com> Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
2014-02-16iommu: tegra: remove page reserving logicSri Krishna chowdary
Since the allocations for page tables happen from kernel, there is no need for reserving them. Change-Id: I9ab7a5656a917f539ad33e217d44f39108886437 Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com> Reviewed-on: http://git-master/r/366487 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com> Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
2014-02-13intel-iommu: fix off-by-one in pagetable freeingAlex Williamson
commit 08336fd218e087cc4fcc458e6b6dcafe8702b098 upstream. dma_pte_free_level() has an off-by-one error when checking whether a pte is completely covered by a range. Take for example the case of attempting to free pfn 0x0 - 0x1ff, ie. 512 entries covering the first 2M superpage. The level_size() is 0x200 and we test: static void dma_pte_free_level(... ... if (!(0 > 0 || 0x1ff < 0 + 0x200)) { ... } Clearly the 2nd test is true, which means we fail to take the branch to clear and free the pagetable entry. As a result, we're leaking pagetables and failing to install new pages over the range. This was found with a PCI device assigned to a QEMU guest using vfio-pci without a VGA device present. The first 1M of guest address space is mapped with various combinations of 4K pages, but eventually the range is entirely freed and replaced with a 2M contiguous mapping. intel-iommu errors out with something like: ERROR: DMA PTE for vPFN 0x0 already set (to 5c2b8003 not 849c00083) In this case 5c2b8003 is the pointer to the previous leaf page that was neither freed nor cleared and 849c00083 is the superpage entry that we're trying to replace it with. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Joerg Roedel <joro@8bytes.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-02-10iommu/tegra: smmu: remove sanity checks during dev notifications.Krishna Reddy
arm_iommu_detach_device doesn't reset mapping to NULL. remove sanity checks during device notifications to avoid incorrect warning messages. Bug 1446597 Change-Id: I7a49cd9ba464a1007260260b5fe41113db0b7689 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/365172
2014-01-31iommu: tegra: correct device attach/detachSri Krishna chowdary
attach/detach a device only if registered to use smmu Bug 1446597 Change-Id: I99be7eb3ddeff8b9f8ec61dc06b09eeb66bbd1d6 Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com> Reviewed-on: http://git-master/r/361928 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com>
2014-01-29iommu/tegra: smmu: t114: Use PPCS1 for SDMMCSri Krishna chowdary
Since AHB_MASTER_SWID_0 does not need a secure write and also since this is only for T114, Hardcode this in the driver itself. Bug 1380855 Change-Id: I336c11d83949b8fe5e578db7e0302a21dde1a186 Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com> Reviewed-on: http://git-master/r/333259 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com>
2014-01-21iommu/tegra: smmu: select ARM_DMA_USE_IOMMU if TEGRA_IOMMU_SMMUHiroshi Doyu
Select ARM_DMA_USE_IOMMU if TEGRA_IOMMU_SMMU automatically from Kconfig Bug 1427887 Change-Id: Ida8754f9032b44b7f9eaf8f432ea41aa30fb4414 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/347461 Reviewed-by: Chris Dragan <kdragan@nvidia.com> Tested-by: Chris Dragan <kdragan@nvidia.com> Reviewed-by: Richard Wiley <rwiley@nvidia.com> Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
2014-01-21drivers: iommu: tegra: fix printk format of size_tPeng Du
Change-Id: I06b2c0a281179657c66cc6174f6271ac29f1121a Signed-off-by: Peng Du <pdu@nvidia.com>
2014-01-21tegra: iommu/smmu: Remove T124 definesAlex Waterman
Not sure what these were for but they do not seem to be needed. Change-Id: I10f5b4946bde0f7898f688b852f27454101826cc Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/280444 Tested-by: Bo Yan <byan@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com>
2014-01-21tegra: iommu/smmu: Fix uninitialized variableAlex Waterman
In the case of no device tree node existing for the SMMU the value in the variable holding the number of bytes available is not updated and is filled with garbage. Later the check for non-zero is true and leads to a crash. Change-Id: Ic64bbb333e19a3831b7c44e0704e2dc5fe83126c Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/280423 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com>
2014-01-21arm64: smmu: pointer cast fix for tegra-smmu.cRich Wiley
Change-Id: I6a1979fe3ec0465d6a4beccc272db6a8114073b7 Signed-off-by: Rich Wiley <rwiley@nvidia.com> Reviewed-on: http://git-master/r/276092 Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com> Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
2014-01-21arm64: smmu: tegra-smmu.c fixes for ARM64Rich Wiley
Change-Id: I7d1b1d01590b77ba61683403da3e8e9544ab8f9e Signed-off-by: Rich Wiley <rwiley@nvidia.com> Reviewed-on: http://git-master/r/266980 Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com> Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
2013-12-19Merge "Merge tag 'v3.10.24' into HEAD" into dev-kernel-3.10Bharat Nihalani
2013-12-18iommu/tegra: smmu: clear asid field correctKrishna Reddy
Clear asid field correctly based on number of asids supported. Bug 1380855 Change-Id: I2d0e7ab6b4fe01715156248aba257cdfb96e38b3 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/346737 Reviewed-by: Automatic_Commit_Validation_User
2013-12-16Merge tag 'v3.10.24' into HEADAjay Nandakumar
This is the 3.10.24 stable release Change-Id: Ibd2734f93d44385ab86867272a1359158635133b
2013-12-08iommu: Remove stack trace from broken irq remapping warningNeil Horman
commit 05104a4e8713b27291c7bb49c1e7e68b4e243571 upstream. The warning for the irq remapping broken check in intel_irq_remapping.c is pretty pointless. We need the warning, but we know where its comming from, the stack trace will always be the same, and it needlessly triggers things like Abrt. This changes the warning to just print a text warning about BIOS being broken, without the stack trace, then sets the appropriate taint bit. Since we automatically disable irq remapping, theres no need to contiue making Abrt jump at this problem Signed-off-by: Neil Horman <nhorman@tuxdriver.com> CC: Joerg Roedel <joro@8bytes.org> CC: Bjorn Helgaas <bhelgaas@google.com> CC: Andy Lutomirski <luto@amacapital.net> CC: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> CC: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-12-08iommu/vt-d: Fixed interaction of VFIO_IOMMU_MAP_DMA with IOMMU address limitsJulian Stecklina
commit f9423606ade08653dd8a43334f0a7fb45504c5cc upstream. The BUG_ON in drivers/iommu/intel-iommu.c:785 can be triggered from userspace via VFIO by calling the VFIO_IOMMU_MAP_DMA ioctl on a vfio device with any address beyond the addressing capabilities of the IOMMU. The problem is that the ioctl code calls iommu_iova_to_phys before it calls iommu_map. iommu_map handles the case that it gets addresses beyond the addressing capabilities of its IOMMU. intel_iommu_iova_to_phys does not. This patch fixes iommu_iova_to_phys to return NULL for addresses beyond what the IOMMU can handle. This in turn causes the ioctl call to fail in iommu_map and (correctly) return EFAULT to the user with a helpful warning message in the kernel log. Signed-off-by: Julian Stecklina <jsteckli@os.inf.tu-dresden.de> Acked-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-10-31Merge tag 'v3.10.17' into dev-kernel-3.10Ajay Nandakumar
This is the 3.10.17 stable release Conflicts: drivers/usb/host/xhci.c Change-Id: I6bd3b15ff92a0b94568b9d02e9bb1036becfca20
2013-10-23iommu/tegra: smmu: Print phys_addr_t/dma_addr_t using %paHiroshi Doyu
phys_addr_t/dma_addr_t becomes 64 bits wide and printing a variable of that type using a simple %x format specifier causes the compiler to complain. Change the format specifier to %pa, which is used specifically for variables of type phys_addr_t/dma_addr_t. Change-Id: I73c0e00f03e0f27e55210a9a37c3b3c54878b3d6 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/301717
2013-10-23iommu/tegra: Print phys_addr_t using %paThierry Reding
When enabling LPAE on ARM, phys_addr_t becomes 64 bits wide and printing a variable of that type using a simple %x format specifier causes the compiler to complain. Change the format specifier to %pa, which is used specifically for variables of type phys_addr_t. Change-Id: I3c11b6c6e062dd7a7724143aef9df3dd29849429 Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
2013-10-22iommu/tegra: smmu: print error before mapping releaseBo Yan
in case of a crash inside arm_iommu_release_mapping, the dev_err statement following that will have no chance to run. so move dev_err ahead, this will help debugging. Change-Id: I80aa6f262ce65fa362283460137fe4974281b686 Signed-off-by: Bo Yan <byan@nvidia.com> Reviewed-on: http://git-master/r/302405 Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com> Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
2013-10-16iommu/tegra: smmu: save and restore smmu contextPrashant Gaikwad
Save SMMU context before entering LP0 from cpuidle and restore on exit. Bug 1254633 Change-Id: I9069a9eceae1c4ab89c04d3bc40fe0f97ac5138f Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-on: http://git-master/r/299478 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com> Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
2013-10-15ARM: tegra: Redefine SWGROUP IDHiroshi Doyu
Redefine SWGROUP ID for the future chips with more HWAs. Also modified how to calculate MC_SMMU_<SWGROUP ID>_ASID_0 offset from ID in SMMU in order not to break git bisctability. Change-Id: If7239e626fba6e935a48b525897ed7e592882a0a Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/299346 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
2013-10-14Revert "ARM: tegra: Redefine SWGROUP ID"Hiroshi Doyu
This reverts commit d6d56590c5c36d2f6e172e8e0e26d100be5125a3. Change-Id: I855b4ce189ec3756f41a7c5c17194af6cc65a235 Reviewed-on: http://git-master/r/298949 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2013-10-13iommu/core: Error rewinding for map_{pages,sg}()Hiroshi Doyu
Similiar with other IOMMU API, add clean up at error. Bug 1375251 Change-Id: Ie5461eb557b3d4ad7dd0605f37afba9ffc038d6b Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/288845 Reviewed-on: http://git-master/r/289611 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2013-10-13ARM: tegra: Redefine SWGROUP IDHiroshi Doyu
Redefine SWGROUP ID for the future chips with more HWAs. Also modified how to calculate MC_SMMU_<SWGROUP ID>_ASID_0 offset from ID in SMMU in order not to break git bisctability. Change-Id: Ie024985ae3fbbcf555199b951107f84346bb702d Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/289637 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2013-09-27iommu/tegra: smmu: Add debug_dma_platformdata()Hiroshi Doyu
For DMA_API_DEBUG to show platform specific data. Bug 1173494 Change-Id: I421a0bb3675c7bc6906140f7c1ef867f15e80164 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/269147 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2013-09-26iommu/tegra: smmu: Use DMA_ATTR_SKIP_IOVA_GAPHiroshi Doyu
Use DMA_ATTR_SKIP_IOVA_GAP for initial IOVA linear mapping. Also fix some kernel messages more appropriately. Bug 1356760 Bug 1303110 Bug 1173494 Change-Id: I2b3e4d273357af2d9aa682ff71b0d233d49f17c9 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/275030 Reviewed-by: Automatic_Commit_Validation_User
2013-09-26intel-iommu: Fix leaks in pagetable freeingAlex Williamson
commit 3269ee0bd6686baf86630300d528500ac5b516d7 upstream. At best the current code only seems to free the leaf pagetables and the root. If you're unlucky enough to have a large gap (like any QEMU guest with more than 3G of memory), only the first chunk of leaf pagetables are freed (plus the root). This is a massive memory leak. This patch re-writes the pagetable freeing function to use a recursive algorithm and manages to not only free all the pagetables, but does it without any apparent performance loss versus the current broken version. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-09-16iommu/tegra: smmu: Optimize alloc_ptblHiroshi Doyu
Without TEGRA_IOMMU_SMMU_LINEAR, zero initialized page table is enough. Optimize the way to zero initialize. Bug 1290869 Change-Id: Iaf71157c999663bc6216a9d086d2ccb093add1e6 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/273152 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2013-09-16iommu/tegra: smmu: Remove page validataionHiroshi Doyu
This page is returned from alloc_ptbl() and it's ensured that page is valid at this point. This code is inside of loop for map_sg/map_pages so that this affects the perf. Bug 1290869 Change-Id: I2b2165851a320496d650d6335127168f02882bed Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/273151 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2013-09-16iommu/tegra: smmu: Optimize smmu_iommu_map_sg()Hiroshi Doyu
Avoid nested loop in it for the better perf. Bug 1290869 Change-Id: Id87a7233f1118dfc76c130bc7f3c7ccaad5ec507 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/273150 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2013-09-16iommu/tegra: smmu: Rename "nents" to "npages"Hiroshi Doyu
The parameter "nents" is confusing. Actually this is number of pages, "npages". Rename this for the following changes in map_sg(). Bug 1290869 Change-Id: If9ff6740e4f3954f9742d9fe4c4039ca601970e1 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/273149 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2013-09-16iommu/tegra: smmu: smaller preempt latency for map_pagesHiroshi Doyu
Take smaller preemption latency for map_pages since there's not much perf improvement on this larger lock range. Bug 1290869 Change-Id: Ic7579fe9ffe89d01ad6e7fc3e18404b742b38b50 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/271447 Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2013-09-16Revert "iommu/tegra: smmu: fix perf regression with map_sg"Hiroshi Doyu
This reverts commit da57b0c27246871c93f5e541ba8803de95c311bf. No perf improvement but better to have smaller preemption latency. Bug 1290869 Change-Id: I368381c82f42ef0baf9cdd573f97ea9e9724923a Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/271446 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2013-09-14ARM: tegra: Move platform detect from <mach/hardware.h> to <linux/tegra-soc.h>Dan Willemsen
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Change-Id: I13f3ff891510d2c868f609d507149b32183d34c5
2013-09-14iommu/tegra: smmu: fix perf regression with map_sgKrishna Reddy
fix perf regression with map_sg compared to map_pages. Change-Id: Idf0a77f9262b81d580bc92f258827f04968f3677 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/269278 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com> Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
2013-09-14iommu/tegra: smmu: T124 : enable support for sataBibek Basu
Enable SMMU support for sata in T124 Bug 1350808 Change-Id: Ia3061acc162b98c3225241bead997974ab01e2aa Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/265930 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
2013-09-14iommu/tegra: smmu: fix incorrect allocation size of struct smmu_deviceEric Miao
Change-Id: Id74a769aa71478942075a8daa7130736d066c530 Signed-off-by: Eric Miao <emiao@nvidia.com> Reviewed-on: http://git-master/r/269287 Reviewed-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
2013-09-14iommu/tegra: smmu: fix build issues of k340 cherrypicksNitin Kumbhar
Change-Id: I9b5bd7d91e7c4e9543e448cca696e2d674a916a1 Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
2013-09-14iommu/tegra: smmu: Use dma_map_linear to reserveHiroshi Doyu
Use dma_map_linear instead of iommu_map to reserve this area against being overwritten by other clients. Bug 1297607 Change-Id: Iaef0a9d819dc64623a19d3124466fc90842563af Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/264254 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2013-09-14iommu/tegra: smmu: Fix unsigned long for ARM32/64Hiroshi Doyu
Explicitly use u32 for 32 bit length, and use int for index in PDE/PTE. Bug 1275557 Change-Id: I176e6b3f02df912b0b956cd4c2af17945c6009ca Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/263062
2013-09-14iommu/tegra: smmu: TLB_ACTIVE_LINES 0x20 for T124Hiroshi Doyu
Set TLB_ACTIVE_LINES 0x20 for T124 Bug 1320358 Change-Id: I2f1abcd0677b6ff35056d79bf8c5c829223944b1 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/260048 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14iommu/tegra: smmu: Fix {TLB,PTC} reset value per SoCHiroshi Doyu
TLB_RR_ARB and PTC_REQ_LIMIT is only valid for T124. Bug 1320358 Bug 1315906 Change-Id: I1d57ac1fb525629966987483b6c8c871c4ed2d4e Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/260878 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14iommu/tegra: smmu: Fix map linear at attachAlex Van Brunt
Fix map linear in the LPAE case where dma addresses are 64 bits long. So, the printk's need to cast to u64 in all cases. Bug 1297607 Change-Id: Ibf80d40139152bbdd080df6953e8ad2394f49a35 Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com> Reviewed-on: http://git-master/r/261102 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-01-27 21:43:59 +0000