Age | Commit message (Collapse) | Author |
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with CONFIG_HZ=100, the precision of jiffies is 10ms, and the
generic_cmd6_time of some card is also 10ms. then, may be current
time is only 5ms, but already timed out caused by jiffies precision.
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 8bcce64faaaf07165453e6600ae9ffb887e79b1a)
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 38f639884a2cfd65cbe29ac2fbfe4ab3fcb1f1af)
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there is a time window between __mmc_send_status() and time_afer(),
on some eMMC chip, the timeout_ms is only 10ms, if this thread was
scheduled out during this period, then, even card has already changes
to transfer state by the result of CMD13, this part of code also treat
it to timeout error.
So, need calculate timeout first, then call __mmc_send_status(), if
already timeout and card still in programing state, then treat it to
the real timeout error.
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 3bbb0deea6d5c6d5ed38ae927a5bf9b0cd7c8639)
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit b9b8249b98b9128d8931887eccb38cd45a0f8bf3)
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Now, when call esdhc_set_timeout() to set the data timeout counter value,
IPP_RST_N(bit 23) is wrongly affected. This patch add a mask to avoid this.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 6713b713dda4382677bc31a16d6ff3ef23f2d1ac)
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Our Reference Manual has a mistake, for the register SYS_CTRL,the
DTOCV(bit 19~16) means the data timeout counter value. When DTOCV
is set to 0xF, it means SDCLK << 29, not SDCLK << 28.
This patch correct this in our usdhc driver.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit df9598d6dd617ed87b2e41e29bfc794b69831e86)
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for imx6qdl"
This reverts commit 312979d1fcbd068d4ba0f461e974e7cbcc889548.
When busfreq is at low bus mode, which is 24MHz, it means DDR/AHB/AXI
will drop to 24MHz. At the same time, when in low busfreq mode, cpuidle
can be in low power idle, DRAM will be put into self-refresh and DRAM IO
will in low power mode to save power, so DMA will NOT work.
So all peripherals that needs DMA, need to request bus freq to high
setpoint when it is active.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 2c01452f4d7c0f65553b365adc27a1b7b6ba8644)
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This patch add function sdio_reset_comm() to support bcmdhd wifi
dirver build-in type.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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When CONFIG_MMC=m, compile error shows up
ERROR: "of_alias_max_index" [drivers/mmc/core/mmc_core.ko] undefined!
ERROR: "mmc_get_reserved_index" [drivers/mmc/card/mmc_block.ko] undefined!
ERROR: "mmc_first_nonreserved_index" [drivers/mmc/card/mmc_block.ko] undefined!
make[1]: *** [__modpost] Error 1
make: *** [modules] Error 2
make: *** Waiting for unfinished jobs....
This patch export the upper three symbol for module runtime load.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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Do sanity check before calling mmc_force_remove.
BCM WiFi driver will call wifi_card_detect(false) if probe fails
due to no card exists on board.
This is needed for Android BSP since Android has builtin WiFi drver
and some boards may not have WiFi cards pluged.
Then the kernel dump likes follows may appear.
----------------------------------------------
dhd_module_init in
Power-up adapter 'DHD generic adapter'
wifi_platform_bus_enumerate device present 1
mmc1: mmc_rescan_try_freq: trying to init card at 400000 Hz
mmc1: mmc_rescan_try_freq: trying to init card at 300000 Hz
mmc1: mmc_rescan_try_freq: trying to init card at 200000 Hz
mmc1: mmc_rescan_try_freq: trying to init card at 100000 Hz
failed to power up DHD generic adapter, 3 retry left
wifi_platform_bus_enumerate device present 0
------------[ cut here ]------------
Kernel BUG at 8051247c [verbose debug info unavailable]
Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM
Modules linked in: bcmdhd(+) ov5642_camera ov5640_camera_mipi_int ov5640_camera_int mxc_v4l2_capture ipu_bg_overlay_sdc ipu_still v4l2_int_device mxc_dcic ipu_prp_enc ipu_csi_enc ipu_fg_overlay_sdc evbug
CPU: 3 PID: 1071 Comm: modprobe Not tainted 4.1.15-01591-g1393481 #1504
Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
task: a99be880 ti: a8dd8000 task.ti: a8dd8000
PC is at mmc_sdio_remove+0x70/0x74
LR is at mmc_sdio_force_remove+0xc/0x34
pc : [<8051247c>] lr : [<8051248c>] psr: 60070013
sp : a8dd9d00 ip : 00000000 fp : 00000000
r10: 7f100c98 r9 : 00000000 r8 : 7f0fc410
r7 : a8dd9d48 r6 : a83b1800 r5 : 00000000 r4 : a83b1800
r3 : 00000000 r2 : 00000000 r1 : 809b50c8 r0 : 00000000
Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user
Control: 10c53c7d Table: 38cdc04a DAC: 00000015
Process modprobe (pid: 1071, stack limit = 0xa8dd8210)
Stack: (0xa8dd9d00 to 0xa8dda000)
9d00: 00000000 a83b1800 00000000 00000000 a8dd9d48 8051248c 00000000 7f0ca6cc
9d20: a99be880 a90e6280 00000003 7f0ca920 fffffdfb a81af810 80bb570c 00000000
9d40: 00020002 00000000 a8dd9d48 a8dd9d48 00000000 7f100c98 7f100c98 a90e6280
9d60: fffffdfb 00000008 00000000 7f0fe490 56f19f1c 7f0cabe4 80bb6d74 a81af810
9d80: 7f0fe248 8037f864 8037f820 80bb6d74 a81af810 00000000 7f0fe248 8037e118
9da0: a81af810 7f0fe248 a81af844 80b1e8b0 00000000 8037e328 00000000 7f0fe248
9dc0: 8037e29c 8037c660 a8025c5c a8187a34 7f0fe248 a9547780 00000000 8037d8b4
9de0: 7f0f5028 7f0fe248 00000000 7f0fe248 00000000 a90e6280 80ba78f4 8037e92c
9e00: 00000000 7f100c98 00000000 7f0cb02c 00000000 80af7720 80af7720 a90e6280
9e20: 7f124000 00000000 00000001 80009730 00000000 8040003b abc7db80 800e1c68
9e40: 00000000 a935c340 8040003a abc83180 ab757000 80af257c 00000001 8040003a
9e60: 00000001 00000001 a8dd9e7c 80af2260 a8001f00 80af46c0 56f19f1c 800e32a0
9e80: 7f0fe448 a90e6108 a90e6240 7f0fe448 a90e6100 7f0fe490 56f19f1c 8078b2b0
9ea0: 7f0fe448 a90e6100 a8dd9f58 a90e6108 00000001 80092dd8 7f0fe454 00007fff
9ec0: 800902a8 a8928900 7f0fe490 00000000 7f0fe590 000015fa c1754bfc 7f0fe590
9ee0: c16d8000 000c823c 05de516a 00000000 0000000e 00000000 00000000 00000000
9f00: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
9f20: 00000000 00000000 00000000 00000000 00000648 00000000 00000003 01111348
9f40: 0000017b 8000f644 a8dd8000 00000000 00000073 8009352c c16d8000 000c823c
9f60: c175456c c17543a5 c17957ec 0007ad30 0008f7c0 00000000 00000000 00000000
9f80: 0000002a 0000002b 0000001f 00000023 00000014 00000000 01111348 00000000
9fa0: 00000000 8000f4c0 01111348 00000000 00000003 01111348 00000000 00040000
9fc0: 01111348 00000000 00000000 0000017b 00000000 01111218 00000073 00000073
9fe0: 7ec5d950 7ec5d940 0001f0dc 76ecf610 600d0010 00000003 00000000 00000000
[<8051247c>] (mmc_sdio_remove) from [<8051248c>] (mmc_sdio_force_remove+0xc/0x34)
[<8051248c>] (mmc_sdio_force_remove) from [<7f0ca6cc>] (wifi_platform_bus_enumerate+0x54/0x90 [bcmdhd])
[<7f0ca6cc>] (wifi_platform_bus_enumerate [bcmdhd]) from [<7f0ca920>] (dhd_wifi_platform_load+0x17c/0x39c [bcmdhd])
[<7f0ca920>] (dhd_wifi_platform_load [bcmdhd]) from [<7f0cabe4>] (wifi_plat_dev_drv_probe+0xa4/0x124 [bcmdhd])
[<7f0cabe4>] (wifi_plat_dev_drv_probe [bcmdhd]) from [<8037f864>] (platform_drv_probe+0x44/0xa4)
[<8037f864>] (platform_drv_probe) from [<8037e118>] (driver_probe_device+0x174/0x2b4)
[<8037e118>] (driver_probe_device) from [<8037e328>] (__driver_attach+0x8c/0x90)
[<8037e328>] (__driver_attach) from [<8037c660>] (bus_for_each_dev+0x6c/0xa0)
[<8037c660>] (bus_for_each_dev) from [<8037d8b4>] (bus_add_driver+0x148/0x1f0)
[<8037d8b4>] (bus_add_driver) from [<8037e92c>] (driver_register+0x78/0xf8)
[<8037e92c>] (driver_register) from [<7f0cb02c>] (dhd_wifi_platform_register_drv+0x1cc/0x20c [bcmdhd])
[<7f0cb02c>] (dhd_wifi_platform_register_drv [bcmdhd]) from [<80009730>] (do_one_initcall+0x8c/0x1d4)
[<80009730>] (do_one_initcall) from [<8078b2b0>] (do_init_module+0x5c/0x1a8)
[<8078b2b0>] (do_init_module) from [<80092dd8>] (load_module+0x177c/0x1d4c)
[<80092dd8>] (load_module) from [<8009352c>] (SyS_finit_module+0x64/0x74)
[<8009352c>] (SyS_finit_module) from [<8000f4c0>] (ret_fast_syscall+0x0/0x3c)
Code: e3a03000 e58631f8 e5863228 e8bd80f8 (e7f001f2)
---[ end trace 6f28ec270544e09e ]---
Segmentation fault
root@imx6qdlsolo:~#
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit 3c5798c62efeac08be34211eaac7c5467cf62894)
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This reverts commit 829b6962f7e3cfc06f7c5c26269fd47ad48cf503.
Revert this change as it causes a sysfs path to change and therefore
introduces and ABI regression. More precisely Android's vold is not being
able to access /sys/module/mmcblk/parameters/perdev_minors any more, since
the path becomes changed to: "/sys/module/mmc_block/..."
Fixes: 829b6962f7e3 ("mmc: block: don't use parameter prefix if built as
module")
Reported-by: John Stultz <john.stultz@linaro.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit a5ebb87db84392edfd3142c3a6a78431d820a789)
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With igore pm notify feature, MMC core will not re-detect card
after system suspend/resume. This is needed for some special cards
like Broadcom WiFi which can't work propertly on card re-detect
after system resume.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
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Change SLV_DLY_TARGET to IC recommended value 0x7(4/1 cycle)
according to spec.
The old value 0x1 is not robust and may fail in some critical
circumstance.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit 3c755f08de810824250c935d099f3f8c7def4946)
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When enable DDR, the clock factor definition is changed.
e.g. original 200Mhz will be changed to 100Mhz if set MIX_CTRL_DDREN bit.
So we need to update the clock setting for strobe dll to lock
the correct clock rate.
Additionally we also need disable the clock before locking strobe dll.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit 4d8095a6e860f773f5d2e4d5b62a6f4ba1a92431)
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Fake one caps_1 register indicating hw auto retuning support since mx6qdl
does not have it and enable auto retuning in post_tuning process.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit b46b1ee480ce731165843f43481809b028203dd1)
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Enable HW auto retuning when set SDHCI_CTRL_EXEC_TUNING and clear it
when clear SDHCI_CTRL_TUNED_CLK.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit d07db4fdf967ad8ecebb751f2ea24a578dfb9395)
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If HW supports SDHCI_TUNING_MODE_3 which is auto retuning, we won't
retune during runtime suspend and resume, instead we use Re-tuning
Request signaled via SDHCI_INT_RETUNE interrupt to do retuning and
hw auto retuning during data transfer to guarantee the signal sample
window correction.
This can avoid a mass of repeatly retuning during small file system
data access and improve the performance.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit 89c224b34d3a63797d956969c2fdf4ccb7ff25bf)
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We see CRCs with SLV_DLY_TARGET of 7 during driver runtime suspend/resume
if disable sw auto retuning. Back to SLV_DLY_TARGET of 1 which is used
in 3.14 kernel and don't have such issue.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit cfcd9c369186ddc8c9e25e7c7573f91a4516449d)
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When enable WIFi and connected with AP, the system is unable to suspend.
root@imx6qdlsolo:~# echo standby > /sys/power/state
PM: Syncing filesystems ... done.
Freezing user space processes ... (elapsed 0.001 seconds) done.
Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
dhdsdio_isr: Enter
dhdsdio_isr: Enter
dhdsdio_isr: disable SDIO interrupts
Calling dhdsdio_dpc() from dhdsdio_isr
dhdsdio_dpc: Enter
dhdsdio_bussleep: request WAKE (currently SLEEP)
(Keypress still response here.... )
It's caused by Broadcom WiFi driver will keep handling SDIO irq even after
the driver is already suspended.
This weird behavior will block the MMC host suspend during its irq
synchronize operation in free_irq(), then the system suspend is blocked
too and hanged.
Add SDHCI_QUIRK2_SDIO_IRQ_THREAD for BCM WiFi to use kernel thread
to process sdio interrupts which won't block system suspend and process
freeze operation.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit 66b534082968214707d54d96ba142bc528a6e1de)
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SDIO cards may need clock to send the card interrupt to host.
Thus, we get runtime pm when sdio irq is enabled to prevent the clock
resource is released and put it when sdio irq is disabled.
This patch can allow sdio irq disable (mmc_signal_sdio_irq()) to be
called in interrupt context due to sdhci_runtime_pm_put() is atomic
safe.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit 250899a9ca2fdb31fc8d9d5405ac7b1c86beef44)
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Some special SDIO devices like Broadcom WiFi driver will keep handling
SDIO irq even after the driver is already suspended.
This weird behavior will block the MMC host suspend during its irq
synchronize operation in free_irq(), then the system suspend is blocked
too and hanged.
We add back sdio thread irq support for such WiFi driver to handle
SDIO irqs since the sdio thread is kernel thread which does not
block the process freeze operation during suspend.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit a7e3d205da821c880ab62c21f81e2573c0b621b6)
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bcmdhd can't support removing host during suspend and
driver crash when detect card after resume due to no response
to CMD7.
It looks bcmdhd has a special requirement to enumerate card
by itself which is incompatible with current MMC core.
So implement post-cd feature to allow driver to detect card
as it wants, then we add back non-removable capability
to avoid MMC core to redetect card after resume.
root@imx6qdlsolo:~# echo standby > /sys/power/state
PM: Syncing filesystems ... done.
PM: Preparing system for standby sleep
Freezing user space processes ... (elapsed 0.001 seconds) done.
Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
PM: Entering standby sleep
evbug: Event. Dev: input3, Type: 0, Code: 0, Value: 1
evbug: Event. Dev: input2, Type: 0, Code: 0, Value: 1
PM: suspend of devices complete after 652.363 msecs
PM: suspend devices took 0.660 seconds
PM: late suspend of devices complete after 1.148 msecs
PM: noirq suspend of devices complete after 1.043 msecs
Disabling non-boot CPUs ...
CPU1: shutdown
Enabling non-boot CPUs ...
CPU1 is up
PM: noirq resume of devices complete after 0.534 msecs
PM: early resume of devices complete after 0.553 msecs
evbug: Event. Dev: input2, Type: 1, Code: 116, Value: 1
evbug: Event. Dev: input2, Type: 0, Code: 0, Value: 0
evbug: Event. Dev: input2, Type: 1, Code: 116, Value: 0
evbug: Event. Dev: input2, Type: 0, Code: 0, Value: 0
mmc1: error -110 during resume (card was removed?)
PM: resume of devices complete after 605.525 msecs
PM: resume devices took 0.610 seconds
PM: Finishing wakeup.
Restarting tasks ... done.
WARNING: driver bcmsdh_sdmmc did not remove its interrupt handler!
root@imx6qdlsolo:~# Unable to handle kernel NULL pointer dereference at virtual address 0000022c
pgd = 80004000
[0000022c] *pgd=00000000
Internal error: Oops: 17 [#1] PREEMPT SMP ARM
Modules linked in: bcmdhd evbug ov5647_camera_mipi mxc_mipi_csi mx6s_capture
CPU: 1 PID: 780 Comm: kworker/u4:4 Not tainted 4.1.15-01434-g70f4b36 #1310
Hardware name: Freescale i.MX7 Dual (Device Tree)
Workqueue: kmmcd mmc_rescan
task: a974af80 ti: a846e000 task.ti: a846e000
PC is at _raw_spin_lock_irqsave+0x1c/0x5c
LR is at get_parent_ip+0x10/0x2c
pc : [<8077b9d4>] lr : [<8005207c>] psr: 60050093
sp : a846fc20 ip : 0001001f fp : a800b000
r10: 00000000 r9 : 00000001 r8 : 0000022c
r7 : 00000002 r6 : 0000022c r5 : a0050013 r4 : 0000022c
r3 : a974af80 r2 : 00000001 r1 : a846fc44 r0 : 00000000
Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 10c53c7d Table: a951406a DAC: 00000015
Process kworker/u4:4 (pid: 780, stack limit = 0xa846e210)
Stack: (0xa846fc20 to 0xa8470000)
fc20: 00000000 a846fc50 a846fc44 80061808 00000000 000001dc 00000000 805037fc
fc40: 8d89d5ec 00000000 a974af80 80053e88 00000000 00000000 ab7293c0 00000000
fc60: 7f09c828 000000c9 7f09c828 a916a804 00000001 0001001f a800b000 7f0698a4
fc80: a974afc8 00000001 00000000 00000000 00012ebc a974af80 00000001 80ad46c0
fca0: a974af80 00000000 a8eeccc0 00000001 0001001f a846fd04 00000000 7f099440
fcc0: a800b000 7f0699c4 a846fcdf 00000000 00000001 7f068834 a937c900 0105c688
fce0: a846fd04 a8e20000 00000000 00000001 00000000 7f071f08 a846fd04 a80a0000
fd00: ffffffff 00000000 ffffffff a8e20000 a8e20000 00000000 7f099440 00000000
fd20: 00000000 7f099440 a800b000 7f072f4c a974af80 00000000 00000000 80778564
fd40: a846fd54 a9346550 80330028 00000001 a846e000 a8e20000 7f099440 00000000
fd60: 18005000 a8eeccc0 00000000 7f099440 a800b000 7f073744 a846fd8c 80052130
fd80: a9273898 00000000 a800b000 a8e20000 7f099440 00000001 a8eec200 a9270000
fda0: 00000000 7f099440 a800b000 7f07cd3c 80b81100 8040003f a800b000 00000000
fdc0: 00000000 a8e20000 7f099440 a9270000 a9273000 a9270000 00000000 7f099440
fde0: a800b000 7f02df4c 00000001 a8e20000 7f099440 a8eec200 00000000 a916e008
fe00: 00000000 a90bfb00 a800b000 7f074cbc a9270000 7f099440 a8e20000 00000000
fe20: a8f81610 7f0765ec 7f0765b0 a8eeccc0 a855df40 7f069310 a916a800 a8eec200
fe40: 7f09b414 7f06a950 7f06a908 a8f81608 a8f81600 8050e8b8 a8f81608 7f09b414
fe60: 80b22c70 80379744 a974af80 a8f8163c a8f81608 803797d4 00000005 a81ce930
fe80: a8f81608 8037923c a8f81608 a8f81608 80b93cf4 80376504 a846fea0 800e0e3c
fea0: 00000000 00000000 a8f81608 000000bd a833f000 00000000 00000000 8050ed04
fec0: 00000001 8050dd8c 400f8c0f a833f000 ffffff92 a833f000 a81ce600 8050de30
fee0: 8050ddbc a833f240 a833f1dc 80506048 a90bfb00 a833f240 a800b000 a81ce600
ff00: 00000000 800462f0 a81ce600 80043c94 00000000 a800b000 a90bfb18 a800b014
ff20: a846e000 00000088 80b39379 a90bfb00 a800b000 8004654c 80ad4100 a800b164
ff40: a90bfb00 00000000 a84856c0 a90bfb00 80046500 00000000 00000000 00000000
ff60: 00000000 8004b1e8 2df9acc7 00000000 b5f3ff89 a90bfb00 00000000 00000000
ff80: a846ff80 a846ff80 00000000 00000000 a846ff90 a846ff90 a846ffac a84856c0
ffa0: 8004b10c 00000000 00000000 8000f568 00000000 00000000 00000000 00000000
ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
ffe0: 00000000 00000000 00000000 00000000 00000013 00000000 ecd61557 f82769f5
[<8077b9d4>] (_raw_spin_lock_irqsave) from [<80061808>] (add_wait_queue+0x20/0x48)
[<80061808>] (add_wait_queue) from [<805037fc>] (__mmc_claim_host+0x58/0x1b0)
[<805037fc>] (__mmc_claim_host) from [<7f0698a4>] (sdioh_request_byte+0x1cc/0x2a4 [bcmdhd])
[<7f0698a4>] (sdioh_request_byte [bcmdhd]) from [<7f0699c4>] (sdioh_cfg_write+0x20/0x28 [bcmdhd])
[<7f0699c4>] (sdioh_cfg_write [bcmdhd]) from [<7f068834>] (bcmsdh_cfg_write+0x90/0xdc [bcmdhd])
[<7f068834>] (bcmsdh_cfg_write [bcmdhd]) from [<7f071f08>] (dhdsdio_clk_kso_enab+0x38/0x168 [bcmdhd])
[<7f071f08>] (dhdsdio_clk_kso_enab [bcmdhd]) from [<7f072f4c>] (dhdsdio_clk_devsleep_iovar+0xf4/0x5f4 [bcmdhd])
[<7f072f4c>] (dhdsdio_clk_devsleep_iovar [bcmdhd]) from [<7f073744>] (dhdsdio_bussleep+0x2f8/0x4dc [bcmdhd])
[<7f073744>] (dhdsdio_bussleep [bcmdhd]) from [<7f07cd3c>] (dhd_bus_stop+0x2e8/0x3f0 [bcmdhd])
[<7f07cd3c>] (dhd_bus_stop [bcmdhd]) from [<7f02df4c>] (dhd_detach+0x2a4/0x438 [bcmdhd])
[<7f02df4c>] (dhd_detach [bcmdhd]) from [<7f074cbc>] (dhdsdio_release+0x4c/0x1dc [bcmdhd])
[<7f074cbc>] (dhdsdio_release [bcmdhd]) from [<7f0765ec>] (dhdsdio_disconnect+0x3c/0xa0 [bcmdhd])
[<7f0765ec>] (dhdsdio_disconnect [bcmdhd]) from [<7f069310>] (bcmsdh_remove+0x3c/0x60 [bcmdhd])
[<7f069310>] (bcmsdh_remove [bcmdhd]) from [<7f06a950>] (bcmsdh_sdmmc_remove+0x48/0x60 [bcmdhd])
[<7f06a950>] (bcmsdh_sdmmc_remove [bcmdhd]) from [<8050e8b8>] (sdio_bus_remove+0x30/0xf8)
[<8050e8b8>] (sdio_bus_remove) from [<80379744>] (__device_release_driver+0x70/0xe4)
[<80379744>] (__device_release_driver) from [<803797d4>] (device_release_driver+0x1c/0x28)
[<803797d4>] (device_release_driver) from [<8037923c>] (bus_remove_device+0xd8/0x104)
[<8037923c>] (bus_remove_device) from [<80376504>] (device_del+0x10c/0x210)
[<80376504>] (device_del) from [<8050ed04>] (sdio_remove_func+0x1c/0x28)
[<8050ed04>] (sdio_remove_func) from [<8050dd8c>] (mmc_sdio_remove+0x40/0x70)
[<8050dd8c>] (mmc_sdio_remove) from [<8050de30>] (mmc_sdio_detect+0x74/0x100)
[<8050de30>] (mmc_sdio_detect) from [<80506048>] (mmc_rescan+0xb8/0x314)
[<80506048>] (mmc_rescan) from [<800462f0>] (process_one_work+0x120/0x330)
[<800462f0>] (process_one_work) from [<8004654c>] (worker_thread+0x4c/0x480)
[<8004654c>] (worker_thread) from [<8004b1e8>] (kthread+0xdc/0xf4)
[<8004b1e8>] (kthread) from [<8000f568>] (ret_from_fork+0x14/0x2c)
Code: f10c0080 e3a00001 ebe359b1 f594f000 (e1943f9f)
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit 8f998ca4d07aa93460ac7769c1f2b3be0c36fc78)
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Current driver do not clear the tuning related register setting,
this will impact the timing and let the card inserted later meet
CRC error.
Take the DDR50 card as example, if plug out an SDR104 card and
then plug in this DDR50 card, we will meet the following error log:
mmc2: new ultra high speed DDR50 SDHC card at address aaaa
mmcblk2: mmc2:aaaa SE08G 7.40 GiB
mmcblk2: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
mmc2: tried to reset card
mmcblk2: p1 p2
Logictally, we should reset the tuning circurt everytime when we
plug in a sd card.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 1f47730e8e30f37ed0289b2900e524db60456ae4)
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this irq
Currently sdhci driver free irq in host suspend, and call
request_threaded_irq() in host resume. But during host resume,
Ctrl+C can impact sdhci host resume, see the error log:
CPU1 is up
PM: noirq resume of devices complete after 0.637 msecs imx-sdma 30bd0000.sdma: loaded firmware 4.1
PM: early resume of devices complete after 0.774 msecs
dpm_run_callback(): platform_pm_resume+0x0/0x44 returns -4
PM: Device 30b40000.usdhc failed to resume: error -4
dpm_run_callback(): platform_pm_resume+0x0/0x44 returns -4
PM: Device 30b50000.usdhc failed to resume: error -4
dpm_run_callback(): platform_pm_resume+0x0/0x44 returns -4
PM: Device 30b60000.usdhc failed to resume: error -4 fec 30be0000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx
mmc0: Timeout waiting for hardware interrupt.
mmc0: Timeout waiting for hardware interrupt.
mmc0: Timeout waiting for hardware interrupt.
mmc0: Timeout waiting for hardware interrupt.
mmc0: Timeout waiting for hardware interrupt.
mmc0: Timeout waiting for hardware interrupt.
mmc0: error -110 during resume (card was removed?)
mmc2: Timeout waiting for hardware interrupt.
mmc2: Timeout waiting for hardware interrupt.
mmc2: error -110 during resume (card was removed?)
In request_threaded_irq-> __setup_irq-> kthread_create
->kthread_create_on_node, the comment shows that SIGKILLed will
impact the kthread create, and return -EINTR.
This patch replace them with disable|enable_irq(), that will prevent
IRQs from being propagated to the sdhci driver.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit eaa3b974832ef65d55330156475586bed5647ad7)
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Currently for DDR50 card, we only use the default pin state, and we meet some
data CRC error. Now we increase the pad eletric drive for DDR50 card, and use
pins_100mhz. This pad eletric drive pass the two days reboot stress test, over
12000 times without issue.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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The delay cells of some SoCs may have less delay value of one cell,
for such SoCs, user could set a start delay cell point to skip
a few meaningless tuning cells.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
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Currently when card type supports EXT_CSD_CARD_TYPE_DDR_1_8V which means
can work on DDR mode with either 3.3v IO or 1.8v IO voltage, unlike before,
currently MMC core will first try 1.8v then 3.3v.
And the host driver voltage switch code does not check NO_1_8_V quirk
which may set a wrong 1.8v and causes the card unwork.
Checking 1.8V quirk before setting it to avoid such issue.
Note: This is a quick workaround solution. Directly putting
the quirk check in host layer is not very good. (That quirk is
going to be deprecated) and current MMC core does not support
3.3V DDR mode well, need further restructure later.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
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When get a CRC error, start the mmc_retune, it will issue CMD19/CMD21
to do tune, assume there were 10 clock phase need to try, phase 0 to
phase 6 is ok, phase 7 to phase 9 is NG, we try it from 0 to 9, so
the last CMD19/CMD21 will get CRC error, host->need_retune was set and
cause mmc_retune was called, then dead loop of mmc_retune
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Fixes: bd11e8bd03ca ("mmc: core: Flag re-tuning is needed on CRC errors")
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 031277d4d33d33f0174fbb569ca8f68238175617)
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Disable DLL delay line settings explicitly during driver initialization
in case ROM/uBoot had set an invalid delay.
e.g. MX6DL ROM has set the default delay line(DLLCTRL) to 0x1000021,
the uSDHC clock timing will become marginal when works on DDR mode
due to default delay and will possibly see CRC errors in cause the board
is not perfectly designed on the eMMC chip layout.
Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com>
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mmc_select_hs400() calls __mmc_switch() which checks the switch is
successful using CMD13 (SEND_STATUS). The problem is that it does that
using the timing settings of the previous mode. That is prone to error,
especially when switching from HS to HS400 because the timing parameters
for HS mode are tighter than the timing parameters for HS400 mode.
In the case when CMD13 polling is used (i.e. not MMC_CAP_WAIT_WHILE_BUSY)
with the switch command, it must be assumed that using different modes on
the card and host must work.
However in the case when CMD13 polling is not used
(i.e. MMC_CAP_WAIT_WHILE_BUSY) mmc_select_hs400() can be made more
reliable by setting the host to the correct timing before sending CMD13.
This patch does that.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: <stable@vger.kernel.org> # 4.2+
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit d23029332c3d51fb5ac117ba5cde4dc0a3ec3fa6)
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Move the mmc_switch_status() function in preparation for calling it
in mmc_select_hs400().
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: <stable@vger.kernel.org> # 4.2+
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 974007aaf240aa195b31c34cfdb013524a2dcfca)
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mmc_select_hs400() begins with the card and host in HS200 mode.
Therefore, any commands sent to the card should use HS200 timing.
It is incorrect to set the host to High Speed (HS) timing before
sending the switch command. Doing so is unreliable because
the timing parameters for HS mode are tighter than the timing
parameters for HS200 mode. Thus the HS timings should be set
only after the card has switched mode.
However, it is not unreasonable first to reduce the frequency to
the HS mode frequency, which should make the switch command and
subsequent CMD13 commands more reliable.
This patch does that.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: <stable@vger.kernel.org> # 4.2+
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 51b12f7764fa8bb464cbd0f7bbd3a408d21ade16)
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Currently mmc_select_hs200() uses __mmc_switch() which checks the
success of the switch to HS200 mode using CMD13 (SEND_STATUS).
The problem is that it does that using the timing settings of legacy
mode. That is prone to error, not least because the timing parameters
for legacy mode are tighter than the timing parameters for HS200 mode.
In the case when CMD13 polling is used (i.e. not MMC_CAP_WAIT_WHILE_BUSY)
with the switch command, it must be assumed that using different modes on
the card and host must work.
However in the case when CMD13 polling is not used
(i.e. MMC_CAP_WAIT_WHILE_BUSY) mmc_select_hs200() can be made more
reliable by setting the host to the correct timing before sending CMD13.
This patch does that.
A complication is that the caller, mmc_select_timing(), will ignore a
switch error (indicated by -EBADMSG), assume the old mode is valid
and continue, so the old timing must be restored in that case.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: <stable@vger.kernel.org> # 4.2+
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 1815e61b1a7efe81017a883e817292daf7d2f922)
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On 4.1 kernel, some eMMC on i.MX7D-SDB board can't pass HS400 tuning,
the same eMMC can pass HS400 tuning on 3.14 kernel. The difference
is that 4.1 kernel does not have 1ms delay for eMMC during the
tuning procedure. The root cause still not find, add back the
1ms delay first.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
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This will cause meaningless CPU overhead by polling the card at backgroud
if the CD is broken.
Most board does not intend to use this function, so remove it.
Platform driver could add it for test if needed.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Conflicts:
drivers/mmc/host/sdhci.c
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We may meet the following errors with a SD3.0 DDR50 cards during reboot test.
mmc0: new ultra high speed DDR50 SDHC card at address aaaa
mmcblk0: mmc0:aaaa SU08G 7.40 GiB
mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
mmcblk0: retrying using single block read
mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0
end_request: I/O error, dev mmcblk0, sector 0
.....
Buffer I/O error on device mmcblk0, logical block 0
mmcblk0: unable to read partition table
The root cause is still unknown.
Since there's an errata of Sandisk eMMC card before that it requires delay for CMD6
for eMMC DDR mode to work stable, we also suspect the SD3.0 DDR requires similar delay.
(Still not confirmed by Sandisk)
By adding the delay, the overnight reboot test(run 2000+ times) did not
show the issue anymore. Originally it can easy show the error after about 20 times of
reboot test.
So this patch would be the temporary workaround for Sandisk SD3.0 DDR50 mode
unstable issue.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit ef3bce5feb2ed36c9f4483287454d35ae330dbe3)
(cherry picked from commit c0cbde8a248036fae1768f232385290c23eddbd7)
(cherry picked from commit 138bab9f78ea2285b6e7c7cd6c8cd956def44003)
(cherry picked from commit 12d7e80e7505027feed3eb1ee6d037b1e6df249b)
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
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After adding mega fast support, the default enabled usdhc wakeup will block
M/F to gate off power domain.
To avoid this issue, we only claim wakeup capability and reply on user to enable
it via sysfs according to real needs.
The drawback of such change is that for SDIO WiFi Wakeup On Wireless feature,
User has to enable both uSDHC and WiFi WoW wakeup mannually to make
WoW work well.
BTW, due to the wakeup feature is controller itself, so we do not need to reply
on WiFi PM flags to enable it.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 58f91ff6f6719fef44f5122ae1d8a5df7e0061d5)
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Conflicts:
drivers/mmc/host/sdhci-esdhc-imx.c
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The usdhc of i.MX6Q/DL can work well under low power mode without
request high bus freq. So we do not need request bus freq for i.MX6Q/DL.
It can save power for i.MX6D/DL due to it saves a lot busfreq switch
cost as well as the CPU time runing on high bus freq after switch
during low power mode.
A new flag ESDHC_FLAG_BUSFREQ is added to indicated this requirement.
Currently only i.MX6SL is using it.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 3b954ce55b56dfce195d65b84913ff3c0fcb9f82)
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Conflicts:
drivers/mmc/host/sdhci-esdhc-imx.c
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Do not need to enable the controller card cd interrupt wakeup
if using GPIO as card detect since it's meaningless.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit e66bb4978fe4b4fb96e81a1a083c16f84f5aa710)
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
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Except SDHCI_QUIRK_BROKEN_CARD_DETECTION and MMC_CAP_NONREMOVABLE,
we also do not need to handle controller native card detect interrupt
for gpio as card detect case.
If we wrong enabled the card detect interrupt for gpio case,
it will cause a lot of unexpected card detect interrupts during data transfer
which should not happen.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 2bf47f78bee173798e6d6f360b12defd945c936c)
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Conflicts:
drivers/mmc/host/sdhci.c
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Request BUS_FREQ_HIGH when bus is busy and then release BUS_FREQ_HIGH
when bus becomes idle.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 64994f7115573c9ede53b51536b2c15f7cf0112a)
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Conflicts:
drivers/mmc/host/sdhci-esdhc-imx.c
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- Some sandisk emmc cards need certain delay befor sending cmd13 after cmd6.
Original CR: ENGR174296 (commit: fd031f9)
Acked-by: Aisheng Dong <b29396@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
(cherry picked from commit f942bf1db36355d46f38792601594949f3f2c71b)
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Conflicts:
drivers/mmc/core/mmc_ops.c
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WiFi driver could call wifi_card_detect function to re-detect card,
this is required by some special WiFi cards like broadcom WiFi.
To use this function, a new property is introduced to indicate a wifi host.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 74e71dd0aebb9e931f02aefa3dd1990cbe642ae4)
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Conflicts:
Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt
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For LPSR mode, usdhc iomux settings will be lost after resume,
so add pinctrl sleep mode support.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
(cherry picked from commit 983a7a174ed20d34a170a6aba70ff9d5bb2c9973)
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Currently, we config the watermark_level register only in probe.
This will cause the mmc write operation timeout issue after system
resume back in LPSR mode. Because in LPSR mode, after system resume
back, the watermark_level register(0x44) changes to 0x08000880, which
set the write watermark level as 0, and set the read watermark level
as 128. This value is incorrect.
This patch move the setting of watermark level register out of probe,
so after system resume back, mmc driver will set back this watermark
level register back to 0x10401040.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
(cherry picked from commit 05f72329a3c288e15c2f187305a21815d6bffc6d)
Conflicts:
drivers/mmc/host/sdhci-esdhc-imx.c
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for data commands
Due to the data may be still in transferring if a cmd error of data
command happens, the next quick reset during data transfer may cause host
controller unpridicable issues.
e.g. On MX6Q/MX6QP, if reset during ADMA is busy moving data from FIFO to
memory, we can observe 32 bytes lost issue sometimes in a very lower
possibility especially for SD3.0 cards because the tuning command can easily
fail on cmd error before data transfer complete.
Let's using data error interrupts to handle transfer error of a
data command instead of only checking cmd error, then can make sure
the next safe reset only happens when data transfer is done.
After fixing, the SD3.0 can pass 3 days reboot stress test while it could
easily fail on only one night stress test before.
Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com>
(cherry picked from commit f022a61d424cc024e00cd85fbb96ff1b4292ea23)
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
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The wait_event_interruptible_timeout can be aborted by CTRL+C key.
We certaintly don't want tuning to be interrupted during the tuning process,
changed to wait_event_timeout avoid such failure.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 9b644d7232508c61ddffebe4123ad82a7f8ea214)
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
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Due to the power lost in suspend if Mega/Fast is enabled which is a new
feature introduced, the static settings like tuning control in probe()
function of controller will be lost which results in the later resume
failed on tuning routine for SD3.0 cards(SDR50/SDR104).
This patch moves the tunning setting from probe() function into
register setting path before the tuning is executed.
Then the tuning setting becomes dynamically and re-set again after
resume for a SD3.0 card when doing tuning.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 2fb6a74b8b91dad7e57d65a57eabd422a4acc25e)
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Conflicts:
drivers/mmc/host/sdhci-esdhc-imx.c
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As with gpio, uart and others, allow specifying the name_idx via the
aliases-node in the devicetree.
On embedded devices, there is often a combination of removable (e.g.
SD card) and non-removable mmc devices (e.g. eMMC).
Therefore the name_idx might change depending on
- host of removable device
- removable card present or not
This makes it difficult to hard code the root device, if it is on the
non-removable device. E.g. if SD card is present eMMC will be mmcblk1,
if SD card is not present at boot, eMMC will be mmcblk0.
If the aliases-node is not found, the driver will act as before.
The original patch is from here:
https://www.mail-archive.com/linux-mmc@vger.kernel.org/msg26472.html
The patch requires additional alias_id fix or it won't work.
Because according to function definition the max_idx parameter of idx_alloc
is exclusive, so need add 1 or it will be unable to find the proper idx
within an invalid range.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 35928d6c6a76a24a16edfa636f4c08293614a1e0)
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Here we use '|=' to set the tuning-step, but before that, we should
clear the tuning-step, otherwise we could got the wrong setting.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
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sdhci_init() will clear all irqs and set the needed irqs. So
logically sdhci_init() should be called before request irq.
If not, some irqs may be triggled and handled wrongly. Take
the following into consideration, after request irq, if
SDIO card interrupt enabled, a sd card in the sd slot will
trigger a mass of interrupt(SDHCI_INT_CARD_INT), because at
this time, the vmmc-regulator still not restore, no voltage
supply for the sd card, so the pin of data0~data3 change and
keep low, interrupt(SDHCI_INT_CARD_INT) will rise up ceaselessly.
Due to we already reguest irq, system will be busy in handling
this endless irq, can't response to other event.
So we should call sdhci_init() before request irq in sd resume.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 4eddc3a8c5f3eba68c292072d9a0e2c44720cc1f)
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Use more compact of_property_read_bool() calls instead of the
of_find_property() calls.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 90614cd9045dc7003913ee58cbc77950351485a0)
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