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2011-11-14Sdhci: Tegra: Fixing Indentationnaveenk
Fixing Indentation as suggested by checkpatch.pl Reviewed-on: http://git-master/r/60223 (cherry picked from commit c6f12245ad1cec0c18d91e664a71c30f51a4231f) Change-Id: I6e59be4117853d8855dc88515ae1c283f5881837 Reviewed-on: http://git-master/r/62903 Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2011-11-10sdhci: tegra: Updated contorller clk rate settingPradeep Goudagunta
Setting controller clock rate to 100MHz if requested rate is between 12-100MHz and 208MHz if requested rate is greater than 100MHz. Bug 877336 Reviewed-on: http://git-master/r/55434 (cherry picked from commit a8eef6207abb643dedaeab9dd3a230eb6c169512) Change-Id: I6bae2a81f44fe448cc6286dbe00093283b42b3a8 Reviewed-on: http://git-master/r/62418 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-11-09sdhci: tegra: code cleanupvjagadish
replaced space with tab in multiple places. Reviewed-on: http://git-master/r/54677 (cherry picked from commit a7b9fd1a1cf2d99db16acf3bc6aa4da44f1d38c2) Change-Id: I4860b15d0d2d40e85649212994dd99b05ee920cc Reviewed-on: http://git-master/r/62322 Reviewed-by: Venkata Jagadish <vjagadish@nvidia.com> Tested-by: Venkata Jagadish <vjagadish@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2011-11-07sdhci: tegra: Use static strings for rail namesPavan Kunapuli
Using static strings and not platform data for the rail names. Getting the appropriate regulators based on the generic name and the device structure. Bug 876282 Reviewed-on: http://git-master/r/53782 (cherry picked from commit dc8c38c814219971eee69e4b122cc06de6231439) Change-Id: Iac034e76491ec7cb9bde10e2e11515a656a36f4a Reviewed-on: http://git-master/r/62328 Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-10-31sdhci: tegra: Enabling power rails when card presentnaveenk
Enabling power rails when the card is present which reduces power consumption Bug 883197 Change-Id: I5ab6aa90d2fa752a7c91b3ec0db4400bb06ce842 Reviewed-on: http://git-master/r/58104 (cherry picked from commit 6332e1816622df552b06dcc6408974cc795c29a9) Change-Id: Id4d2231a7d11db739b21260d8ac69aa3e9b1d1a4 Reviewed-on: http://git-master/r/59113 Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-09-19mmc: MMC_BLOCK_MINORS should depend on MMC_BLOCK.Chris Ball
Signed-off-by: Chris Ball <cjb@laptop.org> Tested-by: Chris Ball <cjb@laptop.org> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Andrew Chew <achew@nvidia.com> Change-Id: Ib4331ca6cc6339754dab53f5eea60398fe8a389e Reviewed-on: http://git-master/r/53024 Reviewed-by: Allen Martin <amartin@nvidia.com>
2011-09-19mmc: make number of mmcblk minors configurableOlof Johansson
The old limit of number of minor numbers per mmcblk device was hardcoded at 8. This isn't enough for some of the more elaborate partitioning schemes, for example those used by Chrome OS. Since there might be a bunch of systems out there with static /dev contents that relies on the old numbering scheme, let's make it a build-time option with the default set to the previous 8. Also provide a boot/modprobe-time parameter to override the config default: mmcblk.perdev_minors. Signed-off-by: Olof Johansson <olof@lixom.net> Cc: Mandeep Baines <msb@chromium.org> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Chris Ball <cjb@laptop.org> Signed-off-by: Andrew Chew <achew@nvidia.com> Change-Id: I86de89c4fae878f077743f58127cc8afa0c58f2a Reviewed-on: http://git-master/r/53023 Reviewed-by: Allen Martin <amartin@nvidia.com>
2011-09-16Revert "sdhci: tegra: Enable auto calibration by default"Pavan Kunapuli
This reverts commit 03e9285cdc365ce1fa21fff224372dd8e5d883bd. Change-Id: I2991f35046f5a74caf3f38c80d18c949a57a8cd0 Reviewed-on: http://git-master/r/51050 Reviewed-by: Luke Huang <lhuang@nvidia.com> Tested-by: Luke Huang <lhuang@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-09-02sdhci: tegra: Enable auto calibration by defaultPavan Kunapuli
Enable auto calibration for sdmmc1 and sdmmc3 by default. Bug 799568 Change-Id: I713884717713304c26a34f76467f9cd011c91606 Reviewed-on: http://git-master/r/49860 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-08-24arm: tegra: sdhci: enable quirk SDHCI_QUIRK_BROKEN_CARD_DETECTIONMayuresh Kulkarni
this also needs to be enabled for sdhci-tegra on Tegra2 for bug 866201 Change-Id: Id31eaa6d1b349bbcb9bd229ede378e55c44021ce Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/48898 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-08-16sdhci: tegra: correct clock setting at set_clkPrashant Gaikwad
Limit max sdio clock when enabling. Bug 834281 Bug 845180 Change-Id: I408bcae0a47c367073c38e897383337306f691db Reviewed-on: http://git-master/r/47322 Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-08-12mmc: sd: Add SDIO 3.0 async interrupt supportPavan Kunapuli
Added support for SDIO 3.0 asynchronous card interrupt in 4-bit mode. Bug 853800 Change-Id: If65bfe6ed2d663897037324b519484f77c35d3b5 Reviewed-on: http://git-master/r/46928 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2011-08-10mmc: sdio: Adding SDIO 3.0 supportPavan Kunapuli
Adding SDIO 3.0 support. Adding support for voltage switch, bus speed mode selection, 8 bit buswidth support and frequency tuning. Bug 853800 Change-Id: Ie778b7d67f2f09a9840cc8576d1dc750f18c7978 Reviewed-on: http://git-master/r/46388 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2011-08-03sdhci: tegra: Disable SDR50 supportPavan Kunapuli
Disabling SDR50 support of the host controller as CRC errors are observed during data transfers on some SD3.0 cards. Bug 852343 Change-Id: I20ca7b57380c77bae082ab941345f1cecbe01b9d Reviewed-on: http://git-master/r/44771 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-07-28tegra: sdhci: ignore pm_notify for always-on controllersRakesh Kumar
sdhci instance used by wifi should be always on to support wake on wireless functionlity. pm_notify will power off controller on suspend/resume which is not desired for wifi instance. bug 818687 bug 780047 bug 798783 (cherry picked from commit 2c6fcec10ad5569670c97114dd880169efb8fed5) Change-Id: Ied8b673c9fc1b4a8d09413243370fdb6f366b1c8 Reviewed-on: http://git-master/r/43467 Reviewed-by: Rakesh Kumar <krakesh@nvidia.com> Tested-by: Rakesh Kumar <krakesh@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-07-25mmc: core: SDXC speed class supportPavan Kunapuli
Unlike SDSC and SDHC, for SDXC cards CMD20 needs to be issued to meet the class performance for speed class recording. Adding mmc_speed_class_control() which should be used by an AV recording app/utility before starting recording on an SDXC card. Bug 820469 Bug 769962 Change-Id: Ic89fd6e475e6bf7ea610e43c78a752dcb444d477 Reviewed-on: http://git-master/r/39394 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
2011-07-06mmc: host: sdhci: tegra: Remove mmc disable_delayMin-wuk Lee
Remove mmc disable_delay. During suspend, if there's positive disable_delay, it is possible delayed work (mmc host disable) is operated after suspend. In this case, if there's mmc related wake up source, resume is operated immediately, which is not desired result. Bug 842110 Bug 844991 Change-Id: Ibc3645b0589f0b9a524620df020a3cf6014ba8a3 Reviewed-on: http://git-master/r/39495 Reviewed-by: Min-wuk Lee <mlee@nvidia.com> Tested-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-30sdhci: tegra: Read clk ctrl reg before clk_disablePavan Kunapuli
It may be possible that write operation on ahb bus does not get complete before disabling clock if the clock is disabled just after the write on ahb bus. To have proper sequence of operation, it is require to read back some register to make sure the write operation is completed. Bug 833340 Change-Id: Ib75ba95d86e028e9a08aa8561662d2e643873e60 Reviewed-on: http://git-master/r/39166 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2011-06-29sdhci: tegra: Release spinlock when setting clockPavan Kunapuli
Release spinlock when setting clock. This is required to avoid lock up and scheduling in atomic issues when dvfs is enabled. Bug 827959 Change-Id: I6b95c6f9fef0ed8862a258736ff02c19affbda2e Reviewed-on: http://git-master/r/37017 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2011-06-29sdhci: Add spinlock_flags to sdhci_host structurePavan Kunapuli
For acquiring and releasing spinlocks, use spinlock_flags in sdhci_host structure instead of local variable flags. Bug 827959 Change-Id: I2b6005c89c2fcfc1b38cb7f92325d26acf426fcd Reviewed-on: http://git-master/r/37016 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2011-06-22Revert "mmc: revert deferred resume"Jin Qian
This reverts commit 40c8a6e8551e81ad4d7647029e0d85f7b0a7e496. Original change broke LP1 suspend/resume Bug 840959,841139 Change-Id: I0fd50729cb81a5e56eca397428ee2c8b04f10e23 Reviewed-on: http://git-master/r/37353 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Tested-by: Jin Qian <jqian@nvidia.com>
2011-06-16Merging android-tegra-2.6.36 into git-master/linux-2.6/android-tegra-2.6.36Deepesh Gujarathi
Change-Id: I07aa6bfdbbb12f7e921f1f1be7136dae8bd8a834
2011-06-15mmc: revert deferred resumeDavid Schalig
Revert MMC_BLOCK_DEFERRED_RESUME feature from SD driver. The feature was not implemented thread-safe. Fixing it would require a lot of locking logic at limited value. Deferred resume has no effect on eMMC, because eMMC will be used right after resume. For SD card it only saves power between resume and first SD card access, which is a limited usecase. It does not save power on normal SD card idle. Bug 833034 Change-Id: Ic6c9d751f463ef8135d0cf4c845462598fab774c Reviewed-on: http://git-master/r/36451 Reviewed-by: David Schalig <dschalig@nvidia.com> Tested-by: David Schalig <dschalig@nvidia.com> Reviewed-by: Alex Courbot <acourbot@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-14mmc: fix card detect after suspendDavid Schalig
If defered SD card resume (CONFIG_MMC_BLOCK_DEFERRED_RESUME) is enabled, PM_POST_SUSPEND handler will never set host->rescan_disable back to 0, and card detect logic will be disabled forever. fix missing break fix incorrect cleanup sequences Bug 833034 See http://git-master/r/36251 (cherry picked from commit 31d509d8e2e2b7c35da69029f932d35c3995fe36) Change-Id: Ia0c7b82ac6590fa2ea05de13c32d699604718176 Reviewed-on: http://git-master/r/36447 Reviewed-by: David Schalig <dschalig@nvidia.com> Tested-by: David Schalig <dschalig@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-14sdhci: tegra: vddio rail error path initializationBitan Biswas
If set voltage vddio rail fails, vddio pointer remains as non-null. This causes error for vddio rail regulator_disable call during suspend. In error path vddio rail is reset to NULL to prevent above problem. Bug 836172 Change-Id: I48b3cb3b9792f54f2661b13b95299d8caac4e144 Reviewed-on: http://git-master/r/35621 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
2011-06-09Merge branch 'android-2.6.36' into android-tegra-2.6.36Colin Cross
Conflicts: drivers/mmc/host/sdhci.c Change-Id: I9a048b52a7f82631caf222c5f273265bb9927675
2011-06-09mmc: host: sdhci: Resolve incorrect mergeColin Cross
Change-Id: Ic91f35fbb1f0a131d8ab56817f0ad91288c82402 Signed-off-by: Colin Cross <ccross@android.com>
2011-06-09Merge branch 'linux-tegra-2.6.36' into android-tegra-2.6.36Colin Cross
2011-06-09Merge branch 'android-2.6.36' into android-tegra-2.6.36Colin Cross
Conflicts: drivers/mmc/host/sdhci.h Change-Id: I2ae744c0e7aa662e9e2c4e3ec1654877f172f747
2011-06-09mmc: host: sdhci: tegra: Support runtime enable/disable of clockGreg Meiste
Currently the SD card clock is running any time the AP is not in LP0. This patch allows the clock to only be enabled when the card is being accessed. Based on an nVidia patch: http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commit;h=8c0f23b7e65ebdb6d1c160517e9ba509b16ec83f Change-Id: I1b611622ef0545a3309214e94bbc76481aa3a721 Signed-off-by: Greg Meiste <w30289@motorola.com> Conflicts: drivers/mmc/host/sdhci-tegra.c Signed-off-by: Greg Meiste <w30289@motorola.com> Signed-off-by: Todd Poynor <toddpoynor@google.com>
2011-06-09mmc: host: sdhci: Support runtime enable/disable of clockGreg Meiste
Currently the SD card clock is running any time the AP is not in LP0. This patch allows the clock to only be enabled when the card is being accessed. Based on an nVidia patch: http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commit;h=8c0f23b7e65ebdb6d1c160517e9ba509b16ec83f Conflicts: drivers/mmc/host/sdhci.c Change-Id: Id188a783ca9ce7046bf2ca526cafcd91a6fab507 Signed-off-by: Greg Meiste <w30289@motorola.com> Signed-off-by: Todd Poynor <toddpoynor@google.com>
2011-06-09mmc: host: sdhci: Fix for 64 bit quirksGreg Meiste
Need to update the quirk defines for 64 bit support. Currently bits 32-63 are all being inadvertently set. Updating these defines allows the quirks bitmask to be set properly. Conflicts: drivers/mmc/host/sdhci.h Change-Id: Id178470642484f1f41f0fd7f7fb18c64667e1bbd Signed-off-by: Greg Meiste <w30289@motorola.com> Signed-off-by: Todd Poynor <toddpoynor@google.com>
2011-06-03sdhci: tegra: error handling for invalid regulatorvenu byravarasu
When regulator is not available, SDHCI is crashing during suspend. Hence explicitly setting the regulator pointer to NULL, so that no further regulator operations are done, if regulator_get() fails. bug 829405 Change-Id: I7cd3f8029e4dc9116267033b2a3f560608513b16 Reviewed-on: http://git-master/r/34874 Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2011-06-03mmc: Correct the calculation of the size of eMMC.Harry Hong
To calculate eMMC size correctly, should not subtract boot sectors. The SEC_COUNT in ext_csd doesn't include boot sectors. Need to change bootloader as well to write GPT in the end of eMMC. Change-Id: I4a42ced5a58248062afd4d8162ba145227adb640 Reviewed-on: http://git-master/r/34462 Tested-by: Harry Hong <hhong@nvidia.com> Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-31arm: tegra: Clean up SOC conditionalsScott Williams
Change SOC conditionals to make them more forward-looking. Change-Id: Ib60db4e690c2f396afdec962616d735548b5a8a9 Reviewed-on: http://git-master/r/32706 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-25sdhci: tegra: Configure sdmmc drive strengthsPavan Kunapuli
Configure the pull up and pull down drive strengths for sdmmc. Bug 822057 Change-Id: Ic483f5311cdfdb6c35043ab33b5ff22462304de3 Reviewed-on: http://git-master/r/32607 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-05-05Sdhci:tegra:Switch OFF/ON power rails in suspend/resumePavan Kunapuli
Switching off and switching on the power rails during suspend and resume. Passing the power rail name, maxV and minV through platform data. Bug 793796 Change-Id: I6c80c1a23c9681043d11ffdd210dc6d2146bdd2e Reviewed-on: http://git-master/r/29660 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-04-26tegra: sdhci: SD write protection optionalDavid Schalig
Make SD card write protection GPIO optional. Some boards such as Whistler do not support this GPIO. Default behaviour for this case is write-enabled. Bug 686892. Change-Id: I5e16e2260e681145e52d604abcfa38135e2be873 Original-Change-Id: If5253bfbadeafbffdf4f69ff0315fcf572886e0e Reviewed-in: http://git-master/r/#change,21101 Reviewed-on: http://git-master/r/27542 Reviewed-by: David Schalig <dschalig@nvidia.com> Tested-by: David Schalig <dschalig@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Change-Id: I5e16e2260e681145e52d604abcfa38135e2be873
2011-04-26mmc:sdhci-tegra: Disabing SDHCI_QUIRK_NO_SDIO_IRQRakesh Goyal
this work around is no more required as proper fix is done in bcm driver. Bug 795460 Original-Change-Id: I3ad30c1211ae5492307d32e9788a8db977a54d94 Reviewed-on: http://git-master/r/26687 Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com> Tested-by: Rakesh Goyal <rgoyal@nvidia.com> Reviewed-by: Rakesh Kumar <krakesh@nvidia.com> Reviewed-by: Rahul Bansal <rbansal@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: Ia17ac97478bf3b750c9122991543c0237a31c0ac
2011-04-26Update copyrightsScott Williams
Change-Id: I2ffeaf6f8dfeb279b40ca6f69f6c9157401a746a
2011-04-26mmc:sdhci-tegra:Set power on bit during SDIO resumePavan Kunapuli
Enabling SDHCI_POWER_ON bit during SDIO resume. Without this bit, SDIO card clock is not enabled and SDIO resume fails. Bug 802383 Original-Change-Id: I6d897c542ba2be625720804e0d04d81f0ce0cedb Reviewed-on: http://git-master/r/23211 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com> Change-Id: I0b01fe847fa2f8e470775dd443e26a6a1895a0e5
2011-04-26mmc:sdhci:Enable controller clock before MMC_POWER_UPPavan Kunapuli
Enabling controller clock before MMC_POWER_UP to ensure proper register read/writes. Currently, during initialization SDHCI_POWER_ON is being set without controller clock enabled. Original-Change-Id: Ifc7b9f14eaf1ad5641d6edabaae4eca050c0ac6f Reviewed-on: http://git-master/r/23186 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com> Change-Id: I31b2d2a3075646e6b6605ad7c55dda3d621ebc7d
2011-04-26mmc:sdhci-tegra:Properly enabling and disabling sdmmc clocks.Pavan Kunapuli
Properly enabling/disabling all sdmmc clocks to ensure the clock refcount is correctly maintained. Clocks are disabled in suspend and set in resume. Bug 793796 Original-Change-Id: I941b979e16c347df46761cd21a986fa7768ed705 Reviewed-on: http://git-master/r/23185 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com> Change-Id: I14c57c175291d6bce2dd08df0d54d984f073d568
2011-04-26arm:tegra:sdhci Ventana build break fixScottPeterson
Fix build break on ventana due to improper use of kernel config paramters. Original-Change-Id: If6f54e1f305e960f8bf935058f48b0e77adce6c6 Reviewed-on: http://git-master/r/22639 Reviewed-by: Scott Peterson <speterson@nvidia.com> Tested-by: Scott Peterson <speterson@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Change-Id: Ia78069e7c3413e031dcb2df61216bfb577a693b5
2011-04-26mmc:unset bus speed mode variable after reset.Pavan Kunapuli
Unsetting bus speed mode variable after reset to ensure that the uhs mode is set properly. Original-Change-Id: I098a0df1289acefe01c391da622132a3562382fe Reviewed-on: http://git-master/r/22423 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Change-Id: I0ffd0ab93b7fb72e2a7ae8d060b264d4f735df03
2011-04-26sdhci:tegra:Enable 8bit support if platform supports it.Pavan Kunapuli
Set SDHCI_QUIRK_8_BIT_DATA if the platform supports 8-bit data. If not, use 4-bit data width. Bug 794550 Bug 796574 Bug 796220 Original-Change-Id: Icd8536e0e0b2db77d1443fbbf0ba6b90b51b62ca Reviewed-on: http://git-master/r/20746 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Venkata Nageswara Penumarty <vpenumarty@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: I85a1f68f2faf0751ada631132b19116e3b574bc5
2011-04-26tegra: sdhci: enabling SDHCI_QUIRK_NO_SDIO_IRQRakesh Goyal
this work around is enabling SDHCI_QUIRK_NO_SDIO_IRQ to unblock power activity for CONFIG_ARCH_TEGRA_3X_SOC. By this wifi is using polling mode. BUG 795460 Original-Change-Id: I351021fb96537f1ac1ed525c1cec27c8fd4dea32 Reviewed-on: http://git-master/r/21107 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Tested-by: Yu-Huan Hsu <yhsu@nvidia.com> Change-Id: Ibff8e8786ee560a823eb3b06079a964453b2e846
2011-04-26sdhci:tegra:Enable sd card hot plug in detectionPavan Kunapuli
Set SDHCI_QUIRK_BROKEN_CARD_DETECTION to support sd card hot plug in/plug out detection. Original-Change-Id: Ia0a748dc38b61a73460bee19b4a4544630aa163b Reviewed-on: http://git-master/r/20586 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Venkata Nageswara Penumarty <vpenumarty@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: I366ad96995f2c5939e42c98a7f626811b279ad4e
2011-04-26sdhci:Set MMC_CAP_NEEDS_POLL if there is no card detection supportPavan Kunapuli
Enable polling for the card presence if there is no mechanism for card detection. Original-Change-Id: I7c38a1df61eb94f3555dc87adddff268079cd788 Reviewed-on: http://git-master/r/20585 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Venkata Nageswara Penumarty <vpenumarty@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: I376f3dc38d6f8844ab8847b05b84ceb71f83f7b9
2011-04-26sdhci: tegra:Support for tap delay configuration through boardPavan Kunapuli
Added interface to configure tap delays. This is required for the frequency tuning algorithm. Bug 661035 Original-Change-Id: I7e835ac53456e4c0cd7bb62b10d605d6da869764 Reviewed-on: http://git-master/r/20047 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: Ide438d530aa6db22d8dbb5540c925d3a9ac9cfd7
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-30 08:34:48 +0000