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This is the 4.9.166 stable release
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commit d5d27fd9826b59979b184ec288e4812abac0e988 upstream.
Disable BCH soft reset according to MX23 erratum #2847 ("BCH soft
reset may cause bus master lock up") for MX28 too. It has the same
problem.
Observed problem: once per 100,000+ MX28 reboots NAND read failed on
DMA timeout errors:
[ 1.770823] UBI: attaching mtd3 to ubi0
[ 2.768088] gpmi_nand: DMA timeout, last DMA :1
[ 3.958087] gpmi_nand: BCH timeout, last DMA :1
[ 4.156033] gpmi_nand: Error in ECC-based read: -110
[ 4.161136] UBI warning: ubi_io_read: error -110 while reading 64
bytes from PEB 0:0, read only 0 bytes, retry
[ 4.171283] step 1 error
[ 4.173846] gpmi_nand: Chip: 0, Error -1
Without BCH soft reset we successfully executed 1,000,000 MX28 reboots.
I have a quote from NXP regarding this problem, from July 18th 2016:
"As the i.MX23 and i.MX28 are of the same generation, they share many
characteristics. Unfortunately, also the erratas may be shared.
In case of the documented erratas and the workarounds, you can also
apply the workaround solution of one device on the other one. This have
been reported, but I’m afraid that there are not an estimated date for
updating the Errata documents.
Please accept our apologies for any inconveniences this may cause."
Fixes: 6f2a6a52560a ("mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems")
Cc: stable@vger.kernel.org
Signed-off-by: Manfred Schlaegl <manfred.schlaegl@ginzinger.com>
Signed-off-by: Martin Kepplinger <martin.kepplinger@ginzinger.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit 2a9d92fb3a1282a4659f1bb6d5684018846537b7 upstream.
I ran into a link-time error with the atmel-quadspi driver on the
EBSA110 platform:
drivers/mtd/built-in.o: In function `atmel_qspi_run_command':
:(.text+0x1ee3c): undefined reference to `_memcpy_toio'
:(.text+0x1ee48): undefined reference to `_memcpy_fromio'
The problem is that _memcpy_toio/_memcpy_fromio are not available on
that platform, and we have to prevent building the driver there.
In case we want to backport this to older kernels: between linux-4.8
and linux-4.20, the Kconfig entry was in drivers/mtd/spi-nor/Kconfig
but had the same problem.
Link: https://lore.kernel.org/patchwork/patch/812860/
Fixes: 161aaab8a067 ("mtd: atmel-quadspi: add driver for Atmel QSPI controller")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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[ Upstream commit 33bf5519ae5dd356b182a94e3622f42860274a38 ]
PAGE_READ is used by RISC-V arch code included through mm headers,
and it makes sense to bring in a prefix on these in the driver.
drivers/mtd/nand/raw/qcom_nandc.c:153: warning: "PAGE_READ" redefined
#define PAGE_READ 0x2
In file included from include/linux/memremap.h:7,
from include/linux/mm.h:27,
from include/linux/scatterlist.h:8,
from include/linux/dma-mapping.h:11,
from drivers/mtd/nand/raw/qcom_nandc.c:17:
arch/riscv/include/asm/pgtable.h:48: note: this is the location of the previous definition
Caught by riscv allmodconfig.
Signed-off-by: Olof Johansson <olof@lixom.net>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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This is the 4.9.144 stable release
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commit be2e1c9dcf76886a83fb1c433a316e26d4ca2550 upstream.
I noticed during the creation of another bugfix that the BCH_CONST_PARAMS
option that is set by DOCG3 breaks setting variable parameters for any
other users of the BCH library code.
The only other user we have today is the MTD_NAND software BCH
implementation (most flash controllers use hardware BCH these days
and are not affected). I considered removing BCH_CONST_PARAMS entirely
because of the inherent conflict, but according to the description in
lib/bch.c there is a significant performance benefit in keeping it.
To avoid the immediate problem of the conflict between MTD_NAND_BCH
and DOCG3, this only sets the constant parameters if MTD_NAND_BCH
is disabled, which should fix the problem for all cases that
are affected. This should also work for all stable kernels.
Note that there is only one machine that actually seems to use the
DOCG3 driver (arch/arm/mach-pxa/mioa701.c), so most users should have
the driver disabled, but it almost certainly shows up if we wanted
to test random kernels on machines that use software BCH in MTD.
Fixes: d13d19ece39f ("mtd: docg3: add ECC correction code")
Cc: stable@vger.kernel.org
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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[ Upstream commit d616f81cdd2a21edfa90a595a4e9b143f5ba8414 ]
Added support for is25wp032, is25wp064 and is25wp128.
Signed-off-by: Kimmo Rautkoski <ext-kimmo.rautkoski@vaisala.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
[ Adrian Bunk: Trivial adaption to changed context. ]
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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This is the 4.9.130 stable release
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[ Upstream commit 6c6bc9ea84d0008024606bf5ba10519e20d851bf ]
The first checks in mtdchar_read() and mtdchar_write() attempt to limit
`count` such that `*ppos + count <= mtd->size`. However, they ignore the
possibility of `*ppos > mtd->size`, allowing the calculation of `count` to
wrap around. `mtdchar_lseek()` prevents seeking beyond mtd->size, but the
pread/pwrite syscalls bypass this.
I haven't found any codepath on which this actually causes dangerous
behavior, but it seems like a sensible change anyway.
Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2")
Signed-off-by: Jann Horn <jannh@google.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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[ Upstream commit 1d25e3eeed1d987404e2d2e451eebac8c15cecc1 ]
Fix 2 printk format warnings (this driver is currently only used by
arch/sh/) by using "%pap" instead of "%lx".
Fixes these build warnings:
../drivers/mtd/maps/solutionengine.c: In function 'init_soleng_maps':
../include/linux/kern_levels.h:5:18: warning: format '%lx' expects argument of type 'long unsigned int', but argument 2 has type 'resource_size_t' {aka 'unsigned int'} [-Wformat=]
../drivers/mtd/maps/solutionengine.c:62:54: note: format string is defined here
printk(KERN_NOTICE "Solution Engine: Flash at 0x%08lx, EPROM at 0x%08lx\n",
~~~~^
%08x
../include/linux/kern_levels.h:5:18: warning: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'resource_size_t' {aka 'unsigned int'} [-Wformat=]
../drivers/mtd/maps/solutionengine.c:62:72: note: format string is defined here
printk(KERN_NOTICE "Solution Engine: Flash at 0x%08lx, EPROM at 0x%08lx\n",
~~~~^
%08x
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: linux-mtd@lists.infradead.org
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Rich Felker <dalias@libc.org>
Cc: linux-sh@vger.kernel.org
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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This is the 4.9.128 stable release
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commit 7233982ade15eeac05c6f351e8d347406e6bcd2f upstream.
Fix to return error code -ENOMEM from the kmem_cache_alloc() error
handling case instead of 0, as done elsewhere in this function.
Fixes: f78e5623f45b ("ubi: fastmap: Erase outdated anchor PEBs during
attach")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
Cc: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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i.MX8MM MEK only supports Quad mode for flexspi nor, enable the quad ddr
mode for better performance.
Signed-off-by: Han Xu <han.xu@nxp.com>
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Enable FlexSPI driver on i.MX8MM EVK.
Signed-off-by: Han Xu <han.xu@nxp.com>
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re-init the flexspi controller after suspend/resume.
runtime resume will re-init the controller, Once the it was initialized
and need to be re-init(determined by read specific register bit).
Signed-off-by: Han Xu <han.xu@nxp.com>
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enabled runtime pm for flexspi, also removed the redundant clock.
Tested with the latest SCFW and ATF.
BuildInfo:
- SCFW 15d20cde, IMX-MKIMAGE ff9860c5, ATF
- U-Boot 2017.03-00003-gd09f5db
Signed-off-by: Han Xu <han.xu@nxp.com>
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acquire/release dma in runtime pm resume/suspend to proper get/put dma
resources.
BuildInfo:
- SCFW 60e110f9, IMX-MKIMAGE e131af10, ATF
- U-Boot 2017.03-imx_4.9.51_8qm_beta1_8qxp_alpha+gfcc9bdc
Signed-off-by: Han Xu <han.xu@nxp.com>
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Remove the unnecessary tmp array from code
Signed-off-by: Han Xu <han.xu@nxp.com>
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FLEXSPI AHBCR register has one bit READADDROPT, which defined if start
address must be aligned when doing wordaddress access. This bit must be
set (no alignment limitation), otherwise controller may always try
to access from even address and got wrong data when AHB read data under
Octal DDR mode. Mounting UBIFS failed in this case since it read from
odd address.
[ 250.367893] fsl_fspi_read: from 620ad1, len: 11
[ 250.374700] UBIFS error (ubi0:0 pid 2871): check_lpt_type: invalid
type (4) in LPT node type 2
[ 250.383326] CPU: 0 PID: 2871 Comm: mount Not tainted
4.9.11-03067-gd6ce90a-dirty #251
[ 250.391156] Hardware name: Freescale i.MX8QM ARM2 (DT)
[ 250.396291] Call trace:
[ 250.398739] [<ffff0000080882bc>] dump_backtrace+0x0/0x1e0
[ 250.404139] [<ffff0000080884b0>] show_stack+0x14/0x1c
[ 250.409198] [<ffff0000083b3798>] dump_stack+0x8c/0xac
[ 250.414251] [<ffff00000833c434>] check_lpt_type+0x80/0x88
[ 250.419654] [<ffff00000833eb74>] ubifs_lpt_init+0x448/0x8a4
[ 250.425222] [<ffff000008325a38>] ubifs_mount+0xde0/0x198c
[ 250.430620] [<ffff0000081db2e0>] mount_fs+0x3c/0x15c
[ 250.435589] [<ffff0000081f7070>] vfs_kern_mount+0x4c/0x11c
[ 250.441077] [<ffff0000081fa26c>] do_mount+0x1b8/0xb5c
[ 250.446125] [<ffff0000081faf3c>] SyS_mount+0x78/0xd8
[ 250.451085] [<ffff000008082f4c>] __sys_trace_return+0x0/0x4
[ 250.456787] ---lpt_init_rd
[ 250.459530] UBIFS (ubi0:0): background thread "ubifs_bgt0_0" stops
Signed-off-by: Han Xu <han.xu@nxp.com>
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ARM64 platforms may access FSPI from non-64-bit-aligned address which
causes unalignment fault. Fixed the issue for AHB reading.
Signed-off-by: Han Xu <han.xu@nxp.com>
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Enable the EDO mode on i.MX8 platforms for better performance.
Signed-off-by: Han Xu <han.xu@nxp.com>
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oob layout setting
for the large oob layout setting, need to calculate the correct free oob
space.
Signed-off-by: Han Xu <han.xu@nxp.com>
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ARM64 platforms may access QSPI from non-64-bit-aligned address which
causes unalignment fault. Fixed the issue for AHB reading.
Signed-off-by: Han Xu <han.xu@nxp.com>
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Enable the NAND support on i.MX8QXP
Signed-off-by: Han Xu <han.xu@nxp.com>
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Some MICRON related macros in spi-nor domain were ST, actually. We need
to add the REAL micron defination in header/source files for
mt35xu512aba Micron Octal Nor chip.
Signed-off-by: Han Xu <han.xu@nxp.com>
Acked-by: Frank Li <frank.li@nxp.com>
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Enhanced spi-nor framework to support octal read mode
Signed-off-by: Han Xu <han.xu@nxp.com>
Acked-by: Frank Li <frank.li@nxp.com>
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support the flexspi nor controller for i.MX8 platforms, read data
in octal ddr mode by default.
Signed-off-by: Han Xu <han.xu@nxp.com>
Acked-by: Frank Li <frank.li@nxp.com>
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This patch removes the WARN_ONCE() test in spi_nor_write().
This macro triggers the display of a warning message almost every time we
use a UBI file-system because a write operation is performed at offset 64,
which is in the middle of the SPI NOR memory page. This is a valid
operation for ubifs.
Hence this warning is pretty annoying and useless so we just remove it.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Suggested-by: Richard Weinberger <richard@nod.at>
Suggested-by: Andras Szemzo <szemzo.andras@gmail.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Octavian: rebased to 4.9]
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Reviewed-by: "Frank Li" <frank.li@nxp.com>
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Fix the logic error when reading dummy cycle for qspi ddr quad mode
Signed-off-by: Han Xu <han.xu@nxp.com>
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mtd->priv is no longer pointing to the struct nand_chip it is attached
to. Replace those accesses by mtd_to_nand() calls.
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
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ULP1 use new QSPI NOR chip MX25R6435F which is not in default id table.
Signed-off-by: Han Xu <han.xu@nxp.com>
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Since QSPI is not in A7 domain on i.MX7ULP, the clock framework doesn't
provide support to handle related clock, add QUIRK to indicate the QSPI
was handled by u-boot. May change the code after clock framework
supports M4 domain.
Signed-off-by: Han Xu <han.xu@nxp.com>
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QSPI only support upto 16 LUT slots while the QSPI commands are more
than this number, reserve the last two slots for dynamic change (most
commands used in pairs). Later all extra supported commands will be add
in dynamic lut table.
Signed-off-by: Han Xu <han.xu@nxp.com>
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support QSPI on i.MX6ULL. By default, only QSPI1 was enabled, while
reworked board could support all 4 QSPI chips.
Since i.MX6UL and i.MX6ULL QSPI controller are identical, reuse the
i.MX6UL datatype for i.MX6ULL.
Signed-off-by: Han Xu <han.xu@nxp.com>
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support NAND on imx6ull
Signed-off-by: Han Xu <han.xu@nxp.com>
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missed the brackets for bch legacy support, which leads the large oob
nand bch setting to wrong path.
Signed-off-by: Han Xu <han.xu@nxp.com>
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Provide an option in DT to use legacy bch geometry, which compatible
with the 3.10 kernel bch setting. To enable the feature, adding
"fsl,legacy-bch-geometry" under gpmi-nand node.
NOTICE: The feature must be enabled/disabled in both u-boot and kernel.
Conflicts:
drivers/mtd/nand/gpmi-nand/gpmi-nand.h
Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit 4d28b1693905526558892d40525763e6bc4469e4)
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fix the potential integer overflow issue found by coverify.
Signed-off-by: Han Xu <han.xu@nxp.com>
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access mode
For backward compatibility, kobs-ng need to know if the driver use
legacy raw mode or new bch layout raw mode, add a new flag in debugfs to
indicate the raw access mode.
Signed-off-by: Han Xu <han.xu@nxp.com>
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support the bch layout with dedicate ecc for meta
Signed-off-by: Han Xu <han.xu@nxp.com>
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This reverts commit 76babd7d075c9c22a27e6bc272bb57b6327cfbd3.
Signed-off-by: Han Xu <han.xu@nxp.com>
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new implementation of GPMI NAND raw access functions was added in kernel
4.1 which changes the way from writing data in mirror mode to writing
data with BCH layout mode.
New implementation can help third party tools to analysis the data since
all data were written in same layout, with or without ECC, but this
implementation doesn't work for NAND boot. Kobs-ng, the tool for NAND
boot will create the boot configuration data for each specific platform
and need to write the data to NAND in mirror mode. In this workaround,
we will keep using the previous raw NAND access function to fix the
issue.
Signed-off-by: Han Xu <han.xu@nxp.com>
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found by coverity
check the return value to avoid the dereference null return value when
parsing device tree.
Signed-off-by: Han Xu <han.xu@nxp.com>
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Fix the typo in when check bch geometry ecc chunk0 and chunkn size.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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For i.MX6UL and i.MX7D, ddr delay logic enable bit is changed from i.MX6SX.
If want to enable qspi ddr mode, ddr delay logic should be enabled.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked and merge from commit f28986825a7be1cbf2b5103ea110db28c96e74c7)
Signed-off-by: Han Xu <b45815@freescale.com>
Conflicts:
drivers/mtd/spi-nor/fsl-quadspi.c
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add two more commands support for qspi on kernel 4.1, read EVCR and
write EVCR.
Signed-off-by: Han Xu <b45815@freescale.com>
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If the master mtd does not have any slave mtd partitions,
and its numeraseregions is one(only has one erease block), and
we attach the master mtd with : ubiattach -m 0 -d 0
We will meet the error:
-------------------------------------------------------
root@freescale ~$ ubiattach /dev/ubi_ctrl -m 0 -d 0
UBI: attaching mtd0 to ubi0
UBI error: io_init: multiple regions, not implemented
ubiattach: error!: cannot attach mtd0
error 22 (Invalid argument)
-------------------------------------------------------
In fact, if there is only one "erase block", we should not
prevent the attach.
This patch fixes it.
Signed-off-by: Huang Shijie <b32955@freescale.com>
(cherry picked from commit 361cdc47fc4c4db31c5485560cdabd94f409bd81)
(cherry picked from commit ebee7d74914fad3cf7223af84496811c9d2488a1)
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The LPSR turns off the power for IOMUX when suspending so restore the
IOMUX when resuming.
Signed-off-by: Han Xu <b45815@freescale.com>
(cherry picked from commit 906d0c1381e865dc7c96a4bde6fe694f1ce089a9)
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the obsolete bit DDR_EN on 6UL and 7D should be clear in case other
program set the bit and cause qspi probe fail.
Signed-off-by: Han Xu <b45815@freescale.com>
(cherry picked from commit d8b51cc358780f68e732522ee9bd6bd578dd6771)
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Enable DDR quad mode for Macronix qspi chip mx25l51245g by setting Quad
bit in status register and enabling in dts file.
The LUT for SPINOR_OP_READ_1_4_4_D was initially designed for Spansion
qspi chip, so there is one cycle for "mode" after address and before
dummy. While Macronix qspi chip doesn't have this feature, so we just
take off one cycle in dts file to bypass this problem.
Signed-off-by: Han Xu <b45815@freescale.com>
(cherry picked and merge from commit e03fdad1c7713a7db70112e00c4ae96848accd34)
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