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1. Blank BG during video play on FG:
./mxc_v4l2_output.out -iw 320 -ih 240 -ow 1024 -oh 768 -d 3 qvga.yuv
echo 1 > /sys/class/graphics/fb0/blank
echo 0 > /sys/class/graphics/fb0/blank
2. The same input and output (ic_bypass):
./mxc_v4l2_output.out -iw 320 -ih 240 -ow 320 -oh 240 -d 3 qvga.yuv
echo 1 > /sys/class/graphics/fb0/blank
echo 0 > /sys/class/graphics/fb0/blank
Signed-off-by: Jason Chen <b02280@freescale.com>
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UBO and VBO are 22-bit in CPMEM. When processing a high resolution
frame in YUV format, the value of UV-offset may overflow, but the
driver keeps silent.
Signed-off-by: Liu Ying <b17645@freescale.com>
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The UV offset is set wrongly when idmac does cropping.
This patch changes to get the UV offset from user in this case now.
Signed-off-by: Liu Ying <b17645@freescale.com>
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dmfc setting should be restored after system resume.
Signed-off-by: Jason Chen <b02280@freescale.com>
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1.arrange display port according to choice of different display device
2.for ipu_disp.c: not round pixel clock to even for tvout.
3.cmdline "hdtv" enable 720P, "hdtv=2" enable 720P as primary.
Signed-off-by: Jason Chen <b02280@freescale.com>
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To support 720p output for ipu lib.
Signed-off-by: Jason Chen <b02280@freescale.com>
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add dmfc size control for dynamic change and _setup.
DMFC_NORMAL: segment 0,1 for DC, 4,5 for DP-BG, 6,7 for DP-FG.
DMFC_HIGH_RESOLUTION_DC: segment 0~3 for DC, 4,5 for DP-BG, 6,7 for DP-FG.
DMFC_HIGH_RESOLUTION_DP: segment 0,1 for DC, 2~5 for DP-BG, 6,7 for DP-FG.
DMFC_HIGH_RESOLUTION_ONLY_DP: segment 0~3 for DP-BG, 4~7 for DP-FG.
IPU diplay driver will try to enlarge its related DMFC segment size
when it meet high resolution condition, but if dmfc is already in high
resolution setting, dmfc will not change.That said, first request wins.
For cmdline setting, "dmfc=1" is DMFC_HIGH_RESOLUTION_DC, "dmfc=2"
is DMFC_HIGH_RESOLUTION_DP, "dmfc=3" is
DMFC_HIGH_RESOLUTION_ONLY_DP.
NOTE: DMFC_HIGH_RESOLUTION_ONLY_DP only can be set by cmdline.
Signed-off-by: Jason Chen <b02280@freescale.com>
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Setting "video=mxcfb:800x600-16@60" in the exec command makes video not play
correctly, IPU didn't play video when panel blank line where lower then minimum
required by IPU
Signed-off-by: Ran Ferderber r53561@freescale.com
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pll_set_rate function should only wait for PLL relock if PLL is enabled.
Also add a timeout to the infinte loop.
Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
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DVFS-PER needs to make sure that the pixel clock divider is an
even integer.
Added support for pixel clock being sourced from an external clock (PLL3)
Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
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Added clock nodes for pixel clocks so that their rates and
parents can be easily tracked.
Signed-off-by: Rob Herring <r.herring@freescale.com>
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Added support for DVFS-PER for both MX37 and MX51.
Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
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Add timeout in ipu channel disable while loop.
Signed-off-by: Jason Chen <b02280@freescale.com>
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Crop support for outgoing picture to TVE in 720P format
Signed-off-by: Mark.Gutman@freescale.com>
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Support DP gamma by setting piecewise linear approximation,
application need set coefficient const[k] and slope[k]. The algorithm to
calculate these coefficient pls refer to unit test.
Signed-off-by: Jason Chen <b02280@freescale.com>
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After switch DP(2 layer) from lcd to tvout, fb1 use RGBP format, the
output of fb1's color was not exactly correct.
Signed-off-by: Jason Chen <b02280@freescale.com>
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Synchronize DP local alpha update with sdc framebuffer in pan display.
Signed-off-by: Liu Ying <b17645@freescale.com>
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Bootload may do ipu init to display something, add SRC reset here to
make sure ipu working well in BSP.
Signed-off-by: Jason Chen <b02280@freescale.com>
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IPU channel disable should wait all channels finish busy state, should
wait for input dma interrupt first then output dma interrupt as the
correct sequence for all channels. This patch fix the DQ_BUF fail issue
in VPU unit test.
Signed-off-by: Jason Chen <b02280@freescale.com>
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IPU channel disable should wait all channels finish busy state, should
wait for input dma interrupt as the correct finish signal for all
channels. This patch fix the DQ_BUF fail issue in VPU unit test.
Signed-off-by: Jason Chen <b02280@freescale.com>
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A new feature is added to support to upsizing by horizontal stripes
via IC PP channels double using.
Signed-off-by: Mark Gutman <r58412@freescale.com>
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PRP_VF and PRP_ENC channels are able to be used at the same time
when their sources are the same.
Signed-off-by: Liu Ying <b17645@freescale.com>
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This is i.MX BSP 5.0.0 release ported to 2.6.31
Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Alan Tull <r80115@freescale.com>
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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