Age | Commit message (Collapse) | Author |
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Digi 01262011 Release
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This behaviour was causing that even when the user has not explicitely set
a wakeup source the system was suspending without a way to awake. With
this change the RTC wake up source is set up when its suspend method is
called, making it possible to check for enabled wake up sources on the
platform suspend enter.
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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They are not am formatted.
ENGR00122465-1-spi-polling
ENGR00122465-2-spi-poll-sync
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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The mach-mx51 folder has been replaced by mach-mx5 to enable the addition
of more platforms.
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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Setting the AXI ID on to 1 for sync display channels on MX53 causes
display flickering when system is heavily loaded.
Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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This patch supports camera's MCLK be derived from SSI_EXT1_CLK.
Signed-off-by: Liu Ying <b17645@freescale.com
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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SAHARA driver changes for MX53 including fix for handling
high memory user buffers
Signed-off-by: Anish Trivedi <anish@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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SCC2 driver changes to set base address of registers and
scc ram based on resources
Signed-off-by: Anish Trivedi <anish@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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there is no battery on mx53 evk, which cause this issue.
remove PMIC battery driver can fix this
Signed-off-by: Shen Yong <b00984@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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move ipu reset function to MSL.
Signed-off-by: Jason Chen <b02280@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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Fix IPU register access for IPU v2 and v3.
Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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Add support for VPU on MX53 EVK board.
Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Sammy He <r62914@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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The memory map on IPUv3M is compressed into a smaller region, so
support this as revision 3 of the h/w.
Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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This patch make tve primary display work for both imx51_bbg and imx37_3stack.
For imx51_bbg, add "hdtv=2" to cmdline, for imx37_3stack, add "tv" to
cmdline.
Signed-off-by: Jason Chen <b02280@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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Restructure vpu code to remove IO_ADDRESS, and add iram allocator
in vpu driver.
Signed-off-by: Sammy He <r62914@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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Rename mx51 to mx5 for common source for MX5x family
Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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Add interface to enable/disable HSYNC bit on imx_adc.
Signed-off-by: Sammy He <r62914@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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1. Add "hdtv=2' to boot cmdline. HDTV should be primary display device.
2. Color key need be convert to YUV format when output is YUV, to
correct the convertion function, negative coefficents of RGB2YUV CSC
matrix could not use complement number.
Signed-off-by: Jason Chen <b02280@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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As CSI->MEM channel keeps on writing the buffer which is set to
ready latestly and raising up end of frame interrupts, the current
v4l2 capture realization mechanism is not appropriate for this channel.
This patch will update the idmac buffer to a dummy buffer whenever
there is no buffers queued by the user.
Signed-off-by: Liu Ying <b17645@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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To preview with V4L2 overlay and capture at the same time may fail.
This patch implements workaround for this issue by enabling CSI after
PRP channels are setup.
Signed-off-by: Liu Ying <b17645@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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Add IPU_CSC_UPDATE case for ipu ioctl.
Signed-off-by: Sammy He <r62914@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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This replaces IO_ADDRESS with ioremap in drivers. Drivers needing more
than trivial changes are not included.
Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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The spba defaults to all masters enabled and this is fine as
all chips only have ARM and SDMA as masters.
Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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Convert MLB driver to use iram allocator functions.
Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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Fix stride calculation
Signed-off-by: Ran Ferderber r53561@freescale.com
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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Fix stripe size calculation
Signed-off-by: Ran Ferderber r53561@freescale.com
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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blank/unblank fb during v4l2 playback, unblank will cause current buffer
of display channel to be 1. This patch make the sequence of select
display buffer correct.
Signed-off-by: Jason Chen <b02280@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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1. Blank BG during video play on FG:
./mxc_v4l2_output.out -iw 320 -ih 240 -ow 1024 -oh 768 -d 3 qvga.yuv
echo 1 > /sys/class/graphics/fb0/blank
echo 0 > /sys/class/graphics/fb0/blank
2. The same input and output (ic_bypass):
./mxc_v4l2_output.out -iw 320 -ih 240 -ow 320 -oh 240 -d 3 qvga.yuv
echo 1 > /sys/class/graphics/fb0/blank
echo 0 > /sys/class/graphics/fb0/blank
Signed-off-by: Jason Chen <b02280@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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UBO and VBO are 22-bit in CPMEM. When processing a high resolution
frame in YUV format, the value of UV-offset may overflow, but the
driver keeps silent.
Signed-off-by: Liu Ying <b17645@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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The UV offset is set wrongly when idmac does cropping.
This patch changes to get the UV offset from user in this case now.
Signed-off-by: Liu Ying <b17645@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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use level irq for pmic event handling to avoid
potential pmic event lost
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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dmfc setting should be restored after system resume.
Signed-off-by: Jason Chen <b02280@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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This commit implements the shutdown function to solve a problem that was
happening when the touchscreen was enabled (and had been open).
In that scenario, the reboot shell command was not working (the system
was not rebooting properly, stalling after Restarting system message).
Stopping the ADC by calling the deinit function seems to fix the problem.
Signed-off-by: Pedro Perez de Heredia <pedro.perez@digi.com>
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The MXC_MC13892_RTC option refers to a module which is not implemented
in the PMIC. Also, the I2C_MXC_SELECT3 option refers to an inexistent
I2C interface.
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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Although in theory only one of them is needed as a control mechanism,
the BSP code fails to build if one of them is not included.
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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This commit adds 2 configuration entries to configure the maximum
allowed Delta between 3 consecutive samples, to control the driver
jitter.
Signed-off-by: Pedro Perez de Heredia <pedro.perez@digi.com>
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Fix compilation errors and warnings and initialize FEC ethernet driver.
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
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1.arrange display port according to choice of different display device
2.for ipu_disp.c: not round pixel clock to even for tvout.
3.cmdline "hdtv" enable 720P, "hdtv=2" enable 720P as primary.
Signed-off-by: Jason Chen <b02280@freescale.com>
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To support 720p output for ipu lib.
Signed-off-by: Jason Chen <b02280@freescale.com>
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add dmfc size control for dynamic change and _setup.
DMFC_NORMAL: segment 0,1 for DC, 4,5 for DP-BG, 6,7 for DP-FG.
DMFC_HIGH_RESOLUTION_DC: segment 0~3 for DC, 4,5 for DP-BG, 6,7 for DP-FG.
DMFC_HIGH_RESOLUTION_DP: segment 0,1 for DC, 2~5 for DP-BG, 6,7 for DP-FG.
DMFC_HIGH_RESOLUTION_ONLY_DP: segment 0~3 for DP-BG, 4~7 for DP-FG.
IPU diplay driver will try to enlarge its related DMFC segment size
when it meet high resolution condition, but if dmfc is already in high
resolution setting, dmfc will not change.That said, first request wins.
For cmdline setting, "dmfc=1" is DMFC_HIGH_RESOLUTION_DC, "dmfc=2"
is DMFC_HIGH_RESOLUTION_DP, "dmfc=3" is
DMFC_HIGH_RESOLUTION_ONLY_DP.
NOTE: DMFC_HIGH_RESOLUTION_ONLY_DP only can be set by cmdline.
Signed-off-by: Jason Chen <b02280@freescale.com>
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Setting "video=mxcfb:800x600-16@60" in the exec command makes video not play
correctly, IPU didn't play video when panel blank line where lower then minimum
required by IPU
Signed-off-by: Ran Ferderber r53561@freescale.com
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pll_set_rate function should only wait for PLL relock if PLL is enabled.
Also add a timeout to the infinte loop.
Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
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DVFS-PER needs to make sure that the pixel clock divider is an
even integer.
Added support for pixel clock being sourced from an external clock (PLL3)
Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
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Added clock nodes for pixel clocks so that their rates and
parents can be easily tracked.
Signed-off-by: Rob Herring <r.herring@freescale.com>
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Added support for DVFS-PER for both MX37 and MX51.
Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
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Add timeout in ipu channel disable while loop.
Signed-off-by: Jason Chen <b02280@freescale.com>
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Fix touch screen cannot work sometimes issue:
Use PD_IRQ mask to control irq to system, not PD_EN.
Signed-off-by: Sammy He <r62914@freescale.com>
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