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path: root/drivers/pci/host/pci-tegra.c
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2013-08-29PCI: tegra: replace devm_request_and_ioremap by devm_ioremap_resourceJulia Lawall
Use devm_ioremap_resource instead of devm_request_and_ioremap. This was done using the semantic patch scripts/coccinelle/api/devm_ioremap_resource.cocci Error-handling code was manually removed from the associated calls to platform_get_resource. Adjust the comment at the third platform_get_resource_byname to make clear why ioremap is not done at this point. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-13ARM: tegra: disable LP2 cpuidle state if PCIe is enabledStephen Warren
Tegra20 HW appears to have a bug such that PCIe device interrupts, whether they are legacy IRQs or MSI, are lost when LP2 is enabled. To work around this, simply disable LP2 if any PCIe devices with interrupts are present. Detect this via the IRQ domain map operation. This is slightly over-conservative; if a device with an interrupt is present but the driver does not actually use them, LP2 will still be disabled. However, this is a reasonable trade-off which enables a simpler workaround. Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com>
2013-08-13PCI: tegra: set up PADS_REFCLK_CFG1Stephen Warren
The registers PADS_REFCLK_CFG are an array of 16-bit data, one entry per PCIe root port. For Tegra30, we therefore need to write a 3rd entry in this array. Doing so makes the mini-PCIe slot on Beaver operate correctly. While we're at it, add some #defines to partially document the fields within these 16-bit values. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-13PCI: tegra: Add Tegra 30 PCIe supportJay Agarwal
Introduce a data structure to parameterize the driver according to SoC generation, add Tegra30 specific code and update the device tree binding document for Tegra30 support. Signed-off-by: Jay Agarwal <jagarwal@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-13PCI: tegra: Move PCIe driver to drivers/pci/hostThierry Reding
Move the PCIe driver from arch/arm/mach-tegra into the drivers/pci/host directory. The motivation is to collect various host controller drivers in the same location in order to facilitate refactoring. The Tegra PCIe driver has been largely rewritten, both in order to turn it into a proper platform driver and to add MSI (based on code by Krishna Kishore <kthota@nvidia.com>) as well as device tree support. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> [swarren, split DT changes into a separate patch in another branch] Signed-off-by: Stephen Warren <swarren@nvidia.com>