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2017-01-26PCI: Enumerate switches below PCI-to-PCIe bridgesBjorn Helgaas
commit 51ebfc92b72b4f7dac1ab45683bf56741e454b8c upstream. A PCI-to-PCIe bridge (a "reverse bridge") has a PCI or PCI-X primary interface and a PCI Express secondary interface. The PCIe interface is a Downstream Port that originates a Link. See the "PCI Express to PCI/PCI-X Bridge Specification", rev 1.0, sections 1.2 and A.6. The bug report below involves a PCI-to-PCIe bridge and a PCIe switch below the bridge: 00:1e.0 Intel 82801 PCI Bridge to [bus 01-0a] 01:00.0 Pericom PI7C9X111SL PCIe-to-PCI Reversible Bridge to [bus 02-0a] 02:00.0 Pericom Device 8608 [PCIe Upstream Port] to [bus 03-0a] 03:01.0 Pericom Device 8608 [PCIe Downstream Port] to [bus 0a] 01:00.0 is configured as a PCI-to-PCIe bridge (despite the name printed by lspci). As we traverse a PCIe hierarchy, device connections alternate between PCIe Links and internal Switch logic. Previously we did not recognize that 01:00.0 had a secondary link, so we thought the 02:00.0 Upstream Port *did* have a secondary link. In fact, it's the other way around: 01:00.0 has a secondary link, and 02:00.0 has internal Switch logic on its secondary side. When we thought 02:00.0 had a secondary link, the pci_scan_slot() -> only_one_child() path assumed 02:00.0 could have only one child, so 03:00.0 was the only possible downstream device. But 03:00.0 doesn't exist, so we didn't look for any other devices on bus 03. Booting with "pci=pcie_scan_all" is a workaround, but we don't want users to have to do that. Recognize that PCI-to-PCIe bridges originate links on their secondary interfaces. Link: https://bugzilla.kernel.org/show_bug.cgi?id=189361 Fixes: d0751b98dfa3 ("PCI: Add dev->has_secondary_link to track downstream PCIe links") Tested-by: Blake Moore <blake.moore@men.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-26PCI: designware: Check for iATU unroll only on platforms that use ATUMurali Karicheri
commit a782b5f986c3fa1cfa7f2b57941200c6a5809242 upstream. Previously we checked for iATU unroll support by reading PCIE_ATU_VIEWPORT even on platforms, e.g., Keystone, that do not have ATU ports. This can cause bad behavior such as asynchronous external aborts: OF: PCI: MEM 0x60000000..0x6fffffff -> 0x60000000 Unhandled fault: asynchronous external abort (0x1211) at 0x00000000 pgd = c0003000 [00000000] *pgd=80000800004003, *pmd=00000000 Internal error: : 1211 [#1] PREEMPT SMP ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.9.0-00009-g6ff59d2-dirty #7 Hardware name: Keystone task: eb878000 task.stack: eb866000 PC is at dw_pcie_setup_rc+0x24/0x380 LR is at ks_pcie_host_init+0x10/0x170 Move the dw_pcie_iatu_unroll_enabled() check so we only call it on platforms that do not use the ATU. These platforms supply their own ->rd_other_conf() and ->wr_other_conf() methods. [bhelgaas: changelog] Fixes: a0601a470537 ("PCI: designware: Add iATU Unroll feature") Fixes: 416379f9ebde ("PCI: designware: Check for iATU unroll support after initializing host") Tested-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-By: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-12powerpc/pci/rpadlpar: Fix device reference leaksJohan Hovold
commit 99e5cde5eae78bef95bfe7c16ccda87fb070149b upstream. Make sure to drop any device reference taken by vio_find_node() when adding and removing virtual I/O slots. Fixes: 5eeb8c63a38f ("[PATCH] PCI Hotplug: rpaphp: Move VIO registration") Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-12PCI: Enable access to non-standard VPD for Chelsio devices (cxgb3)Alexey Kardashevskiy
commit 1c7de2b4ff886a45fbd2f4c3d4627e0f37a9dd77 upstream. There is at least one Chelsio 10Gb card which uses VPD area to store some non-standard blocks (example below). However pci_vpd_size() returns the length of the first block only assuming that there can be only one VPD "End Tag". Since 4e1a635552d3 ("vfio/pci: Use kernel VPD access functions"), VFIO blocks access beyond that offset, which prevents the guest "cxgb3" driver from probing the device. The host system does not have this problem as its driver accesses the config space directly without pci_read_vpd(). Add a quirk to override the VPD size to a bigger value. The maximum size is taken from EEPROMSIZE in drivers/net/ethernet/chelsio/cxgb3/common.h. We do not read the tag as the cxgb3 driver does as the driver supports writing to EEPROM/VPD and when it writes, it only checks for 8192 bytes boundary. The quirk is registered for all devices supported by the cxgb3 driver. This adds a quirk to the PCI layer (not to the cxgb3 driver) as the cxgb3 driver itself accesses VPD directly and the problem only exists with the vfio-pci driver (when cxgb3 is not running on the host and may not be even loaded) which blocks accesses beyond the first block of VPD data. However vfio-pci itself does not have quirks mechanism so we add it to PCI. This is the controller: Ethernet controller [0200]: Chelsio Communications Inc T310 10GbE Single Port Adapter [1425:0030] This is what I parsed from its VPD: === b'\x82*\x0010 Gigabit Ethernet-SR PCI Express Adapter\x90J\x00EC\x07D76809 FN\x0746K' 0000 Large item 42 bytes; name 0x2 Identifier String b'10 Gigabit Ethernet-SR PCI Express Adapter' 002d Large item 74 bytes; name 0x10 #00 [EC] len=7: b'D76809 ' #0a [FN] len=7: b'46K7897' #14 [PN] len=7: b'46K7897' #1e [MN] len=4: b'1037' #25 [FC] len=4: b'5769' #2c [SN] len=12: b'YL102035603V' #3b [NA] len=12: b'00145E992ED1' 007a Small item 1 bytes; name 0xf End Tag 0c00 Large item 16 bytes; name 0x2 Identifier String b'S310E-SR-X ' 0c13 Large item 234 bytes; name 0x10 #00 [PN] len=16: b'TBD ' #13 [EC] len=16: b'110107730D2 ' #26 [SN] len=16: b'97YL102035603V ' #39 [NA] len=12: b'00145E992ED1' #48 [V0] len=6: b'175000' #51 [V1] len=6: b'266666' #5a [V2] len=6: b'266666' #63 [V3] len=6: b'2000 ' #6c [V4] len=2: b'1 ' #71 [V5] len=6: b'c2 ' #7a [V6] len=6: b'0 ' #83 [V7] len=2: b'1 ' #88 [V8] len=2: b'0 ' #8d [V9] len=2: b'0 ' #92 [VA] len=2: b'0 ' #97 [RV] len=80: b's\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00'... 0d00 Large item 252 bytes; name 0x11 #00 [VC] len=16: b'122310_1222 dp ' #13 [VD] len=16: b'610-0001-00 H1\x00\x00' #26 [VE] len=16: b'122310_1353 fp ' #39 [VF] len=16: b'610-0001-00 H1\x00\x00' #4c [RW] len=173: b'\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00'... 0dff Small item 0 bytes; name 0xf End Tag 10f3 Large item 13315 bytes; name 0x62 !!! unknown item name 98: b'\xd0\x03\x00@`\x0c\x08\x00\x00\x00\x00\x00\x00\x00\x00\x00' === Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-12PCI: Support INTx masking on ConnectX-4 with firmware x.14.1100+Noa Osherovich
commit 1600f62534b7b3da7978b43b52231a54c24df287 upstream. Mellanox devices were marked as having INTx masking ability broken. As a result, the VFIO driver fails to start when more than one device function is passed-through to a VM if both have the same INTx pin. Prior to Connect-IB, Mellanox devices exposed to the operating system one PCI function per all ports. Starting from Connect-IB, the devices are function-per-port. When passing the second function to a VM, VFIO will fail to start. Exclude ConnectX-4, ConnectX4-Lx and Connect-IB from the list of Mellanox devices marked as having broken INTx masking: - ConnectX-4 and ConnectX4-LX firmware version is checked. If INTx masking is supported, we unmark the broken INTx masking. - Connect-IB does not support INTx currently so will not cause any problem. [bhelgaas: call pci_disable_device() always, after iounmap()] Fixes: 11e42532ada3 ("PCI: Assume all Mellanox devices have broken INTx masking") Signed-off-by: Noa Osherovich <noaos@mellanox.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com> Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-12PCI: Convert Mellanox broken INTx quirks to be for listed devices onlyNoa Osherovich
commit d76d2fe05fd93673d184af77255bbbc63780f4ea upstream. Change Mellanox's broken_intx_masking() quirk from an "all Mellanox devices" to a quirk for listed devices only. [bhelgaas: remove #defines, reorder to keep other quirks together] Signed-off-by: Noa Osherovich <noaos@mellanox.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com> Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-12PCI: Convert broken INTx masking quirks from HEADER to FINALNoa Osherovich
commit b88214ce4d7064992452765028bd50702414f15f upstream. Convert all quirk_broken_intx_masking() quirks from HEADER to FINAL. The quirk sets dev->broken_intx_masking, which is only used by pci_intx_mask_supported(), which is not needed until after FINAL quirks have been run. [bhelgaas: changelog] Signed-off-by: Noa Osherovich <noaos@mellanox.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-12PCI: rockchip: Correct the use of FTS maskBrian Norris
commit a45e2611b9bbd81288d97d02ce7e74a60a698d43 upstream. We're trying to mask out bits[23:8] while retaining [32:24, 7:0], but we're doing the inverse. That doesn't have too much effect, since we're setting all the [23:8] bits to 1, and the other bits are only relevant for modes we're currently not using. But we should get this right. Fixes: ca1989084054 ("PCI: rockchip: Fix wrong transmitted FTS count") Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-12PCI: rockchip: Fix negotiated lanes calculationShawn Lin
commit 45e9320f3a4ef9588ee50a2eb1891c4bfdbb07df upstream. The calculation of negotiated lanes is wrong: it should be shifted by PCIE_CORE_PL_CONF_LANE_SHIFT, but it is shifted by PCIE_CORE_PL_CONF_LANE_MASK instead. Let's fix it. Fixes: e77f847df54c ("PCI: rockchip: Add Rockchip PCIe controller support") Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-12PCI/MSI: Check for NULL affinity mask in pci_irq_get_affinity()Jan Beulich
commit d1d111e073840b8dbc1ae90ba3fc274736451bdc upstream. If msi_setup_entry() fails to allocate an affinity mask, it logs a message but continues on and allocates an MSI entry with entry->affinity == NULL. Check for this case in pci_irq_get_affinity() so we don't try to dereference a NULL pointer. [bhelgaas: changelog] Fixes: ee8d41e53efe "pci/msi: Retrieve affinity for a vector" Signed-off-by: Jan Beulich <jbeulich@suse.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Christoph Hellwig <hch@lst.de> CC: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-09PCI: Check for PME in targeted sleep stateAlan Stern
commit 6496ebd7edf446fccf8266a1a70ffcb64252593e upstream. One some systems, the firmware does not allow certain PCI devices to be put in deep D-states. This can cause problems for wakeup signalling, if the device does not support PME# in the deepest allowed suspend state. For example, Pierre reports that on his system, ACPI does not permit his xHCI host controller to go into D3 during runtime suspend -- but D3 is the only state in which the controller can generate PME# signals. As a result, the controller goes into runtime suspend but never wakes up, so it doesn't work properly. USB devices plugged into the controller are never detected. If the device relies on PME# for wakeup signals but is not capable of generating PME# in the target state, the PCI core should accurately report that it cannot do wakeup from runtime suspend. This patch modifies the pci_dev_run_wake() routine to add this check. Reported-by: Pierre de Villemereuil <flyos@mailoo.org> Tested-by: Pierre de Villemereuil <flyos@mailoo.org> Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> CC: Lukas Wunner <lukas@wunner.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-12-01Merge tag 'pci-v4.9-fixes-4' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fixes from Bjorn Helgaas: "PCI fixes: - Fix Read Completion Boundary setting, which fixes a boot failure on IBM x3850 with Mellanox MT27500 ConnectX-3 - Update some MAINTAINERS entries and email addresses" * tag 'pci-v4.9-fixes-4' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: Set Read Completion Boundary to 128 iff Root Port supports it (_HPX) PCI: Export pcie_find_root_port PCI: designware-plat: Update author email PCI: designware: Change maintainer to Joao Pinto MAINTAINERS: Add devicetree binding to PCI i.MX6 entry MAINTAINERS: Update Richard Zhu's email address
2016-11-23PCI: Set Read Completion Boundary to 128 iff Root Port supports it (_HPX)Johannes Thumshirn
Per PCIe spec r3.0, sec 2.3.1.1, the Read Completion Boundary (RCB) determines the naturally aligned address boundaries on which a Read Request may be serviced with multiple Completions: - For a Root Complex, RCB is 64 bytes or 128 bytes This value is reported in the Link Control Register Note: Bridges and Endpoints may implement a corresponding command bit which may be set by system software to indicate the RCB value for the Root Complex, allowing the Bridge/Endpoint to optimize its behavior when the Root Complex’s RCB is 128 bytes. - For all other system elements, RCB is 128 bytes Per sec 7.8.7, if a Root Port only supports a 64-byte RCB, the RCB of all downstream devices must be clear, indicating an RCB of 64 bytes. If the Root Port supports a 128-byte RCB, we may optionally set the RCB of downstream devices so they know they can generate larger Completions. Some BIOSes supply an _HPX that tells us to set RCB, even though the Root Port doesn't have RCB set, which may lead to Malformed TLP errors if the Endpoint generates completions larger than the Root Port can handle. The IBM x3850 X6 with BIOS version -[A8E120CUS-1.30]- 08/22/2016 supplies such an _HPX and a Mellanox MT27500 ConnectX-3 device fails to initialize: mlx4_core 0000:41:00.0: command 0xfff timed out (go bit not cleared) mlx4_core 0000:41:00.0: device is going to be reset mlx4_core 0000:41:00.0: Failed to obtain HW semaphore, aborting mlx4_core 0000:41:00.0: Fail to reset HCA ------------[ cut here ]------------ kernel BUG at drivers/net/ethernet/mellanox/mlx4/catas.c:193! After 6cd33649fa83 ("PCI: Add pci_configure_device() during enumeration") and 7a1562d4f2d0 ("PCI: Apply _HPX Link Control settings to all devices with a link"), we apply _HPX settings to *all* devices, not just those hot-added after boot. Before 7a1562d4f2d0, we didn't touch the Mellanox RCB, and the device worked. After 7a1562d4f2d0, we set its RCB to 128, and it failed. Set the RCB to 128 iff the Root Port supports a 128-byte RCB. Otherwise, set RCB to 64 bytes. This effectively ignores what _HPX tells us about RCB. Note that this change only affects _HPX handling. If we have no _HPX, this does nothing with RCB. [bhelgaas: changelog, clear RCB if not set for Root Port] Fixes: 6cd33649fa83 ("PCI: Add pci_configure_device() during enumeration") Fixes: 7a1562d4f2d0 ("PCI: Apply _HPX Link Control settings to all devices with a link") Link: https://bugzilla.kernel.org/show_bug.cgi?id=187781 Tested-by: Frank Danapfel <fdanapfe@redhat.com> Signed-off-by: Johannes Thumshirn <jthumshirn@suse.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Myron Stowe <myron.stowe@redhat.com> CC: stable@vger.kernel.org # v3.18+
2016-11-23PCI: Export pcie_find_root_portJohannes Thumshirn
Export pcie_find_root_port() so we can use it outside of PCIe-AER error injection. Signed-off-by: Johannes Thumshirn <jthumshirn@suse.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-11-16PCI: designware-plat: Update author emailJoao Pinto
I returned to Synopsys and so I am sending this patch to update the email address of the pcie-designware-plat author. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-11-14Merge branch 'x86-urgent-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Ingo Molnar: "Misc fixes: - fix an Intel/MID boot crash/hang bug - fix a cache topology mis-parsing bug on certain AMD CPUs - fix a virtualization firmware bug by adding a check+quirk workaround on the kernel side" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/cpu: Deal with broken firmware (VMWare/XEN) x86/cpu/AMD: Fix cpu_llc_id for AMD Fam17h systems x86/platform/intel-mid: Retrofit pci_platform_pm_ops ->get_state hook
2016-11-11Merge tag 'pci-v4.9-fixes-3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fixes from Bjorn Helgaas: - Update MAINTAINERS for Intel VMD driver filename - Update Rockchip rk3399 host bridge driver DTS and resets - Fix ROM shadow problem that made some video device initialization fail * tag 'pci-v4.9-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: VMD: Update filename to reflect move arm64: dts: rockchip: add three new resets for rk3399 PCIe controller PCI: rockchip: Add three new resets as required properties PCI: Don't attempt to claim shadow copies of ROM
2016-11-10PCI: rockchip: Add three new resets as required propertiesShawn Lin
pm_rst, aclk_rst, pclk_rst was controlled by ROM code so the software wasn't needed to control it again in theory. But it didn't work properly, so we do need to do it again and add enough delay between the assert of pm_rst and the deassert of pm_rst. The Soc intergrated with this controller, rk3399, is still under MP test internally, so the backward compatibility won't be a big deal. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <robh@kernel.org>
2016-11-08PCI: Don't attempt to claim shadow copies of ROMBjorn Helgaas
If we're using a shadow copy of a PCI device ROM, the shadow copy is in RAM and the device never sees accesses to it and doesn't respond to it. We don't have to route the shadow range to the PCI device, and the device doesn't have to claim the range. Previously we treated the shadow copy as though it were the ROM BAR, and we failed to claim it because the region wasn't routed to the device: pci 0000:01:00.0: Video device with shadowed ROM at [mem 0x000c0000-0x000dffff] pci_bus 0000:01: Allocating resources pci 0000:01:00.0: can't claim BAR 6 [mem 0x000c0000-0x000dffff]: no compatible bridge window The failure path of pcibios_allocate_dev_rom_resource() cleared out the resource start address, which also caused the following ioremap() warning: WARNING: CPU: 0 PID: 116 at /build/linux-akdJXO/linux-4.8.0/arch/x86/mm/ioremap.c:121 __ioremap_caller+0x1ec/0x370 ioremap on RAM at 0x0000000000000000 - 0x000000000001ffff Handle an option ROM shadow copy as RAM, without trying to insert it into the iomem resource tree. This fixes a regression caused by 0c0e0736acad ("PCI: Set ROM shadow location in arch code, not in PCI core"), which appeared in v4.6. The regression causes video device initialization to fail. This was reported on AMD Turks, but it likely affects others as well. Fixes: 0c0e0736acad ("PCI: Set ROM shadow location in arch code, not in PCI core") Reported-and-tested-by: Vecu Bosseur <vecu.bosseur@gmail.com> Link: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1627496 Link: https://bugzilla.kernel.org/show_bug.cgi?id=175391 Link: https://bugzilla.redhat.com/show_bug.cgi?id=1352272 Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v4.6+
2016-11-07x86/platform/intel-mid: Retrofit pci_platform_pm_ops ->get_state hookLukas Wunner
Commit cc7cc02bada8 ("PCI: Query platform firmware for device power state") augmented struct pci_platform_pm_ops with a ->get_state hook and implemented it for acpi_pci_platform_pm, the only pci_platform_pm_ops existing till v4.7. However v4.8 introduced another pci_platform_pm_ops for Intel Mobile Internet Devices with commit 5823d0893ec2 ("x86/platform/intel-mid: Add Power Management Unit driver"). It is missing the ->get_state hook, which is fatal since pci_set_platform_pm() enforces its presence. Andy Shevchenko reports that without the present commit, such a device "crashes without even a character printed out on serial console and reboots (since watchdog)". Retrofit mid_pci_platform_pm with the missing callback to fix the breakage. Acked-and-tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Fixes: cc7cc02bada8 ("PCI: Query platform firmware for device power state") Signed-off-by: Lukas Wunner <lukas@wunner.de> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Cc: linux-pci@vger.kernel.org Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: http://lkml.kernel.org/r/7c1567d4c49303a4aada94ba16275cbf56b8976b.1477221514.git.lukas@wunner.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2016-11-05Merge tag 'pci-v4.9-fixes-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fixes from Bjorn Helgaas: - fix for a Qualcomm driver issue that causes a use-before-set crash - fix for DesignWare iATU unroll support that causes external aborts when enabling the host bridge * tag 'pci-v4.9-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: designware: Check for iATU unroll support after initializing host PCI: qcom: Fix pp->dev usage before assignment
2016-11-04PCI: designware: Check for iATU unroll support after initializing hostNiklas Cassel
dw_pcie_iatu_unroll_enabled() reads a dbi_base register. Reading any dbi_base register before pp->ops->host_init has been called causes "imprecise external abort" on platforms like ARTPEC-6, where the PCIe module is disabled at boot and first enabled in pp->ops->host_init. Move dw_pcie_iatu_unroll_enabled() to dw_pcie_setup_rc(), since it is after pp->ops->host_init, but before pp->iatu_unroll_enabled is actually used. Fixes: a0601a470537 ("PCI: designware: Add iATU Unroll feature") Tested-by: James Le Cuirot <chewi@gentoo.org> Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Acked-by: Olof Johansson <olof@lixom.net>
2016-10-26PCI: qcom: Fix pp->dev usage before assignmentSrinivas Kandagatla
Initialize pp->dev in qcom_pcie_probe() before calling get_resources(), which uses it. [bhelgaas: changelog] Fixes: e6a087eeaf91 ("PCI: qcom: Remove redundant struct qcom_pcie.dev") Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-26doc: Add missing parameter for msi_setupStephen Hemminger
commit 92ca8d20dee2 ("genirq/msi: Switch to new irq spreading") introduced new parameter to msi_init_setup and but did not update docbook comments. Fixes 'make htmldocs' warning. Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com> Cc: bhelgaas@google.com Cc: linux-pci@vger.kernel.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2016-10-21PCI: designware-plat: Update author email addressJoao Pinto
Although I am leaving Synopsys, I would like to keep working with the linux kernel community and help in what you might find useful. For that I am sending this patch to change my contact e-mail. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-17PCI: layerscape: Fix drvdata usage before assignmentMarc Zyngier
Commit fefe6733e516 ("PCI: layerscape: Move struct pcie_port setup to probe function") changed the init ordering of the pcie structure, but started to use the pcie->drvdata field before initializing it. Mayhem follows. Fix this by moving the drvdata assignment right before the first use. Tested on LS2085a. Fixes: efe6733e516 ("PCI: layerscape: Move struct pcie_port setup to probe function") Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-13Merge tag 'pci-v4.9-changes-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci PCI changes for the v4.9 merge window: "Here are some more changes I'd like to have in v4.9. There's one small Tegra bug fix in the PHY poweroff path, which is only used in failure paths. The rest is all strictly cleanup that should make host bridge drivers more readable, but shouldn't actually change any behavior. Summary: - use local struct device pointers in many host bridge drivers for clarity - remove unused platform data - use generic DesignWare accessors - misc cleanups: remove redundant structure entries and re-order structure members to put comon generic fields first etc" * tag 'pci-v4.9-changes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (108 commits) MAINTAINERS: Add maintainer for the PCIe Marvell Armada 8K driver MAINTAINERS: Add DT binding to the Aardvark PCIe driver maintainer PCI: rockchip: Indent "if" statement body PCI: hisi: Reorder struct hisi_pcie PCI: hisi: Pass device-specific struct to internal functions PCI: hisi: Include register block base in PCIE_SYS_STATE4 address PCI: dra7xx: Reorder struct dra7xx_pcie PCI: xilinx-nwl: Remove unused platform data PCI: xilinx-nwl: Add local struct device pointers PCI: xilinx: Removed unused xilinx_pcie_assign_msi() argument PCI: xilinx: Remove unused platform data PCI: xilinx: Add local struct device pointers PCI: xgene: Add register accessors PCI: xgene: Pass struct xgene_pcie_port to setup functions PCI: xgene: Remove unused platform data PCI: tegra: Remove unused platform data PCI: tegra: Add local struct device pointers PCI: tegra: Fix argument order in tegra_pcie_phy_disable() PCI: rockchip: Remove unused platform data PCI: rcar-gen2: Add local struct device pointers ...
2016-10-12Merge branches 'pci/host-armada', 'pci/host-artpec', 'pci/host-dra7xx', ↵Bjorn Helgaas
'pci/host-exynos', 'pci/host-hisi', 'pci/host-imx6', 'pci/host-keystone', 'pci/host-layerscape', 'pci/host-qcom' and 'pci/host-spear' into next * pci/host-armada: MAINTAINERS: Add maintainer for the PCIe Marvell Armada 8K driver PCI: armada: Reorder struct armada8k_pcie PCI: armada: Pass device-specific struct to internal functions PCI: armada: Use generic DesignWare accessors PCI: armada: Remove redundant struct armada8k_pcie.base PCI: armada: Add local base pointer PCI: armada: Remove unused platform data * pci/host-artpec: PCI: artpec6: Add resource name comments PCI: artpec6: Pass device-specific struct to internal functions PCI: artpec6: Remove unnecessary artpec6_pcie_link_up() PCI: artpec6: Use generic DesignWare accessors PCI: artpec6: Add register accessors PCI: artpec6: Remove unused platform data PCI: artpec6: Add local struct device pointers * pci/host-dra7xx: PCI: dra7xx: Reorder struct dra7xx_pcie PCI: dra7xx: Move struct pcie_port setup to probe function PCI: dra7xx: Pass device-specific struct to internal functions PCI: dra7xx: Use generic DesignWare accessors PCI: dra7xx: Set drvdata at end of probe function PCI: dra7xx: Remove redundant struct device pointer from dra7xx_pcie PCI: dra7xx: Add local struct device pointers * pci/host-exynos: PCI: exynos: Reorder struct exynos_pcie PCI: exynos: Pass device-specific struct to internal functions PCI: exynos: Name private struct pointer "exynos_pcie" consistently PCI: exynos: Uninline register accessors PCI: exynos: Add local struct device pointers * pci/host-hisi: PCI: hisi: Reorder struct hisi_pcie PCI: hisi: Pass device-specific struct to internal functions PCI: hisi: Include register block base in PCIE_SYS_STATE4 address PCI: hisi: Use generic DesignWare accessors PCI: hisi: Remove redundant struct hisi_pcie.reg_base PCI: hisi: Name private struct pointer "hisi_pcie" consistently PCI: hisi: Remove unused platform data PCI: hisi: Add local struct device pointers * pci/host-imx6: PCI: imx6: Remove unused return values PCI: imx6: Reorder struct imx6_pcie PCI: imx6: Use generic DesignWare accessors PCI: imx6: Pass device-specific struct to internal functions PCI: imx6: Pass struct imx6_pcie to PHY accessors PCI: imx6: Removed unused struct imx6_pcie.mem_base PCI: imx6: Remove redundant of_node pointer PCI: imx6: Add local struct device pointers * pci/host-keystone: PCI: keystone: Reorder struct keystone_pcie PCI: keystone: Add app register accessors PCI: keystone: Pass keystone_pcie, not va_app_base, to DBI functions PCI: keystone: Pass keystone_pcie, not address, to IRQ functions PCI: keystone: Use generic DesignWare accessors PCI: keystone: Add local struct device pointers * pci/host-layerscape: PCI: layerscape: Reorder struct ls_pcie PCI: layerscape: Remove unused ls_add_pcie_port() platform_device arg PCI: layerscape: Move struct pcie_port setup to probe function PCI: layerscape: Pass device-specific struct to internal functions PCI: layerscape: Remove redundant struct ls_pcie.dbi PCI: layerscape: Remove unused platform data PCI: layerscape: Add local struct device pointers * pci/host-qcom: PCI: qcom: Reorder struct qcom_pcie PCI: qcom: Remove redundant struct qcom_pcie.dev PCI: qcom: Remove redundant struct qcom_pcie.dbi PCI: qcom: Remove unused platform data * pci/host-spear: PCI: spear: Clean up struct device usage PCI: spear: Reorder struct spear13xx_pcie PCI: spear: Pass device-specific struct to internal functions PCI: spear: Remove unused constants
2016-10-12Merge branch 'pci/host-designware' into nextBjorn Helgaas
* pci/host-designware: PCI: designware-plat: Remove unused platform data PCI: designware-plat: Add local struct device pointers PCI: designware-plat: Remove redundant dw_plat_pcie.mem_base PCI: designware: Swap order of dw_pcie_writel_unroll() reg/val arguments PCI: designware: Uninline register accessors PCI: designware: Export dw_pcie_readl_rc(), dw_pcie_writel_rc() PCI: designware: Swap order of dw_pcie_writel_rc() reg/val arguments PCI: designware: Simplify pcie_host_ops.readl_rc() and .writel_rc() interfaces PCI: designware: Simplify dw_pcie_readl_unroll(), dw_pcie_writel_unroll() PCI: designware: Rename dw_pcie_valid_config() to dw_pcie_valid_device()
2016-10-12Merge branches 'pci/host-aardvark', 'pci/host-altera', 'pci/host-iproc', ↵Bjorn Helgaas
'pci/host-mvebu', 'pci/host-rcar', 'pci/host-rockchip', 'pci/host-tegra', 'pci/host-xgene' and 'pci/host-xilinx' into next * pci/host-aardvark: MAINTAINERS: Add DT binding to the Aardvark PCIe driver maintainer PCI: aardvark: Remove unused platform data PCI: aardvark: Add local struct device pointers * pci/host-altera: PCI: altera: Simplify TLP_CFG_DW1 usage PCI: altera: Simplify TLB_CFG_DW0 usage PCI: altera: Rename altera_pcie_valid_config() to altera_pcie_valid_device() PCI: altera: Remove redundant platform_get_resource() return value check PCI: altera: Remove unused platform data PCI: altera: Add local struct device pointers * pci/host-iproc: PCI: iproc: Hard-code PCIe capability offset instead of searching PCI: iproc: Remove redundant null pointer checking PCI: iproc: Validate CSR base in BCMA setup code PCI: iproc: Set drvdata at end of probe function PCI: iproc: Add local struct device pointers * pci/host-mvebu: PCI: mvebu: Use existing of_node pointer PCI: mvebu: Add local struct device pointers * pci/host-rcar: PCI: rcar-gen2: Add local struct device pointers PCI: rcar: Remove DRV_NAME macro PCI: rcar: Remove unused rcar_pcie_get_resources() platform_device arg PCI: rcar: Remove unused platform data PCI: rcar: Add local struct device pointers * pci/host-rockchip: PCI: rockchip: Indent "if" statement body PCI: rockchip: Remove unused platform data * pci/host-tegra: PCI: tegra: Remove unused platform data PCI: tegra: Add local struct device pointers PCI: tegra: Fix argument order in tegra_pcie_phy_disable() * pci/host-xgene: PCI: xgene: Add register accessors PCI: xgene: Pass struct xgene_pcie_port to setup functions PCI: xgene: Remove unused platform data PCI: xgene: Add local struct device pointers * pci/host-xilinx: PCI: xilinx-nwl: Remove unused platform data PCI: xilinx-nwl: Add local struct device pointers PCI: xilinx: Removed unused xilinx_pcie_assign_msi() argument PCI: xilinx: Remove unused platform data PCI: xilinx: Add local struct device pointers
2016-10-12PCI: rockchip: Indent "if" statement bodyDan Carpenter
Body of an "if" statement wasn't indented. Add a tab. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-12PCI: hisi: Reorder struct hisi_pcieBjorn Helgaas
Reorder struct hisi_pcie to put generic fields first. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-12PCI: hisi: Pass device-specific struct to internal functionsBjorn Helgaas
Only interfaces used from outside the driver, e.g., those called by the DesignWare core, need to accept pointers to the generic struct pcie_port. Internal interfaces can accept pointers to the device-specific struct, which makes them more straightforward. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-12PCI: hisi: Include register block base in PCIE_SYS_STATE4 addressBjorn Helgaas
Include the PCIE_HIP06_CTRL_OFF block base in the PCIE_SYS_STATE4 register address so reads of PCIE_SYS_STATE4 don't have to mention both. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-12PCI: dra7xx: Reorder struct dra7xx_pcieBjorn Helgaas
Reorder struct dra7xx_pcie to put generic fields first. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-12PCI: xilinx-nwl: Remove unused platform dataBjorn Helgaas
The xilinx-nwl driver never uses the platform drvdata pointer, so don't bother setting it. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-12PCI: xilinx-nwl: Add local struct device pointersBjorn Helgaas
Use a local "struct device *dev" for brevity and consistency with other drivers. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-12PCI: xilinx: Removed unused xilinx_pcie_assign_msi() argumentBjorn Helgaas
xilinx_pcie_assign_msi() doesn't use the struct xilinx_pcie_port pointer passed to it, so remove the argument completely. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-11PCI: xilinx: Remove unused platform dataBjorn Helgaas
The xilinx driver never uses the platform drvdata pointer, so don't bother setting it. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-11PCI: xilinx: Add local struct device pointersBjorn Helgaas
Use a local "struct device *dev" for brevity and consistency with other drivers. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-11PCI: xgene: Add register accessorsBjorn Helgaas
Add device-specific register accessors for consistency across host drivers. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-11PCI: xgene: Pass struct xgene_pcie_port to setup functionsBjorn Helgaas
Pass the struct xgene_pcie_port pointer, not addresses, to setup functions. This enables future simplifications. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-11PCI: xgene: Remove unused platform dataBjorn Helgaas
The xgene driver never uses the platform drvdata pointer, so don't bother setting it. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-11PCI: tegra: Remove unused platform dataBjorn Helgaas
The tegra driver never uses the platform drvdata pointer, so don't bother setting it. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-11PCI: tegra: Add local struct device pointersBjorn Helgaas
Use a local "struct device *dev" for brevity and consistency with other drivers. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-10-11PCI: tegra: Fix argument order in tegra_pcie_phy_disable()Bjorn Helgaas
The tegra_pcie_phy_disable() path called pads_writel() with arguments in the wrong order. Swap them to be the "value, offset" order expected by pads_writel(). Fixes: 6fe7c187e026 ("PCI: tegra: Support per-lane PHYs") Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Thierry Reding <treding@nvidia.com> CC: stable@vger.kernel.org # v4.7+
2016-10-11PCI: rockchip: Remove unused platform dataBjorn Helgaas
The rockchip driver never uses the platform drvdata pointer, so don't bother setting it. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Shawn Lin <shawn.lin@rock-chips.com>
2016-10-11PCI: rcar-gen2: Add local struct device pointersBjorn Helgaas
Use a local "struct device *dev" for brevity and consistency with other drivers. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
2016-10-11PCI: rcar: Remove DRV_NAME macroBjorn Helgaas
The DRV_NAME macro is only used once, so there's no real advantage to having the macro at all. Remove it and use the "rcar-pcie" name directly in the struct platform_driver. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
2016-10-11PCI: rcar: Remove unused rcar_pcie_get_resources() platform_device argBjorn Helgaas
rcar_pcie_get_resources() doesn't use the platform_device pointer passed to it, so remove it. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
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