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path: root/drivers/pinctrl/intel
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2017-08-22pinctrl: intel: Add Intel Lewisburg GPIO supportMika Westerberg
2017-08-22pinctrl: intel: Add Intel Cannon Lake PCH-H pin controller supportMika Westerberg
2017-08-22pinctrl: intel: Disable GPIO pin interrupts in suspendRushikesh S Kadam
2017-08-14pinctrl: intel: Add Intel Denverton pin controller supportMika Westerberg
2017-08-14pinctrl: intel: wrap Intel pin control drivers in an architecture checkPeter Robinson
2017-08-14pinctrl: baytrail: Do not call WARN_ON for a firmware bugHans de Goede
2017-08-07pinctrl: intel: merrifield: Correct UART pin listsAndy Shevchenko
2017-08-03pinctrl: cherryview: Add Setzer models to the Chromebook DMI quirkAndy Shevchenko
2017-06-29Merge tag 'v4.12-rc7' into develLinus Walleij
2017-06-09pinctrl: intel: Add Intel Cannon Lake PCH pin controller supportMika Westerberg
2017-06-09pinctrl: intel: Make it possible to specify mode per pin in a groupMika Westerberg
2017-06-09pinctrl: intel: Add support for variable size pad groupsMika Westerberg
2017-05-23pinctrl: cherryview: Extend the Chromebook DMI quirk to Intel_Strago systemsMika Westerberg
2017-05-22pinctrl: cherryview: Add terminate entry for dmi_system_id tablesWei Yongjun
2017-05-02Merge tag 'pinctrl-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/...Linus Torvalds
2017-04-11pinctrl: cherryview: Add a quirk to make Acer Chromebook keyboard work againMika Westerberg
2017-03-23pinctrl: cherryview: Add support for GMMR GPIO opregionHans de Goede
2017-02-21Merge tag 'pinctrl-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/...Linus Torvalds
2017-02-13pinctrl: intel: unlock on error in intel_config_set_pull()Dan Carpenter
2017-01-30pinctrl: baytrail: Add missing spinlock usage in byt_gpio_irq_handlerAlexander Stein
2017-01-30pinctrl: baytrail: Debounce register is one per communityAndy Shevchenko
2017-01-30pinctrl: baytrail: Rectify debounce support (part 2)Andy Shevchenko
2017-01-30pinctrl: intel: Add Intel Gemini Lake pin controller supportMika Westerberg
2017-01-30pinctrl: intel: Add support for 1k additional pull-downMika Westerberg
2017-01-30pinctrl: intel: Add support for hardware debouncerMika Westerberg
2017-01-30pinctrl: broxton: No need to take pointer of a pointerAndy Shevchenko
2017-01-30Merge tag 'v4.10-rc6' into develLinus Walleij
2017-01-30pinctrl: intel: merrifield: Add missed check in mrfld_config_set()Andy Shevchenko
2017-01-26pinctrl: baytrail: Fix debugfs offset outputAlexander Stein
2017-01-26pinctrl: broxton: Rename apl-pinctrl driverAndy Shevchenko
2017-01-26Merge branch 'ib-pinctrl-genprops' into develLinus Walleij
2017-01-26pinctrl: Widen the generic pinconf argument from 16 to 24 bitsMika Westerberg
2017-01-12pinctrl: baytrail: Do not add all GPIOs to IRQ domainAndy Shevchenko
2017-01-11pinctrl: baytrail: Convert to use devm_*()Andy Shevchenko
2017-01-11pinctrl: baytrail: Rectify debounce supportAndy Shevchenko
2017-01-11pinctrl: intel: Convert to use devm_gpiochip_add_data()Mika Westerberg
2017-01-11pinctrl: intel: Set pin direction properlyAndy Shevchenko
2017-01-11pinctrl: broxton: Use correct PADCFGLOCK offsetMika Westerberg
2016-12-13Merge tag 'pinctrl-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/...Linus Torvalds
2016-12-07pinctrl: intel: set default handler to be handle_bad_irq()Andy Shevchenko
2016-11-04pinctrl: cherryview: Prevent possible interrupt storm on resumeMika Westerberg
2016-11-04pinctrl: cherryview: Serialize register access in suspend/resumeMika Westerberg
2016-11-04pinctrl: cherryview: Drop ctrlX prefix from the pin debugfs outputMika Westerberg
2016-10-29pinctrl: intel: merrifield: Add pin config group handlersAndy Shevchenko
2016-10-18pinctrl: intel: Only restore pins that are used by the driverMika Westerberg
2016-10-18pinctrl: baytrail: Fix lockdepVille Syrjälä
2016-09-23Merge branch 'fixes' into develLinus Walleij
2016-09-23pinctrl: intel: Configure GPIO chip IRQ as wakeup interruptsNilesh Bacchewar
2016-09-23pinctrl: cherryview: Convert to use devm_gpiochip_add_data()Mika Westerberg
2016-09-23pinctrl: cherryview: Do not add all southwest and north GPIOs to IRQ domainMika Westerberg
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