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path: root/drivers/pinctrl/qcom/Makefile
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2023-03-19pinctrl: qcom: Add IPQ9574 pinctrl driverDevi Priya
Add pinctrl definitions for the TLMM of IPQ9574 Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Link: https://lore.kernel.org/r/20230316072940.29137-5-quic_devipriy@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19pinctrl: qcom: Add SM7150 pinctrl driverDanila Tikhonov
Add pinctrl driver for TLMM block found in SM7150 SoC. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Link: https://lore.kernel.org/r/20230311212114.108870-3-danila@jiaxyga.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-07pinctrl: qcom: Introduce IPQ5332 TLMM driverKathiravan T
The IPQ5332 SoC comes with a TLMM block, like all other Qualcomm platforms, so add a driver for it. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230206071217.29313-3-quic_kathirav@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-06pinctrl: qcom: pinctrl-sm8550-lpass-lpi: add SM8550 LPASSKrzysztof Kozlowski
Add druver for pin controller in Low Power Audio SubSystem (LPASS). The driver is similar to SM8450 LPASS pin controller, with differences in few pin groups (qua_mi2s -> i2s0). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230203174645.597053-2-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-01pinctrl: qcom: add the tlmm driver sa8775p platformsYadu MG
Add support for Lemans TLMM configuration and control via the pinctrl framework. Signed-off-by: Yadu MG <quic_ymg@quicinc.com> Signed-off-by: Prasad Sodagudi <quic_psodagud@quicinc.com> [Bartosz: made the driver ready for upstream] Co-developed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230201150011.200613-3-brgl@bgdev.pl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-09pinctrl: qcom: Add SM8550 pinctrl driverAbel Vesa
Add pinctrl driver for TLMM block found in SM8550 SoC. Co-developed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20221230203637.2539900-3-abel.vesa@linaro.org Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-12-29pinctrl: qcom: Add QDU1000/QRU1000 pinctrl driverMelody Olvera
Add pin control driver for the TLMM block found in the QDU1000 and QRU1000 SoC. Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20221216230852.21691-3-quic_molvera@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-17pinctrl: qcom: add sdm670 pinctrlRichard Acayan
The Snapdragon 670 has a Top-Level Mode Multiplexer (TLMM) for various features. Add a driver to support it. Link: https://android.googlesource.com/kernel/msm/+/de5a12173c7fa6d65bedee9ad36af55b2dbfeb36%5E%21/#F6 Link: https://android.googlesource.com/kernel/msm/+/04f083156d9b9f3bfcf204c1c6da88632fbb3863%5E%21/#F22 Link: https://android.googlesource.com/kernel/msm/+/54837652e3400ecc63ccc78b2193faf4f349a32e%5E%21/#F0 Link: https://android.googlesource.com/kernel/msm/+/f0409b07174ceca217f8b7fd255418feff06092d%5E%21/#F0 Signed-off-by: Richard Acayan <mailingradian@gmail.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221014001934.4995-4-mailingradian@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-08-25pinctrl: qcom: Add sc8280xp lpass lpi pinctrl driverSrinivas Kandagatla
Add pinctrl driver to support pin configuration for LPASS (Low Power Audio SubSystem) LPI (Low Power Island) pinctrl on SC8280XP. This IP is an additional pin control block for Audio Pins on top the existing SoC Top level pin-controller. Hardware setup looks like: TLMM GPIO[189 - 207] --> LPASS LPI GPIO [0 - 18] This pin controller has some similarities compared to Top level msm SoC Pin controller like 'each pin belongs to a single group' and so on. However this one is intended to control only audio pins in particular, which can not be configured/touched by the Top level SoC pin controller except setting them as gpios. Apart from this, slew rate is also available in this block for certain pins which are connected to SLIMbus or SoundWire Bus. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220817113747.9111-3-srinivas.kandagatla@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-08-25pinctrl: qcom: Add sm8450 lpass lpi pinctrl driverSrinivas Kandagatla
Add pinctrl driver to support pin configuration for LPASS (Low Power Audio SubSystem) LPI (Low Power Island) pinctrl on SM8450. This IP is an additional pin control block for Audio Pins on top the existing SoC Top level pin-controller. Hardware setup looks like: TLMM GPIO[165 - 187] --> LPASS LPI GPIO [0 - 22] This pin controller has some similarities compared to Top level msm SoC Pin controller like 'each pin belongs to a single group' and so on. However this one is intended to control only audio pins in particular, which can not be configured/touched by the Top level SoC pin controller except setting them as gpios. Apart from this, slew rate is also available in this block for certain pins which are connected to SLIMbus or SoundWire Bus. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220817113833.9625-3-srinivas.kandagatla@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-07-26pinctrl: qcom: Add SM6375 TLMM driverKonrad Dybcio
Add a driver to control the TLMM block on SM6375. This is an adapted version of msm-5.4's pinctrl-blair driver. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20220716192900.454653-2-konrad.dybcio@somainline.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-07-11pinctrl: qcom: Add pinctrl driver for MSM8909Stephan Gerhold
Make it possible to control pins using the TLMM block in the MSM8909 SoC by adding the necessary definitions for GPIOs, groups and functions. The driver is originally taken from the msm-4.9 release [1] from Qualcomm, but cleaned up significantly with several fixes and clarifications. [1]: https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LF.UM.8.7-22500-8x09.0/drivers/pinctrl/qcom/pinctrl-msm8909.c Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220628145502.4158234-3-stephan.gerhold@kernkonzept.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-04-23pinctrl: qcom: Add SC7280 lpass pin configurationSrinivasa Rao Mandadapu
Add pin control support for SC7280 LPASS LPI. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/1650285427-19752-7-git-send-email-quic_srivasam@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-04-23pinctrl: qcom: Extract chip specific LPASS LPI codeSrinivasa Rao Mandadapu
Extract the chip specific SM8250 data from the LPASS LPI pinctrl driver to allow reusing the common code in the addition of subsequent platforms. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/1650285427-19752-6-git-send-email-quic_srivasam@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15pinctrl: qcom: Introduce sc8280xp TLMM driverBjorn Andersson
The SC8280XP comes, like all other Qualcomm platforms, with a TLMM block, so add a driver for it. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220308221132.1423218-2-bjorn.andersson@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-09pinctrl: qcom: Add SM8450 pinctrl driverVinod Koul
This adds pincontrol driver for tlmm block found in SM8450 SoC This patch is based on initial code downstream by Elliot Berman <eberman@codeaurora.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211201072434.3968768-3-vkoul@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-11-21pinctrl: qcom: Add SDX65 pincontrol driverVamsi Krishna Lanka
Add initial Qualcomm SDX65 pinctrl driver to support pin configuration with pinctrl framework for SDX65 SoC. Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/13acb3cb36349487dee9745ab040d8f1344d2096.1637048107.git.quic_vamslank@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-23pinctrl: qcom: Add QCM2290 pinctrl driverShawn Guo
It's a porting of pinctrl-scuba driver from CAF msm-4.19 kernel. The egpio and wake bits are removed. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923033224.29719-3-shawn.guo@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-09-23pinctrl: qcom: Add SM6350 pinctrl driverKonrad Dybcio
This adds pincontrol driver for tlmm block found in SM6350 SoC This patch is based on downstream copyleft code. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923161450.15278-2-konrad.dybcio@somainline.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-31drivers: qcom: pinctrl: Add pinctrl driver for sm6115Iskren Chernev
Based on CAF implementation with egpio/wake_reg support removed. Similar function names were merged to reduce total number of functions. Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210723192352.546902-3-iskren.chernev@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-23pinctrl: qcom: Add MDM9607 pinctrl driverKonrad Dybcio
Add a pinctrl driver to allow for managing SoC pins. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210624191743.617073-2-konrad.dybcio@somainline.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-18drivers: qcom: pinctrl: Add pinctrl driver for sm6125Martin Botka
This patch adds pinctrl driver for sm6125. Signed-off-by: Martin Botka <martin.botka@somainline.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210614172713.558192-2-martin.botka@somainline.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-02-12pinctrl: qcom: Add sc8180x TLMM driverBjorn Andersson
Add pinctrl driver for the sc8180x TLMM block. A noteworthy difference from previous TLMM blocks is that the registers for GPIO 177 through 189 are for some reason offset from the typical layout. Other than that the driver is same old... Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210126042650.1725176-3-bjorn.andersson@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-02-12pinctrl: qcom: Add SM8350 pinctrl driverVinod Koul
This adds pincontrol driver for tlmm block found in SM8350 SoC This patch is based on initial code downstream by Raghavendra. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210205140132.274242-3-vkoul@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-12-05pinctrl: qcom: Add sm8250 lpass lpi pinctrl driverSrinivas Kandagatla
Add initial pinctrl driver to support pin configuration for LPASS (Low Power Audio SubSystem) LPI (Low Power Island) pinctrl on SM8250. This IP is an additional pin control block for Audio Pins on top the existing SoC Top level pin-controller. Hardware setup looks like: TLMM GPIO[146 - 159] --> LPASS LPI GPIO [0 - 13] This pin controller has some similarities compared to Top level msm SoC Pin controller like 'each pin belongs to a single group' and so on. However this one is intended to control only audio pins in particular, which can not be configured/touched by the Top level SoC pin controller except setting them as gpios. Apart from this, slew rate is also available in this block for certain pins which are connected to SLIMbus or SoundWire Bus. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20201202163443.26499-3-srinivas.kandagatla@linaro.org [Add some dependencies] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-24pinctrl: qcom: Add sc7280 pinctrl driverRajendra Nayak
Add initial pinctrl driver to support pin configuration with pinctrl framework for SC7280 SoC Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1604570192-15057-2-git-send-email-rnayak@codeaurora.org [Change select PINCTRL_MSM to depends on PINCTRL_MSM] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10pinctrl: qcom: Add SDX55 pincontrol driverJeevan Shriram
Add initial Qualcomm SDX55 pinctrl driver to support pin configuration with pinctrl framework for SDX55 SoC. [ported from downstream and tidy up] Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20201109062620.14566-3-vkoul@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10pinctrl: qcom: add pinctrl driver for msm8953Vladimir Lypak
Add inititial pinctrl driver for MSM8953 platform. Compatible SoCs are: MSM8953, APQ8053, SDM(SDA)450, SDM(SDA)632. Based off CAF implementation. Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org> Signed-off-by: Vladimir Lypak <junak.pub@gmail.com> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20201007160611.942754-1-junak.pub@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-08-27pinctrl: qcom: Add msm8226 pinctrl driver.Bartosz Dudziak
Add initial Qualcomm msm8226 pinctrl driver to support pin configuration with pinctrl framework for msm8226 SoC. - Initial formatting and style was taken from the msm8x74 pinctrl driver added by Björn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl> Link: https://lore.kernel.org/r/20200716205530.22910-3-bartosz.dudziak@snejp.pl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28pinctrl: qcom: Add sm8250 pinctrl driver.Venkata Narendra Kumar Gutta
Add initial Qualcomm SM8250 pinctrl driver to support pin configuration with pinctrl framework for SM8250 SoC. Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org> Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Link: https://lore.kernel.org/r/1586477057-7636-2-git-send-email-vnkgutta@codeaurora.org [bjorn: Regrouped functions, upstream tiles implementation, dropped downstream-only features] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200417061907.1226490-3-bjorn.andersson@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14pinctrl: qcom: Add ipq6018 pinctrl driverSricharan R
Add initial pinctrl driver to support pin configuration with pinctrl framework for ipq6018. Co-developed-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org> Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org> Co-developed-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org> Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org> Co-developed-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sricharan R <sricharan@codeaurora.org> Link: https://lore.kernel.org/r/1579439601-14810-3-git-send-email-sricharan@codeaurora.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-10-16pinctrl: qcom: Add a pinctrl driver for MSM8976 and 8956AngeloGioacchino Del Regno
Add the pinctrl driver to support pin configuration with the pinctrl framework on MSM8976, MSM8956, APQ8056, APQ8076. Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com> Link: https://lore.kernel.org/r/20191005105936.31216-2-kholk11@gmail.com Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-07pinctrl: qcom: Add SC7180 pinctrl driverJitendra Sharma
Add initial pinctrl driver to support pin configuration with pinctrl framework for SC7180 Signed-off-by: Jitendra Sharma <shajit@codeaurora.org> Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> [rnayak: modify to use upstream tile support sort and squash some functions] Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20190806060536.18094-2-rnayak@codeaurora.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-04pinctrl: qcom: Add SM8150 pinctrl driverPrasad Sodagudi
Add initial pinctrl driver to support pin configuration with pinctrl framework for SM8150 Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org> Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org> [vkoul: modify to use upstream tile support use upstream code style order the functions and squash functions] Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20190702105045.27646-4-vkoul@kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-26pinctrl: qcom: Add qcs404 pinctrl driverAvaneesh Kumar Dwivedi
Add initial pinctrl driver to support pin configuration with pinctrl framework for qcs404. Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org> Signed-off-by: Chintan Pandya <cpandya@codeaurora.org> Signed-off-by: Anu Ramanathan <anur@codeaurora.org> [bjorn: Reworked tile handling and did some minor rework] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-26pinctrl: qcom: Add sdm660 pinctrl driverNeeraj Upadhyay
Add initial pinctrl driver to support pin configuration with pinctrl framework for sdm660. Based off CAF implementation. Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org> Co-Developed-by: Venkatesh Yadav Abbarapu <vabbar@codeaurora.org> Signed-off-by: Venkatesh Yadav Abbarapu <vabbar@codeaurora.org> [craig: minor updates for upstreaming, updated tile handling] Signed-off-by: Craig Tatlor <ctatlor97@gmail.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-02-12pinctrl: qcom: Add sdm845 pinctrl driverKyle Yan
This adds the pinctrl definitions for the TLMM of SDM845. Signed-off-by: Kyle Yan <kyan@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-01-09pinctrl: qcom: Add msm8998 pinctrl driverKhan, Imran
Add initial pinctrl driver to support pin configuration with pinctrl framework for msm8998. Signed-off-by: Imran Khan <kimran@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> [bjorn: Consolidated function groups] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-29pinctrl: qcom: Add ipq8074 pinctrl driverVaradarajan Narayanan
Add initial pinctrl driver to support pin configuration with pinctrl framework for ipq8074. Signed-off-by: Manoharan Vijaya Raghavan <mraghava@codeaurora.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-11-04pinctrl: qcom: Add msm8994 pinctrl driverMichael Scott
Initial pinctrl driver for QCOM msm8994 platforms. In order to continue the initial board support for QCOM msm8994/msm8992 presented in patches from Jeremy McNicoll <jeremymc@redhat.com>, let's put a proper pinctrl driver in place. Currently, the DT for these platforms uses the msm8x74 pinctrl driver to enable basic UART. Beyond the first few pins the rest are different enough to justify it's own driver. Note: This driver is also used by QCOM's msm8992 platform as it's TLM block is the same. - Initial formatting and style was taken from the msm8x74 pinctrl driver added by Björn Andersson <bjorn.andersson@linaro.org> - Data was then adjusted per QCOM MSM8994v2 documentation for Top Level Multiplexing - Bindings documentation was based on qcom,msm8996-pinctrl.txt by Joonwoo Park <joonwoop@codeaurora.org> and then modified for msm8994 content Signed-off-by: Michael Scott <michael.scott@linaro.org> Tested-by: Jeremy McNicoll <jeremymc@redhat.com> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-29pinctrl: qcom: Add support for MDM9615 TLMMNeil Armstrong
In order to support the Qualcomm MDM9615 SoC, add support for the TLMM using the Qualcomm pinctrl generic driver. Note: the pinctrl is partial, need Documentation to complete all the groups. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-16pinctrl: qcom: ipq4019: Add IPQ4019 pinctrl supportVaradarajan Narayanan
Add pinctrl driver support for IPQ4019 platform Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> [Dropped .owner assignment] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: qcom: Add msm8996 pinctrl driverJoonwoo Park
Add initial pinctrl driver to support pin configuration with pinctrl framework for msm8996. Cc: <devicetree@vger.kernel.org> Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org> [sboyd@codeaurora.org: Remove duplicate entries and enums] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Björn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-17pinctrl: add support for Qualcomm Technologies QDF2xxx ARM64 SoCsTimur Tabi
Add the pinctrl driver for the Qualcomm Technologies QDF2xxx ARM64 SoCs, which uses the Qualcomm Technologies TLMM pinctrl/gpio device. This driver is probed via ACPI and uses the pinctrl-msm.c backend driver. This driver is intended to be used only an ACPI-enabled system. As such, UEFI will handle all pin control configuration, so this driver does not provide pin control functions. It is effectively a GPIO-only driver. Signed-off-by: Timur Tabi <timur@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-17pinctrl: qcom: ssbi: Family A gpio & mpp driversBjorn Andersson
This introduces pinctrl drivers for gpio and mpp blocks found in family A PMICs. Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10pinctrl: qcom: Add MSM8660 pinctrl definitionsBjorn Andersson
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-30pinctrl: qcom: Add msm8916 pinctrl driverJoonwoo Park
Add initial pinctrl driver to support pin configuration with pinctrl framework for msm8916. Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org> Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-29pinctrl: Qualcomm SPMI PMIC MPP pin controller driverIvan T. Ivanov
This is the pinctrl, pinmux, pinconf and gpiolib driver for the Qualcomm MPP sub-function blocks found in the PMIC chips. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-29pinctrl: Qualcomm SPMI PMIC GPIO pin controller driverIvan T. Ivanov
This is the pinctrl, pinmux, pinconf and gpiolib driver for the Qualcomm GPIO sub-function blocks found in the PMIC chips. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.2.3 (git 2.0.4) at 2026-02-25 21:11:18 +0000