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path: root/drivers/pinctrl/sirf/pinctrl-atlas7.c
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2016-06-29pinctrl: sirf: atlas7: Add missing of_node_putAmitoj Kaur Chawla
of_find_node_by_name does an of_node_get on its return value, so an of_node_put is needed on this value before the corresponding variable goes out of scope. The Coccinelle semantic patch used to make this change is as follows: @@ struct device_node *n; struct device_node *n1; statement S; identifier f; expression E; constant C; @@ n = of_find_node_by_name(...) ... if (!n) S ... when != of_node_put(n) when != n1 = f(n,...) when != E = n when any when strict ( + of_node_put(n); return -C; | of_node_put(n); | n1 = f(n,...) | E = n | return ...; ) Signed-off-by: Amitoj Kaur Chawla <amitoj1606@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-04-28pinctrl: sirf/atlas7: fix printk spellingColin Ian King
fix spelling mistake, flaged -> flagged Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2016-02-16pinctrl: sirf/atlas7: stop poking around in GPIO internalsLinus Walleij
This code is poking around in the gpio_chip:s internal structures to achieve some kind of pin to GPIO mappings. - It is wrong to poke around in these structs and the pinctrl maintainer was stupid to let it pass unnoticed, mea culpa. - The right interface to use is gpiochip_add_pin_range() - The code appears unused: the pin control part of the driver is not adding any ranges, so we're iterating over an empty list. Maybe it is poking around in some other pin controllers GPIO ranges, and that's just totally wrong, again use gpiochip_add_pin_range() and specify the right pin controller. Cc: Barry Song <baohua@kernel.org> Cc: Guoying Zhang <Guoying.Zhang@csr.com> Cc: Wei Chen <Wei.Chen@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-17Merge tag 'gpio-v4.5-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "Here is the bulk of GPIO changes for v4.5. Notably there are big refactorings mostly by myself, aimed at getting the gpio_chip into a shape that makes me believe I can proceed to preserve state for a proper userspace ABI (character device) that has already been proposed once, but resulted in the feedback that I need to go back and restructure stuff. So I've been restructuring stuff. On the way I ran into brokenness (return code from the get_value() callback) and had to fix it. Also, refactored generic GPIO to be simpler. Some of that is still waiting to trickle down from the subsystems all over the kernel that provide random gpio_chips, I've touched every single GPIO driver in the kernel now, oh man I didn't know I was responsible for so much... Apart from that we're churning along as usual. I took some effort to test and retest so it should merge nicely and we shook out a couple of bugs in -next. Infrastructural changes: - In struct gpio_chip, rename the .dev node to .parent to better reflect the fact that this is not the GPIO struct device abstraction. We will add that soon so this would be totallt confusing. - It was noted that the driver .get_value() callbacks was sometimes reporting negative -ERR values to the gpiolib core, expecting them to be propagated to consumer gpiod_get_value() and gpio_get_value() calls. This was not happening, so as there was a mess of drivers returning negative errors and some returning "anything else than zero" to indicate that a line was active. As some would have bit 31 set to indicate "line active" it clashed with negative error codes. This is fixed by the largeish series clamping values in all drivers with !!value to [0,1] and then augmenting the code to propagate error codes to consumers. (Includes some ACKed patches in other subsystems.) - Add a void *data pointer to struct gpio_chip. The container_of() design pattern is indeed very nice, but we want to reform the struct gpio_chip to be a non-volative, stateless business, and keep states internal to the gpiolib to be able to hold on to the state when adding a proper userspace ABI (character device) further down the road. To achieve this, drivers need a handle at the internal state that is not dependent on their struct gpio_chip() so we add gpiochip_add_data() and gpiochip_get_data() following the pattern of many other subsystems. All the "use gpiochip data pointer" patches transforms drivers to this scheme. - The Generic GPIO chip header has been merged into the general <linux/gpio/driver.h> header, and the custom header for that removed. Instead of having a separate mm_gpio_chip struct for these generic drivers, merge that into struct gpio_chip, simplifying the code and removing the need for separate and confusing includes. Misc improvements: - Stabilize the way GPIOs are looked up from the ACPI legacy specification. - Incremental driver features for PXA, PCA953X, Lantiq (patches from the OpenWRT community), RCAR, Zynq, PL061, 104-idi-48 New drivers: - Add a GPIO chip to the ALSA SoC AC97 driver. - Add a new Broadcom NSP SoC driver (this lands in the pinctrl dir, but the branch is merged here too to account for infrastructural changes). - The sx150x driver now supports the sx1502" * tag 'gpio-v4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (220 commits) gpio: generic: make bgpio_pdata always visible gpiolib: fix chip order in gpio list gpio: mpc8xxx: Do not use gpiochip_get_data() in mpc8xxx_gpio_save_regs() gpio: mm-lantiq: Do not use gpiochip_get_data() in ltq_mm_save_regs() gpio: brcmstb: Allow building driver for BMIPS_GENERIC gpio: brcmstb: Set endian flags for big-endian MIPS gpio: moxart: fix build regression gpio: xilinx: Do not use gpiochip_get_data() in xgpio_save_regs() leds: pca9532: use gpiochip data pointer leds: tca6507: use gpiochip data pointer hid: cp2112: use gpiochip data pointer bcma: gpio: use gpiochip data pointer avr32: gpio: use gpiochip data pointer video: fbdev: via: use gpiochip data pointer gpio: pch: Optimize pch_gpio_get() Revert "pinctrl: lantiq: Implement gpio_chip.to_irq" pinctrl: nsp-gpio: use gpiochip data pointer pinctrl: vt8500-wmt: use gpiochip data pointer pinctrl: exynos5440: use gpiochip data pointer pinctrl: at91-pio4: use gpiochip data pointer ...
2016-01-05pinctrl: sirf-atlas7: use gpiochip data pointerLinus Walleij
This makes the driver use the data pointer added to the gpio_chip to store a pointer to the state container instead of relying on container_of(). Cc: Barry Song <baohua@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10pinctrl: atlas7: add pulse conter pin group without direction pinGuoying Zhang
DR needs use the pulse counter direction pin as common gpio function. Signed-off-by: Guoying Zhang <Guoying.Zhang@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10pinctrl: atlas7: adjust vip pin groups for atlas7Wei Chen
The vip low 8bit mode and vip high 8 bit mode pin groups had missed 3 pins:vip_vsync, vip_hsync and vip_pxclk. Without these 3 pins, the vip could not work properly. Now we add these 3 pins into these two pin groups. Signed-off-by: Wei Chen <Wei.Chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10pinctrl: atlas7: adjust pin groups of atlas7 nanddiskWei Chen
Remove write-protect and chip-selector pins from nand pin group. And then create two separate pin groups for these two pin. So the nand driver can choose correct pin groups as board desgin: For example: 1. nand without wp&cs: nand@17050000 { pinctrl-0 = <&nd_df_basic_pmx>; }; 2. nand with wp nand@17050000 { pinctrl-0 = <&nd_df_basic_pmx &nd_df_wp_pmx>; }; 3. nand with cs: nand@17050000 { pinctrl-0 = <&nd_df_basic_pmx &nd_df_cs_pmx>; }; 4. nand with wp&cs: nand@17050000 { pinctrl-0 = <&nd_df_basic_pmx &nd_df_wp_pmx &nd_df_cs_pmx>; }; Signed-off-by: Wei Chen <Wei.Chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10pinctrl: altas7: add sd9 function mux supportYonghui Zhang
The sd9 pin mux with sd3 and it is selected by SYS2PCI_SDIO9SEL. This makes the codes ugly since the register is not in pinctrl module. Signed-off-by: Yonghui Zhang <yonghui.zhang@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10pinctrl: atlas7: add cs line for atlas7 nandWei Chen
The nand in atlas7 has two chip select line. But in most time, the nand only has one chip, so only one chip select line is enough. The nand driver select this new pin group can free one chip select line for other modules to avoid pin conflict. Signed-off-by: Wei Chen <Wei.Chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-19gpio: change member .dev to .parentLinus Walleij
The name .dev in a struct is normally reserved for a struct device that is let us say a superclass to the thing described by the struct. struct gpio_chip stands out by confusingly using a struct device *dev to point to the parent device (such as a platform_device) that represents the hardware. As we want to give gpio_chip:s real devices, this is not working. We need to rename this member to parent. This was done by two coccinelle scripts, I guess it is possible to combine them into one, but I don't know such stuff. They look like this: @@ struct gpio_chip *var; @@ -var->dev +var->parent and: @@ struct gpio_chip var; @@ -var.dev +var.parent and: @@ struct bgpio_chip *var; @@ -var->gc.dev +var->gc.parent Plus a few instances of bgpio that I couldn't figure out how to teach Coccinelle to rewrite. This patch hits all over the place, but I *strongly* prefer this solution to any piecemal approaches that just exercise patch mechanics all over the place. It mainly hits drivers/gpio and drivers/pinctrl which is my own backyard anyway. Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: Richard Purdie <rpurdie@rpsys.net> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Alek Du <alek.du@intel.com> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Jiri Kosina <jkosina@suse.cz> Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no> Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-16pinctrl: atlas7: support atlas7 step B changesWei Chen
The the pin groups and pin functions have been changed in atlas7 step B soc. We have to update the driver to support step B chip. Changes: 1. add 5 jtag pins to IOC_TOP: "jtag_tdo", "jtag_tms","jtag_tck", "jtag_tdi", "jtag_trstn" these 5 pins can be mutiplex with other functions, so we have to conver these 5 pins in pinmux. 2. add pin groups for audio digmic, audio spdif, can transceiver en, can transceiver stb, i2s0, i2s1 and jtag. 3. serval pins can be located to more PADs: audio_uart0_urfs, audio_uart1_urfs, audio_uart2_urfs, audio_uart2_urxd, audio_uart2_usclk, audio_uart2_utfs, audio_uart2_utxd, can0_rxd, can0_txd, can1_rxd, can1_txd jtag_ntrst, jtag_swdiotms, jtag_tck, jtag_tdi, jtag_tdo, pw_cko0, pw_cko1, pw_i2s01, pw_pwm0, pw_pwm1, sd2_cdb, sd2_wpb, uart2_cts, uart2_rts, uart2_rxd, uart2_txd, uart3_cts, uart3_rts, uart3_rxd, uart3_txd, uart4_cts, uart4_rts, usb0_drvvbus, usb1_drvvbus. Because of Changes#3, some functions should have more than one pin groups. So we have to split the original pin group to serval pin groups. For example: audio_uart0 has 5 pins, on STEPA, each of these 5 pins only has one related PAD. But on STEPB, audio_uart0_urfs has 4 related PAD. So we place the 4 pins with one PAD into a single pin group: audio_uart0_basic_group. and place urfs pin wtih different PADs to 4 different pin groups: audio_uart0_urfs_group0, ..., audio_uart0_urfs_group3 A full audio_uart0 pin group can be: pinctrl-0 = <&audio_uart0_basic_group &audio_uart0_urfs_group0>; If audio_uart0 pin group encountered some confiction, we only have to change the urfs group: pinctrl-0 = <&audio_uart0_basic_group &audio_uart0_urfs_group2>; Signed-off-by: Wei Chen <Wei.Chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-09-16genirq: Remove irq argument from irq flow handlersThomas Gleixner
Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
2015-08-13pinctrl: atlas7: clear ugly branch statements for pull and drivestrengthWei Chen
To set/get atlas7 pull & drive strength, we use lots of if/else to check pad type. But except mask value or immediate value, all actions in these conditional branches are the same. So we use predefined pull info table and drive strength table to reduce these redundancy code. Signed-off-by: Wei Chen <Wei.Chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-28pinctrl: sirf: add power management support for atlas7Wei Chen
We had not implemented the pm interface of atlas7 pinctrl and gpio drivers. So when system resumes from sleep, all pin configuration and gpio status will be lost. Now, we implement these interfaces to support pm. At the same time, this patch also drops a lot of if-else by look-up table for getting and setting pull. Signed-off-by: Wei Chen <Wei.Chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-17pinctrl/sirf: Prepare xxx_gpio-handle_irq for irq argument removalThomas Gleixner
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org
2015-07-16pinctrl: sirf: Drop owner assignment from platform_driverKrzysztof Kozlowski
platform_driver does not need to set an owner because platform_driver_register() will set it. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10pinctrl: make pinctrl_register() return proper error codeMasahiro Yamada
Currently, pinctrl_register() just returns NULL on error, so the callers can not know the exact reason of the failure. Some of the pinctrl drivers return -EINVAL, some -ENODEV, and some -ENOMEM on error of pinctrl_register(), although the error code might be different from the real cause of the error. This commit reworks pinctrl_register() to return the appropriate error code and modifies all of the pinctrl drivers to use IS_ERR() for the error checking and PTR_ERR() for getting the error code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Lee Jones <lee@kernel.org> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Ray Jui <rjui@broadcom.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Acked-by: Wei Chen <Wei.Chen@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-04pinctrl: Remove .owner fieldFabio Estevam
platform_driver does not need to set the owner field, as it will be populated by the driver core, so just remove it. The semantic patch that makes this change is available in scripts/coccinelle/api/platform_no_drv_owner.cocci. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-19pinctrl: sirf: add sirf atlas7 pinctrl and gpio supportWei Chen
The Pinctrl module (ioc) controls the Pad's function select (each pad can have 8 functions), Pad's Drive Strength, Pad's Pull Select and Pad's Input Disable status. The ioc has two modules, ioc_top & ioc_rtc. Both of these two modules have function select/clear, Pull select and Drive Strength registers. But only ioc_rtc has input-disable registers. The Pads on ioc_top have to access ioc_rtc to set their input-disable status and intpu-disable-value. So have to use one ioc driver instance to drive these two ioc modules at the same time, and each ioc module will be treat as one bank on the "IOC Device". The GPIO Controller controls the GPIO status if the Pad has been config as GPIO by Pinctrl already. Includes the GPIO Input/output, Interrupt type, Interrupt Status, and Set/Get Values. The GPIO pull up/down are controlled by Pinctrl. There are 7 GPIO Groups and splited into 3 MACROs in atlas7. The GPIO Groups in one MACRO share one GPIO controllers, each GPIO Group are treated as one GPIO bank. For example: In VDIFM macro, there is one GPIO Controller, it has 3 banks to control 3 gpio groups. Its gpio name space is from 0 to 95. The Device Tree can be written as following: gpio-ranges = <&pinctrl 0 0 0>, <&pinctrl 32 0 0>, <&pinctrl 64 0 0>; gpio-ranges-group-names = "gnss_gpio_grp", "lcd_vip_gpio_grp", "sdio_i2s_gpio_grp"; bank#0 is from 0~31, the pins are from pinctrl's "gnss_gpio_grp". bank#2 is from 32~63, the pins are from pinctrl's "lcd_vip_gpio_grp". bank#3 is from 64~95, the pins are from pinctrl's "sdio_i2s_gpio_grp". Signed-off-by: Wei Chen <Wei.Chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>