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path: root/drivers/pinctrl
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2016-06-02Merge tag 'v4.4.12' into toradex_vf_4.4-nextStefan Agner
This is the 4.4.12 stable release
2016-05-18pinctrl: at91-pio4: fix pull-up/down logicLudovic Desroches
commit 5305a7b7e860bb40ab226bc7d58019416073948a upstream. The default configuration of a pin is often with a value in the pull-up/down field at chip reset. So, even if the internal logic of the controller prevents writing a configuration with pull-up and pull-down at the same time, we must ensure explicitly this condition before writing the register. This was leading to a pull-down condition not taken into account for instance. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Fixes: 776180848b57 ("pinctrl: introduce driver for Atmel PIO4 controller") Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-04pinctrl: single: Fix pcs_parse_bits_in_pinctrl_entry to use __ffs than ffsKeerthy
commit 56b367c0cd67d4c3006738e7dc9dda9273fd2bfe upstream. pcs_parse_bits_in_pinctrl_entry uses ffs which gives bit indices ranging from 1 to MAX. This leads to a corner case where we try to request the pin number = MAX and fails. bit_pos value is being calculted using ffs. pin_num_from_lsb uses bit_pos value. pins array is populated with: pin + pin_num_from_lsb. The above is 1 more than usual bit indices as bit_pos uses ffs to compute first set bit. Hence the last of the pins array is populated with the MAX value and not MAX - 1 which causes error when we call pin_request. mask_pos is rightly calculated as ((pcs->fmask) << (bit_pos - 1)) Consequently val_pos and submask are correct. Hence use __ffs which gives (ffs(x) - 1) as the first bit set. fixes: 4e7e8017a8 ("pinctrl: pinctrl-single: enhance to configure multiple pins of different modules") Signed-off-by: Keerthy <j-keerthy@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-04pinctrl: mediatek: correct debounce time unit in mtk_gpio_set_debounceYingjoe Chen
commit 5fedbb923936174ab4d1d5cc92bca1cf6b2e0ca2 upstream. The debounce time unit for gpio_chip.set_debounce is us but mtk_gpio_set_debounce regard it as ms. Fix this by correct debounce time array dbnc_arr so it can find correct debounce setting. Debounce time for first debounce setting is 500us, correct this as well. While I'm at it, also change the debounce time array name to "debounce_time" for readability. Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Acked-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-04-20pinctrl: freescale: imx: fix bogus check of of_iomap() return valueVladimir Zapolskiy
commit 9a4f424531dabd877259ae0071b8bcc4dede9eb5 upstream. On error path of_iomap() returns NULL, hence IS_ERR() check is invalid and may cause a NULL pointer dereference, the change fixes this problem. While we are here invert a device node check to simplify the code. Fixes: 26d8cde5260b ("pinctrl: freescale: imx: add shared input select reg support") Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-04-20pinctrl: nomadik: fix pull debug print inversionLinus Walleij
commit 6ee334559324a55725e22463de633b99ad99fcad upstream. Pull up was reported as pull down and vice versa. Fix this. Fixes: 8f1774a2a971 "pinctrl: nomadik: improve GPIO debug prints" Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-04-20pinctrl: sunxi: Fix A33 external interrupts not workingHans de Goede
commit 5e7515ba78fff2f5407eaa2f97c1d5c07801ac3d upstream. pinctrl-sun8i-a33.c (and the dts) declare only 2 interrupt banks, where as the closely related a23 has 3 banks. This matches with the datasheet for the A33 where only interrupt banks B and G are specified where as the A23 has banks A, B and G. However the A33 being the A23 derative it is means that the interrupt configure/status io-addresses for the 2 banks it has are not changed from the A23, iow they have the same address as if bank A was still present. Where as the sunxi pinctrl currently tries to use the A23 bank A addresses for bank B, since the pinctrl code does not know about the removed bank A. Add a irq_bank_base parameter and use this where appropriate to take the missing bank A into account. This fixes external interrupts not working on the A33 (tested with an i2c touchscreen controller which uses an external interrupt). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-04-20pinctrl: sh-pfc: only use dummy states for non-DT platformsWolfram Sang
commit 0129801be4b87226bf502f18f5a9eabd356d1058 upstream. If pinctrl_provide_dummies() is used unconditionally, then the dummy state will be used even on DT platforms when the "init" state was intentionally left out. Instead of "default", the dummy "init" state will then be used during probe. Thus, when probing an I2C controller on cold boot, communication triggered by bus notifiers broke because the pins were not initialized. Do it like OMAP2: use the dummy state only for non-DT platforms. Fixes: ef0eebc05130 ("drivers/pinctrl: Add the concept of an "init" state") Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-04-20pinctrl: pistachio: fix mfio84-89 function description and pinmux.Govindraj Raja
commit e9adb336d0bf391be23e820975ca5cd12c31d781 upstream. mfio 84 to 89 are described wrongly, fix it to describe the right pin and add them to right pin-mux group. The correct order is: pll1_lock => mips_pll -- MFIO_83 pll2_lock => audio_pll -- MFIO_84 pll3_lock => rpu_v_pll -- MFIO_85 pll4_lock => rpu_l_pll -- MFIO_86 pll5_lock => sys_pll -- MFIO_87 pll6_lock => wifi_pll -- MFIO_88 pll7_lock => bt_pll -- MFIO_89 Cc: linux-gpio@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: James Hartley <James.Hartley@imgtec.com> Fixes: cefc03e5995e("pinctrl: Add Pistachio SoC pin control driver") Signed-off-by: Govindraj Raja <Govindraj.Raja@imgtec.com> Acked-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-04-12pinctrl-bcm2835: Fix cut-and-paste error in "pull" parsingPhil Elwell
commit 2c7e3306d23864d49f686f22e56e180ff0fffb7f upstream. The DT bindings for pinctrl-bcm2835 allow both the function and pull to contain either one entry or one per pin. However, an error in the DT parsing can cause failures if the number of pulls differs from the number of functions. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Phil Elwell <phil@raspberrypi.org> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-17pinctrl: freescale: imx: implement gpio_disable_free for VybridStefan Agner
The Freescale Vybrid SoC has GPIO capabilities as part of the IOMUXC. To enable GPIO's, the gpio_request_enable callback has been implemented, however the corsponding gpio_disable_free callback is missing. So far, disabling (unexporting) a GPIO left the pin in its last state. Implement a proper gpio_disable_free function which clears the three enable bits which influence the state (IBE, OBE and PUE). Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2016-02-10pinctrl: pinctrl-imx: implement suspend/resumeStefan Agner
In some SoC's using the IMX pin controller, the IP looses its state when entering lowest power modes. Enhance the driver with suspend/ resume functions restoring the pin states.
2015-12-14pinctrl: bcm2835: Fix initial value for direction_outputStefan Wahren
Currently the provided initial value for bcm2835_gpio_direction_output has no effect. So fix this issue by changing the value before changing the GPIO direction. As a result we need to move the function below bcm2835_gpio_set. Suggested-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Eric Anholt <eric@anholt.net> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Fixes: e1b2dc70cd5b ("pinctrl: add bcm2835 driver") Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10pinctrl: intel: fix offset calculation issue of register PAD_OWNQipeng Zha
The calculation equation of PAD_OWN register offset is not correct for Broxton, verified this fix will get right offset for Broxton. Signed-off-by: Qi Zheng <qi.zheng@intel.com> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10pinctrl: intel: fix bug of register offset calculationQipeng Zha
The group size for registers PADCFGLOCK, HOSTSW_OWN, GPI_IS, GPI_IE, are not 24 for Broxton, Add a parameter to allow different platform to set correct value. Signed-off-by: Qi Zheng <qi.zheng@intel.com> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10pinctrl: freescale: add ZERO_OFFSET_VALID flag for vf610 pinctrlShawn Guo
To support i.MX7D Low Power State Retention IOMUXC, commit e7b37a522aa9 ("pinctrl: freescale: imx: allow mux_reg offset zero") changes the way of zero mux_reg offset support with a new flag ZERO_OFFSET_VALID. But, unfortunately, it forgot to add this flag for vf610 pinctrl which has zero mux_reg offset be valid as well, and hence breaks the vf610 support. Fix the regression by adding flag ZERO_OFFSET_VALID for vf610 pinctrl driver. Signed-off-by: Shawn Guo <shawnguo@kernel.org> Fixes: e7b37a522aa9 ("pinctrl: freescale: imx: allow mux_reg offset zero") Reported-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: sh-pfc: sh7734: Add missing cfg macro parameter to fix buildGeert Uytterhoeven
When building for SH7734: drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:1: error: macro "_GP_DATA" passed 5 arguments, but takes just 4 drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:2: error: '_GP_DATA' undeclared here (not in a function) drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:1: error: macro "_GP_DATA" passed 5 arguments, but takes just 4 drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:1: error: macro "_GP_DATA" passed 5 arguments, but takes just 4 ... drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:1: error: macro "_GP_INOUTSEL" passed 5 arguments, but takes just 4 drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:53: error: '_GP_INOUTSEL' undeclared here (not in a function) drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:2: warning: initialization makes integer from pointer without a cast [enabled by default] drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:2: warning: (near initialization for '(anonymous)[0]') [enabled by default] ... drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:1: error: macro "_GP_INDT" passed 5 arguments, but takes just 4 drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:47: error: '_GP_INDT' undeclared here (not in a function) drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:2: warning: initialization makes integer from pointer without a cast [enabled by default] drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:2: warning: (near initialization for '(anonymous)[0]') [enabled by default] ... Add the missing "cfg" macro parameters to the sh7734-specific _GP_DATA(), _GP_INOUTSEL(), and _GP_INDT() macros to fix this. Fixes: 22768fc60abbf58b ("pinctrl: sh-pfc: Add macros defining GP ports with config flags") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-18pinctrl: mediatek: Add get_direction support.Hongzhou Yang
Since Linux gpio framework return 0 for output, 1 for input. But HW use 0 stands for input, and 1 stands for output. So use negative to correct it. And gpio_chip.get is used to get input value, no need to get output value, so removing it. Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-17pinctrl: fix qcom ssbi drivers for 64-bit compilationArnd Bergmann
When building pinctrl-ssbi-gpio and pinctrl-ssbi-mpp for ARM64, we get a compile warning about invalid types: drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c: In function 'pm8xxx_gpio_probe': drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:675:17: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c: In function 'pm8xxx_mpp_probe': drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c:766:17: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] This changes the code so we cast the pointer to 'unsigned long', which is the right thing to do here. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-17pinctrl: imx1-core: add missing of_node_putVaishali Thakkar
for_each_child_of_node performs an of_node_get on each iteration, so of_node_put is required on break out of the loop. This is done using Coccinelle. And semantic patch used for this is as follows: @@ expression root,e; local idexpression child; @@ for_each_child_of_node(root, child) { ... when != of_node_put(child) when != e = child ( return child; | + of_node_put(child); ? return ...; ) ... } Signed-off-by: Vaishali Thakkar <vthakkar1994@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-17pinctrl: remove redundant if conditional from KconfigMasahiro Yamada
The whole menu is guarded by menu "Pin controllers" depends on PINCTRL ... endmenu The if conditional outside of it is redundant. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-02Merge tag 'gpio-v4.4-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "Here is the bulk of GPIO changes for the v4.4 development cycle. The only changes hitting outside drivers/gpio are in the pin control subsystem and these seem to have settled nicely in linux-next. Development mistakes and catfights are nicely documented in the reverts as you can see. The outcome of the ABI fight is that we're working on a chardev ABI for GPIO now, where hope to show results for the v4.5 kernel. Summary of changes: GPIO core: - Define and handle flags for open drain/open collector and open source/open emitter, also know as "single-ended" configurations. - Generic request/free operations that handle calling out to the (optional) pin control backend. - Some refactoring related to an ABI change that did not happen, yet provide useful. - Added a real-time compliance checklist. Many GPIO chips have irqchips, and need to think this over with the RT patches going upstream. - Restructure, fix and clean up Kconfig menus a bit. New drivers: - New driver for AMD Promony. - New driver for ACCES 104-IDIO-16, a port-mapped I/O card, ISA-style. Very retro. Subdriver changes: - OMAP changes to handle real time requirements. - Handle trigger types for edge and level IRQs on PL061 properly. As this hardware is very common it needs to set a proper example for others to follow. - Some container_of() cleanups. - Delete the unused MSM driver in favor of the driver that is embedded inside the pin control driver. - Cleanup of the ath79 GPIO driver used by many, many OpenWRT router targets. - A consolidated IT87xx driver replacing the earlier very specific IT8761e driver. - Handle the TI TCA9539 in the PCA953x driver. Also handle ACPI devices in this subdriver. - Drop xilinx arch dependencies as these FPGAs seem to profilate over a few different architectures. MIPS and ARM come to mind" * tag 'gpio-v4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (57 commits) gpio: fix up SPI submenu gpio: drop surplus I2C dependencies gpio: drop surplus X86 dependencies gpio: dt-bindings: document the official use of "ngpios" gpio: MAINTAINERS: Add an entry for the ATH79 GPIO driver gpio / ACPI: Allow shared GPIO event to be read via operation region gpio: group port-mapped I/O drivers in a menu gpio: Add ACCES 104-IDIO-16 driver maintainer entry gpio: zynq: Document interrupt-controller DT binding gpio: xilinx: Drop architecture dependencies gpio: generic: Revert to old error handling in bgpio_map gpio: add a real time compliance notes Revert "gpio: add a real time compliance checklist" gpio: Add GPIO support for the ACCES 104-IDIO-16 gpio: driver for AMD Promontory gpio: xlp: Convert to use gpiolib irqchip helpers gpio: add a real time compliance checklist gpio/xilinx: enable for MIPS gpiolib: Add and use OF_GPIO_SINGLE_ENDED flag gpiolib: Split GPIO flags parsing and GPIO configuration ...
2015-11-02Merge tag 'pinctrl-v4.4-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the big bulk of pin control changes for the v4.4 kernel development cycle. Development pace is high in pin control again this merge window. 28 contributors, 83 patches. It hits a few sites outside the pin control subsystem: - Device tree bindings in Documentation (as usual) - MAINTAINERS - drivers/base/* for the "init" state handling by Doug Anderson. This has been ACKed by Greg. - drivers/usb/renesas_usbhs/rcar2.c, for a dependent Renesas change in the USB subsystem. This has been ACKed by both Greg and Felipe. - arch/arm/boot/dts/sama5d2.dtsi - this should ideally have gone through the ARM SoC tree but ended up here. This time I am using Geert Uytterhoeven as submaintainer for SH PFC since the are three-four people working in parallel with new Renesas ASICs. Summary of changes: Infrastructure: - Doug Anderson wrote a patch adding an "init" state different from the "default" state for pin control state handling in the core framework. This is applied before the driver's probe() call if defined and takes precedence over "default". If both are defined, "init" will be applied *before* probe() and "default" will be applied *after* probe(). Significant subdriver improvements: - SH PFC is switched to getting GPIO ranges from the device tree ranges property on DT platforms. - Got rid of CONFIG_ARCH_SHMOBILE_LEGACY, we are all modernized. - Got rid of SH PFC hardcoded IRQ numbers. - Allwinner sunxi external interrupt through the "r" controller. - Moved the Cygnus driver to use DT-provided GPIO ranges. New drivers: - Atmel PIO4 pin controller for the SAMA4D2 family New subdrivers: - Rockchip RK3036 subdriver - Renesas SH PFC R8A7795 subdriver - Allwinner sunxi A83T PIO subdriver - Freescale i.MX7d iomux lpsr subdriver - Marvell Berlin BG4CT subdriver - SiRF Atlas 7 step B SoC subdriver - Intel Broxton SoC subdriver Apart from this, the usual slew if syntactic and semantic fixes" * tag 'pinctrl-v4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (81 commits) pinctrl: pinconf: remove needless loop pinctrl: uniphier: guard uniphier directory with CONFIG_PINCTRL_UNIPHIER pinctrl: zynq: fix UTF-8 errors pinctrl: zynq: Initialize early pinctrl: at91: add missing of_node_put pinctrl: tegra-xusb: Correct lane mux options pinctrl: intel: Add Intel Broxton pin controller support pinctrl: intel: Allow requesting pins which are in ACPI mode as GPIOs pinctrl: intel: Add support for multiple GPIO chips sharing the interrupt drivers/pinctrl: Add the concept of an "init" state pinctrl: uniphier: set input-enable before pin-muxing pinctrl: cygnus: Add new compatible string for gpio controller driver pinctrl: cygnus: Remove GPIO to Pinctrl pin mapping from driver pinctrl: cygnus: Optional DT property to support pin mappings pinctrl: sunxi: Add irq pinmuxing to sun6i "r" pincontroller pinctrl: sunxi: Fix irq_of_xlate for the r_pio pinctrl block pinctrl: sh-pfc: Remove obsolete r8a7778 platform_device_id entry pinctrl: sh-pfc: Remove obsolete r8a7779 platform_device_id entry pinctrl: sh-pfc: Stop including <linux/platform_data/gpio-rcar.h> usb: renesas_usbhs: Remove unneeded #include <linux/platform_data/gpio-rcar.h> ...
2015-10-31pinctrl: pinconf: remove needless loopLaurent Meunier
This removes a needless loop which was caught in pinconf.c. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Laurent Meunier <laurent.meunier@st.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-31pinctrl: uniphier: guard uniphier directory with CONFIG_PINCTRL_UNIPHIERMasahiro Yamada
CONFIG_PINCTRL_UNIPHIER is more suitable than CONFIG_ARCH_UNIPHIER to guard the drivers/pinctrl/uniphier directory. The current CONFIG_PINCTRL_UNIPHIER_CORE is a bit long (it would break the indentation in drivers/pinctrl/Makefile), so rename it into CONFIG_PINCTRL_UNIPHIER. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-31pinctrl: zynq: fix UTF-8 errorsLinus Walleij
Fix up Sören's name in the Zynq driver. I caused this. I fix it. Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-30pinctrl: zynq: Initialize earlyMike Looijmans
Supplying pinmux configuration for e.g. gpio pins leads to deferred probes because the pinctrl device is probed much later than gpio. Move the init call to a much earlier stage so it probes before the devices that may need it. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Tested-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27pinctrl: at91: add missing of_node_putJulia Lawall
for_each_child_of_node performs an of_node_get on each iteration, so a break out of the loop requires an of_node_put. A simplified version of the semantic patch that fixes this problem is as follows (http://coccinelle.lip6.fr): // <smpl> @@ expression root,e; local idexpression child; @@ for_each_child_of_node(root, child) { ... when != of_node_put(child) when != e = child ( return child; | + of_node_put(child); ? return ...; ) ... } // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27pinctrl: tegra-xusb: Correct lane mux optionsJon Hunter
The description of the XUSB_PADCTL_USB3_PAD_MUX_0 register in the Tegra124 documentation implies that all functions (pcie, usb3 and sata) can be muxed onto to all lanes (pcie lanes 0-4 and sata lane 0). However, it has been confirmed that this is not the case and the mux'ing options much more limited. Unfortunately, the public documentation has not been updated to reflect this and so detail the actual mux'ing options here by function: Function: Lanes: pcie1 x2: pcie3, pcie4 pcie1 x4: pcie1, pcie2, pcie3, pcie4 pcie2 x1 (option1): pcie0 pcie2 x1 (option2): pcie2 usb3 port 0: pcie0 usb3 port 1 (option 1): pcie1 usb3 port 1 (option 2): sata0 sata: sata0 Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27pinctrl: intel: Add Intel Broxton pin controller supportMika Westerberg
This driver adds pinctrl/GPIO support for Intel Broxton. The GPIO controller is based on the same hardware design that is already used in Intel Sunrisepoint so we leverage the core driver here. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27pinctrl: intel: Allow requesting pins which are in ACPI mode as GPIOsMika Westerberg
Reserved for ACPI actually means that in such case the GPIO hardware will not update the interrupt status register (GPI_IS) even if the pin is configured to trigger an interrupt. It will update GPI_GPE_STS instead and does not trigger an interrupt. Allow using such pins as GPIOs, only prevent their usage as interrupts. We also rename function intel_pad_reserved_for_acpi() to be intel_pad_acpi_mode() which reflects the actual meaning better. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27pinctrl: intel: Add support for multiple GPIO chips sharing the interruptMika Westerberg
On Intel Broxton the GPIO hardware consists of several chips that all share the parent interrupt. It is not possible to handle this by setting chained handler for each chip (as they will overwrite each other). To overcome this we need to request the interrupt using devm_request_irq() and pass IRQF_SHARED with the flags. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27drivers/pinctrl: Add the concept of an "init" stateDouglas Anderson
For pinctrl the "default" state is applied to pins before the driver's probe function is called. This is normally a sensible thing to do, but in some cases can cause problems. That's because the pins will change state before the driver is given a chance to program how those pins should behave. As an example you might have a regulator that is controlled by a PWM (output high = high voltage, output low = low voltage). The firmware might leave this pin as driven high. If we allow the driver core to reconfigure this pin as a PWM pin before the PWM's probe function runs then you might end up running at too low of a voltage while we probe. Let's introudce a new "init" state. If this is defined we'll set pinctrl to this state before probe and then "default" after probe (unless the driver explicitly changed states already). An alternative idea that was thought of was to use the pre-existing "sleep" or "idle" states and add a boolean property that we should start in that mode. This was not done because the "init" state is needed for correctness and those other states are only present (and only transitioned in to and out of) when (optional) power management is enabled. Changes in v3: - Moved declarations to pinctrl/devinfo.h - Fixed author/SoB Changes in v2: - Added comment to pinctrl_init_done() as per Linus W. Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Tested-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27pinctrl: uniphier: set input-enable before pin-muxingMasahiro Yamada
While IECTRL is disabled, input signals are pulled-down internally. If pin-muxing is set up first, glitch signals (Low to High transition) might be input to hardware blocks. Bad case scenario: [1] The hardware block is already running before pinctrl is handled. (the reset is de-asserted by default or by a firmware, for example) [2] The pin-muxing is set up. The input signals to hardware block are pulled-down by the chip-internal biasing. [3] The pins are input-enabled. The signals from the board reach the hardware block. Actually, one invalid character is input to the UART blocks for such SoCs as PH1-LD4, PH1-sLD8, where UART devices start to run at the power on reset. To avoid such problems, pins should be input-enabled before muxing. Fixes: 6e9088920258 ("pinctrl: UniPhier: add UniPhier pinctrl core support") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reported-by: Dai Okamura <okamura.dai@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27pinctrl: cygnus: Remove GPIO to Pinctrl pin mapping from driverPramod Kumar
Remove gpio to pinctrl pin mapping code from driver and address this through standard property "gpio-ranges". Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-26Merge branch 'sh-pfc-for-v4.4' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
2015-10-23pinctrl: sunxi: Add irq pinmuxing to sun6i "r" pincontrollerHans de Goede
Add pinmuxing for external interrupt functionality through the sun6i "r" pincontroller. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-23pinctrl: sunxi: Fix irq_of_xlate for the r_pio pinctrl blockHans de Goede
The r_pio gpio / pin controller has a pin_base of non 0, we need to adjust for this before calling sunxi_pinctrl_desc_find_function_by_pin. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-20pinctrl: sh-pfc: Remove obsolete r8a7778 platform_device_id entryGeert Uytterhoeven
Since the removal of the r8a7778 legacy SoC code in commit 4baadb9e05c68962 ("ARM: shmobile: r8a7778: remove obsolete setup code"), r8a7778 is only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to match platform devices by name anymore, hence remove the corresponding platform_device_id entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-20pinctrl: sh-pfc: Remove obsolete r8a7779 platform_device_id entryGeert Uytterhoeven
Since the removal of the r8a7779 legacy SoC code in commit c99cd90d98a98aa1 ("ARM: shmobile: r8a7779: Remove legacy SoC code"), r8a7779 is only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to match platform devices by name anymore, hence remove the corresponding platform_device_id entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-20pinctrl: sh-pfc: Stop including <linux/platform_data/gpio-rcar.h>Geert Uytterhoeven
This header file will be removed soon. Copy the helper macro RCAR_GP_PIN(), which is used by the pinctrl drivers only, to sh_pfc.h, and drop the #include. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-20pinctrl: sh-pfc: Rename .gpio_data[] to .pinmux_data[]Geert Uytterhoeven
The sh_pfc_soc_info.gpio_data[] array contains not only GPIO data, but also various other pinmux-related data (functions and marks). Every single driver already calls its local array pinmux_data[]. Hence rename the sh_pfc_soc_info member to "pinmux_data". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-10-20pinctrl: sh-pfc: r8a7778: Add bias (pull-up) pinconf supportUlrich Hecht
On this SoC there is no simple mapping of GP pins to pull-up register bits, so we need a table. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-20pinctrl: sh-pfc: Add macros defining GP ports with config flagsUlrich Hecht
PORT_GP_CFG_1 and PORT_GP_CFG_32 work like their non-CFG counterparts but accept an extra argument with config flags. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-20pinctrl: sh-pfc: r8a7794: Add VIN pin groupsKoji Matsuoka
Add VIN0/1 pin groups to R8A7794 PFC driver. Sergei: rebased, renamed, added changelog, gathered 12 VIN1 data pins into a single pin group, added "vin1_data10" pin group, used 'union vin_data' and VIN_DATA_PIN_GROUP() macro to describe VIN1 pins, reversed the order of the VIN1 pin groups, removed unneeded empty lines, fixed VIN1 separator comment. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-20pinctrl: sh-pfc: r8a779[01]: Move 'union vin_data' to shared header fileSergei Shtylyov
R8A7790/1 PFC drivers use almost identical 'union vin_data' and completely identical VIN_DATA_PIN_GROUP() macro; we thus can move them into the shared header file... Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-16pinctrl: baytrail: Fix compilation warnings when !CONFIG_PMMika Westerberg
When CONFIG_PM is not set we get following compilation warnings: warning: ‘byt_gpio_runtime_suspend’ defined but not used [-Wunused-function] warning: ‘byt_gpio_runtime_resume’ defined but not used [-Wunused-function] Fix this by guarding byt_gpio_runtime_suspend()/byt_gpio_runtime_resume() with #ifdef CONFIG_PM. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-16pinctrl: intel: Fix compilation warning when !CONFIG_PM_SLEEPMika Westerberg
We get following warning when CONFIG_PM_SLEEP is not set warning: ‘intel_gpio_irq_init’ defined but not used [-Wunused-function] Since the function is only called from intel_pinctrl_resume() move it inside CONFIG_PM_SLEEP guard as well. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-16pinctrl: qcom: ssbi: fix compilation with DEBUG_FS=nJonas Gorski
The DEBUG_FS=n #defines for the dbg_show functions were missed when renaming the driver from msm_ to pm8xxx_, causing it to break the build when DEBUG_FS isn't enabled: CC [M] drivers/pinctrl/qcom/pinctrl-ssbi-gpio.o drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:597:14: error: ‘pm8xxx_gpio_dbg_show’ undeclared here (not in a function) .dbg_show = pm8xxx_gpio_dbg_show, Fix this by renaming them correctly. Fixes: b4c45fe974bc ("pinctrl: qcom: ssbi: Family A gpio & mpp drivers") Signed-off-by: Jonas Gorski <jogo@openwrt.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-16pinctrl: replace trivial implementations of gpio_chip request/freeJonas Gorski
Replace all trivial request/free callbacks that do nothing but call into pinctrl code with the generic versions. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Eric Anholt <eric@anholt.net> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Lee Jones <lee@kernel.org> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.2.3 (git 2.0.4) at 2024-07-01 01:08:58 +0000