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path: root/drivers/spi/spi_tegra.c
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2011-06-26spi: tegra: fix uninitialized values and if statementJubeom Kim
- Initialized the read_words value. - (tspi->irq < 0) is not valid because tspi->irq is unsigned value. Change-Id: I37973c863ecc770b9744737faf5d69cce7b97400 Reviewed-on: http://git-master/r/37868 Tested-by: Jubeom Kim <jubeomk@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-03-08spi: tegra: Fixing misc issues.Laxman Dewangan
Following are the fixes; - Supportng half duplex. - Only using SW based CS. - Write to readback with command register does not work. Fixing issue. - Using cpu based transfer for smaller size and dma based for larger size. - reading proper transfer status after every transaction. bug 791149 bug 791780 Change-Id: I293b3f1b571276f5d8fe4ad4da67f827926e4b73 Reviewed-on: http://git-master/r/20581 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Amit Kamath <akamath@nvidia.com>
2011-01-25spi: tegra: disabling packed modeAmit Kamath
disable unstable packed spi mode Change-Id: I81a11a0f5dd9515ff1430ccfcc7d2ed7371e79b3 Reviewed-on: http://git-master/r/16105 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-01-18[ARM] tegra: spi: Fixed setup bugsAmit Kamath
Enabled clocks at spi_setup Fixed problem with endianness for 16 bit word size Fixed issue with small packet size less than fifo depth Fixed typo that enabled RX and TX by default Integration from http://git-master/r/#change,14536 Change-Id: I2cea3bdcb6a19780087671131a848095354105a3 Reviewed-on: http://git-master/r/15949 Reviewed-on: http://git-master/r/16048 Reviewed-by: Amit Kamath <akamath@nvidia.com> Tested-by: Amit Kamath <akamath@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-12-21[misc] remove executable permission on spi_tegra.cminwuklee
remove executable permission on the target file. Change-Id: I85c88e111cfe54d068d0dd47354f08b2e78537ef Reviewed-on: http://git-master/r/14040 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-12-21[tegra:spi] master tegra spi driver updateminwuklee
- DMA burst size can be set to 1, 4, or 8 depending on requested size - PACKED MODE support - When bits per word is 32, no endian conversion is needed; so use memcpy to copy from client buf to dma buf or vice versa - Do spi_complete operation in the last dma complete callback - Reducing the loop-count from 500 to 50, thus making sure suspend is not stuck. bug 747979 bug 765062 Change-Id: I67fe1405e1cda886e9229b26dff5ebd80fd67247 Reviewed-on: http://git-master/r/12799 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-12-14[misc] cancel executable permission on source filesChao Jiang
Source files should not be with executable permission. Change-Id: I70b6be4cf88fea4be9b092ca2f5dd08e40ee7cbd Reviewed-on: http://git-master/r/12081 Reviewed-by: Chao Jiang <chaoj@nvidia.com> Tested-by: Chao Jiang <chaoj@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-12-07[tegra:dma] set dma burst size for spi/slinkminwuklee
for spi/slink, depending on transfer size, burst size can be set to 1, 4, or 8. bug 747979 Change-Id: Ieae0285d374e7d0eb6c2c2e633f8cafbb2b51b3a Reviewed-on: http://git-master/r/12076 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-12-01[tegra:dma] set dma burst size for spi/slinkminwuklee
for spi/slink, set dma burst size based on transfer size. bug 747979 Change-Id: I8c3c0a0410648a25190847590b9ac0304fb1105f Reviewed-on: http://git-master/r/11752 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-10-18spi: tegra: Use shared DMA channelColin Cross
To avoid running out of DMA channels, use the shared DMA channel for all four Tegra spi controllers. Change-Id: Iff644253cf7fae36aa2e42321a1ded35a728da4f Signed-off-by: Colin Cross <ccross@android.com>
2010-10-14spi: tegra: cleanups from upstream reviewErik Gilling
Change-Id: Icecf7e64efcb39de072a15234ba1faa4bad40d25 Signed-off-by: Erik Gilling <konkers@android.com>
2010-10-08spi: tegra: Increase delay between CS and clock startGreg Meiste
Some SPI devices require a delay between the CS and when the clock starts. Increase SS_SETUP to accommodate these devices. Change-Id: I301e3583e70c722cadde5a9f91119881805dd3a5 Signed-off-by: Greg Meiste <w30289@motorola.com>
2010-10-06[ARM] Tegra: SPI: Suspend/resume.Todd Poynor
Save/restore SLINK_COMMAND_0 register. Wait for in-progress transactions to complete before suspend. Reject and WARN_ON transactions when suspended. Change-Id: I0527781f0bf95781afa3a35a68282cde2f0189ae Signed-off-by: Todd Poynor <toddpoynor@google.com>
2010-10-06spi: tegra: fix error setting on timeoutErik Gilling
avoids derefencing an uninitialized pointer Change-Id: Icf528441ae481e9f6f5ddc0be32c7c217fa49701 Signed-off-by: Erik Gilling <konkers@android.com>
2010-09-29spi: add spi_tegra driverErik Gilling
v2 changes: from Thierry Reding: * add "select TEGRA_SYSTEM_DMA" to Kconfig from Grant Likely: * add oneline description to header * inline references to DRIVER_NAME * inline references to BUSY_TIMEOUT * open coded bytes_per_word() * spi_readl/writel -> spi_tegra_readl/writel * move transfer validation to spi_tegra_transfer * don't request_mem_region iomem as platform bus does that for us * __exit -> __devexit v3 changes: from Russell King: * put request_mem_region back int from Grant Likely: * remove #undef DEBUG * add SLINK_ to register bit defines * remove unused bytes_per_word * make spi_tegra_readl/writel static linine * various refactoring for clarity * mark err if BSY bit is not cleared after 1000 retries * move spinlock to protect setting of RDY bit * subsys_initcall -> module_init v3 changes: from Grant Likely: * update spi_tegra to use PTR_ERRless dma API Signed-off-by: Erik Gilling <konkers@android.com> Cc: Thierry Reding <thierry.reding@avionic-design.de> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Russell King <linux@arm.linux.org.uk>