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path: root/drivers/spi
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2010-10-21Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (278 commits) arm: remove machine_desc.io_pg_offst and .phys_io arm: use addruart macro to establish debug mappings arm: return both physical and virtual addresses from addruart arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCC ARM: make struct machine_desc definition coherent with its comment eukrea_mbimxsd-baseboard: Pass the correct GPIO to gpio_free cpuimx27: fix compile when ULPI is selected mach-pcm037_eet: fix compile errors Fixing ethernet driver compilation error for i.MX31 ADS board cpuimx51: update board support mx5: add cpuimx51sd module and its baseboard iomux-mx51: fix GPIO_1_xx 's IOMUX configuration imx-esdhc: update devices registration mx51: add resources for SD/MMC on i.MX51 iomux-mx51: fix SD1 and SD2's iomux configuration clock-mx51: rename CLOCK1 to CLOCK_CCGR for better readability clock-mx51: factorize clk_set_parent and clk_get_rate eukrea_mbimxsd: add support for DVI displays cpuimx25 & cpuimx35: fix OTG port registration in host mode i.MX31 and i.MX35 : fix errate TLSbo65953 and ENGcm09472 ...
2010-10-20spi/omap2_mcspi: Verify TX reg is empty after TX only xfer with DMAIlkka Koskinen
In case of TX only with DMA, the driver assumes that the data has been transferred once DMA callback in invoked. However, SPI's shift register may still contain data. Thus, the driver is supposed to verify that the register is empty and the end of the SPI transfer has been reached. Signed-off-by: Ilkka Koskinen <ilkka.koskinen@nokia.com> Tested-by: Tuomas Katila <ext-tuomas.2.katila@nokia.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-20spi/omap2_mcspi: disable channel after TX_ONLY transfer in PIO modeJason Wang
In the TX_ONLY transfer, the SPI controller also receives data simultaneously and saves them in the rx register. After the TX_ONLY transfer, the rx register will hold the random data received during the last tx transaction. If the direct following transfer is RX_ONLY, this random data has the possibility to affect this transfer like this: When the SPI controller is changed from TX_ONLY to RX_ONLY, the random data makes the rx register full immediately and triggers a dummy write automatically(in SPI RX_ONLY transfers, we need a dummy write to trigger the first transaction). So the first data received in the RX_ONLY transfer will be that random data instead of something meaningful. We can avoid this by inserting a Disable/Re-enable toggle of the channel after the TX_ONLY transfer, since it purges the rx register. Signed-off-by: Jason Wang <jason77.wang@gmail.com> Tested-by: Grazvydas Ignotas <notasas@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-18Merge branch 'for-spi' of ↵Grant Likely
git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin into spi/next
2010-10-18spi/bfin_spi: namespace local structsMike Frysinger
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: init earlyMichael Hennerich
Some systems using this bus sometimes have very basic devices on them such as regulators. So we need to be loaded even earlier in case the devices are used by things such as early board init code. Therefore register in subsys_initcall(). Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: check per-transfer bits_per_wordBob Liu
Currently, if the bits_per_word when doing a transfer is not 8bits, we always treat it as 16bits when we should actually be returning an error. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: warn when CS is driven by hardware (CPHA=0)Barry Song
When the hardware is controlling the CS, there are some SPI options we are unable to support. So issue a warning in the hopes that the user will change to a SPI mode where we can support things sanely. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: cs should be always low when a new transfer beginsRob Maris
Signed-off-by: Rob Maris <maris.rob@vdi.de> Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: fix typo in commentRob Maris
Signed-off-by: Rob Maris <maris.rob@vdi.de> Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: reject unsupported SPI modesMike Frysinger
Who knows what people will try! Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: use dma_disable_irq_nosync() in irq handlerBarry Song
Using disable_irq() on the IRQ whose handler we are currently executing in can easily lead to a hang. So use the nosync variant here. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: combine duplicate SPI_CTL read/write logicMike Frysinger
While combining things, also switch to the proper SPI bit define names. This lets us punt the rarely used SPI defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: reset ctl_reg bits when setup is run again on a deviceMike Frysinger
During runtime, the spi setup function may be called multiple times on the same device in order to reconfigure some settings on the fly. When this happens, we need to reset the ctl_reg bits so that changing the mode works as expected. Reported-by: Andy Getzendanner <james.getzendanner@students.olin.edu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: push all size checks into the transfer functionMike Frysinger
This reduces duplication between the setup/transfer functions and keeps values cached during setup from overriding values changed on a transfer basis (like bits_per_word). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: use nosync when disabling the IRQ from the IRQ handlerYi Li
Using disable_irq() on the IRQ whose handler we are currently executing in can easily lead to a hang. So use the nosync variant here. Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: sync hardware state before reprogramming everythingBarry Song
Sometimes under load, the Blackfin core is able to send SPI register updates out before the controller is actually disabled. So when we go to reprogram the entire state (to switch to a different slave), make sure we sync after disabling the controller. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: save/restore state when suspending/resumingBarry Song
We can't rely on the SPI_CTL/SPI_FLG registers retaining their state when suspending, so save/restore their entire values. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: redo GPIO CS handlingBarry Song
The common SPI layers take care of detecting CS conflicts and preventing two devices from claiming the same CS. This causes problems for the GPIO CS support we currently have as we are using CS0 to mean "GPIO CS". But if we have multiple devices using a GPIO CS, the common SPI layers see multiple devices using the virtual "CS0" and reject any such attempts. To make both work, we introduce an offset define. This represents the max number of hardware CS values that the SPI peripheral supports. If the CS is below this limit, we know we can use the hardware CS. If it's above, we treat it as a GPIO CS. This keeps the CS unique as seen by the common code and prevents conflicts. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: use the SPI namespaced bit namesMike Frysinger
This lets us push the short SPI MMR bit names out of the global namespace. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: drop extra memory we don't needMike Frysinger
The driver that we based ours on uses a little extra memory behind the normal driver state, but we don't. So drop this useless bit of memory. Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: convert struct names to something more logicalMike Frysinger
The current structure names are a bit confusing as to what they represent, so use better names. Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: convert read/write/duplex funcs to a dedicated ops structureMike Frysinger
Rather than having to look up the same 3 sets of functions at the same time, just use an ops structure so we only need to set one pointer. Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: convert queue run state to true/falseMike Frysinger
No point in creating our own version of true/false defines when there is already a standard stdbool available to us. Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: fix up some unused/misleading commentsMike Frysinger
Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: punt useless null read/write funcsMike Frysinger
The chip ops should always be initialized, so having null fallback functions are useless. Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: drop custom cs_change_per_word supportMike Frysinger
As David points out, the cs_change_per_word option isn't standard, nor is anyone actually using it. So punt all of the dead code considering it makes up ~10% of the code size. Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: fix CS handlingBarry Song
The CS helper functions were toggling both the Flag Enable and the Flag Value bits, but the Flag Value bit is ignored if the corresponding Flag Enable bit is cleared. So under high speed transactions, the CS sometimes would not toggle properly. Since it makes no sense to toggle the Flag Enable bit dynamically when we actually want to control the Flag Value, do this when setting up the device and then only handle toggling of the CS value during runtime. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: utilize the SPI interrupt in PIO modeYi Li
The current behavior in PIO mode is to poll the SPI status registers which can obviously lead to higher latencies when doing a lot of SPI traffic. There is a SPI interrupt which can be used instead to signal individual completion of transactions. Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: force sane master-mode state at bootWolfgang Muees
We should make sure the SPI controller is in a sane state in case the boot loader left it in a crappy state. Such as DMA pending which causes interrupts to fire on us. When setting a sane initial state, do not default to slave mode. If we do, then the SPI peripheral may implicitly take over the SPISS pin which other things might be using. For example, the BF533-STAMP uses this pin as a GPIO to control switching between ethernet and flash. If the SPI peripheral controls the output state instead, the ethernet is no longer accessible. URL: http://blackfin.uclinux.org/gf/tracker/5630 Signed-off-by: Wolfgang Muees <wolfgang.mues@auerswald.de> Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: work around anomaly 05000119Sonic Zhang
Anomaly 05000119 states that the DMA_RUN bit with peripherals isn't reliable. However, the way the driver is currently written (DMA IRQ callback), we don't need the polling in the first place, so drop it. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18spi/bfin_spi: fix resources leakageDaniel Mack
Re-order setup() a bit so we don't leak memory/dma/gpio resources upon errors. Also make sure we don't call kfree() twice on the same object. Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-15spi/atmel: typo in debug messageMatthias Brugger
This patches a typo in the debug message. Signed-off-by: Matthias Brugger <mensch0815@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-14spi/fsl_spi: Fix compile errors when building on ppc64Kumar Gala
We get the following when building on ppc64 due to lack of include of <asm/io.h>: In file included from drivers/spi/spi_fsl_espi.c:25:0: drivers/spi/spi_fsl_lib.h: In function 'mpc8xxx_spi_write_reg': drivers/spi/spi_fsl_lib.h:88:2: error: implicit declaration of function 'out_be32' drivers/spi/spi_fsl_lib.h: In function 'mpc8xxx_spi_read_reg': drivers/spi/spi_fsl_lib.h:93:2: error: implicit declaration of function 'in_be32' drivers/spi/spi_fsl_espi.c: In function 'fsl_espi_remove': drivers/spi/spi_fsl_espi.c:571:2: error: implicit declaration of function 'iounmap' drivers/spi/spi_fsl_espi.c: In function 'fsl_espi_probe': drivers/spi/spi_fsl_espi.c:602:2: error: implicit declaration of function 'ioremap' drivers/spi/spi_fsl_espi.c:602:24: warning: assignment makes pointer from integer without a cast Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-13spi/atmel: let transfers through if not changing bits_per_wordMatthias Brugger
bits_per_word option in spi_transfer are allowed if it does not change the csr register. This is necessary for the driver in drivers/staging/iio/adis16260_core.c, as it uses this option. Signed-off-by: Matthias Brugger <mensch0815@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-13spi/topcliff: Fix uninitialized variable defectGrant Likely
This patch fixes the following build error introduced by commit 65308c46, "spi/topcliff: cleanup for style and conciseness". drivers/spi/spi_topcliff_pch.c: In function 'pch_spi_process_messages': drivers/spi/spi_topcliff_pch.c:752: warning: 'data' is used uninitialized in +this function Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12spi/fsl_spi: add eSPI controller supportMingkai Hu
Add eSPI controller support based on the library code spi_fsl_lib.c. The eSPI controller is newer controller 85xx/Pxxx devices supported. There're some differences comparing to the SPI controller: 1. Has different register map and different bit definition So leave the code operated the register to the driver code, not the common code. 2. Support 4 dedicated chip selects The software can't controll the chip selects directly, The SPCOM[CS] field is used to select which chip selects is used, and the SPCOM[TRANLEN] field is set to tell the controller how long the CS signal need to be asserted. So the driver doesn't need the chipselect related function when transfering data, just set corresponding register fields to controll the chipseclect. 3. Different Transmit/Receive FIFO access register behavior For SPI controller, the Tx/Rx FIFO access register can hold only one character regardless of the character length, but for eSPI controller, the register can hold 4 or 2 characters according to the character lengths. Access the Tx/Rx FIFO access register of the eSPI controller will shift out/in 4/2 characters one time. For SPI subsystem, the command and data are put into different transfers, so we need to combine all the transfers to one transfer in order to pass the transfer to eSPI controller. 4. The max transaction length limitation The max transaction length one time is limitted by the SPCOM[TRANSLEN] field which is 0xFFFF. When used mkfs.ext2 command to create ext2 filesystem on the flash, the read length will exceed the max value of the SPCOM[TRANSLEN] field. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12spi/mpc8xxx: refactor the common code for SPI/eSPI controllerMingkai Hu
Refactor the common code in file spi_fsl_spi.c to spi_fsl_lib.c used by SPI/eSPI controller driver as a library, and leave the QE/CPM SPI controller code in the SPI controller driver spi_fsl_spi.c. Because the register map of the SPI controller and eSPI controller is so different, also leave the code operated the register to the driver code, not the common code. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12spi/mpc8xxx: rename spi_mpc8xxx.c to spi_fsl_spi.cMingkai Hu
This will pave the way to refactor out the common code which can be used by the eSPI controller driver, and rename the SPI controller dirver to the file spi_fsl_spi.c. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12Merge commit 'v2.6.36-rc7' into spi/nextGrant Likely
2010-10-12spi/pl022: fix dubious allocation staticize platform dataLinus Walleij
This removes some dubious allocation of a local chipinfo struct in favor of a constant preset, tagging that one const revealed further problems with platform data being modified so fixed up these too. Reported-by: Virupax Sadashivpetimath <virupax.sadashivpetimath@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12spi/pl022: get rid of chipinfo dev pointerLinus Walleij
What is the dev pointer doing inside the platform data anyway. We have another pointer to the actual device at hand, use that. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12spi/pl022: Add spi->mode support to AMBA SPI driverKevin Wells
This patch adds spi->mode support for the AMBA pl022 driver and allows spidev to correctly alter SPI modes. Unused fields used in the pl022 header file for the pl022_config_chip have been removed. The ab8500 client driver selects the data transfer size instead of the platform data. For platforms that use the amba pl022 driver, the unused fields in the controller data structure have been removed and the .mode field in the SPI board info structure is used instead. Signed-off-by: Kevin Wells <wellsk40@gmail.com> Tested-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12spi: change to new flag variablematt mooney
Replace EXTRA_CFLAGS with ccflags-y. Signed-off-by: matt mooney <mfm@muteddisk.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12spi/pl022: add PrimeCell generic DMA supportLinus Walleij
This extends the PL022 SSP/SPI driver with generic DMA engine support using the PrimeCell DMA engine interface. Also fix up the test code for the U300 platform. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12spi/topcliff: Tidy up Kconfig help textGrant Likely
The original didn't specify Topcliff in the config prompt text. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12spi/topcliff: cleanups for style and concisenessGrant Likely
This patch makes multiple cleanups to the new topcliff pch spi driver including, but not limited to, - removing superfluous brackets around variables - open coding functions that are only used once - removing unnecessary line breaks - removing unused functions - simplifying the interrupt enable/disable code - remove unnecessary (void *) casts. - remove b_mem_fail from pch_spi_set_tx to code it more cleanly - shorten dev_dbg() messages for conciseness and readability More cleanups are still needed in this driver. In particular, - the driver filename should be changed to spi_topcliff_pch.c - many of the dev_dbg() lines should be trimmed (particularly the ones on unconditional code paths). - I suspect that the locking model not correct. I'd like to know what drivers' critical regions are, and how they are protected. - get_resources and release_resources probably should be open coded in .probe and .release respectively. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-11Merge branch 'for-rmk-next' of git://git.pengutronix.de/git/imx/linux-2.6 ↵Russell King
into devel-stable
2010-10-11spi/imx: Support different fifo sizesDavid Jander
The i.MX51 ECSPI has a fifo size of 64 entries instead of 8 entries as found on the other cspi bus devices. Cc: Jason Wang <jason77.wang@gmail.com> Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-08spi/topcliff: Add topcliff platform controller hub (PCH) spi bus driverMasayuki Ohtake
Topcliff PCH is the platform controller hub that is going to be used in Intel's upcoming general embedded platform. All IO peripherals in Topcliff PCH are actually devices sitting on AMBA bus. This patch adds a driver for the SPI bus integrated into the Topcliff device. Signed-off-by: Masayuki Ohtake <masa-korg@dsn.okisemi.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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