Age | Commit message (Collapse) | Author | |
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2011-10-04 | usb: dwc: remove "All rights reserved" statement. | Sebastian Andrzej Siewior | |
Some people think that this line is not compatible with the GPL. The statement was required due to the Buenos Aires Convention and is now deprecated. I remove it because it is said that it is pointless nowdays. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> | |||
2011-09-09 | usb: dwc3: debugfs: remove test mode interface | Sebastian Andrzej Siewior | |
There are some issues around for enabling/disabling this mode and handling it. It does not work perfectly (yet). However we have a few gadgets tested successfuly so far. That means we are quite confident that we won't need this in near future. So I'm for removing it and bringing a working version back once there is a need for it. Thanks to Dan Carpenter who spotted the wrong memory handling here. [ balbi@ti.com : made it actually apply ] Cc: Dan Carpenter <error27@gmail.com> Cc: wharms@bfs.de Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com> | |||
2011-09-09 | usb: dwc3: debugfs: add a kfree() on error to dwc3_testmode_open() | Dan Carpenter | |
We may as well fix this potential leak so we don't have to listen to the static checkers complain. Signed-off-by: Dan Carpenter <error27@gmail.com> Signed-off-by: Felipe Balbi <balbi@ti.com> | |||
2011-08-22 | usb: Introduce DesignWare USB3 DRD Driver | Felipe Balbi | |
The DesignWare USB3 is a highly configurable IP Core which can be instantiated as Dual-Role Device (DRD), Peripheral Only and Host Only (XHCI) configurations. Several other parameters can be configured like amount of FIFO space, amount of TX and RX endpoints, amount of Host Interrupters, etc. The current driver has been validated with a virtual model of version 1.73a of that core and with an FPGA burned with version 1.83a of the DRD core. We have support for PCIe bus, which is used on FPGA prototyping, and for the OMAP5, more adaptation (or glue) layers can be easily added and the driver is half prepared to handle any possible configuration the HW engineer has chosen considering we have the information on one of the GHWPARAMS registers to do runtime checking of certain features. More runtime checks can, and should, be added in order to make this driver even more flexible with regards to number of endpoints, FIFO sizes, transfer types, etc. While this supports only the device side, for now, we will add support for Host side (xHCI - see the updated series Sebastian has sent [1]) and OTG after we have it all stabilized. [1] http://marc.info/?l=linux-usb&m=131341992020339&w=2 Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> |