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Use threaded IRQ to support enabling clocks in interrupt handling.
Use io_start and io_end to hold and release host1x clock.
Disable IRQ after it is first requested to balance enable/disable.
Use disable_irq_nosync() anywhere dc->lock is held to avoid deadlock.
Change tegra_dc_update_windows() to always be balanced with
tegra_dc_sync_windows(). Sync points (from host1x) are potentially lost if
clock gated after update, generally this only affects applications that
update at a slow frame rate.
To balance update and sync calls, Colormap/LUT code now performs a
sync_windows on a LUT change, this makes LUT changes slower and take effect
immediately.
Add a nosync version of tegra_dc_dsi_write_data to be used within dsi
module.
Bug 1036025
Bug 1031933
Bug 1030415
Bug 1029041
Bug 1028716
Bug 1025621
Bug 1020592
Bug 1013506
Bug 1002768
Bug 955184
Bug 929609
Bug 899059
Bug 887342
Change-Id: Idc9b4c2922ad3d476d57fdf760acae76f0c837e2
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/146107
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
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