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Synchronize 3D wait base only when there is a timeout.
Bug 886411
Reviewed-on: http://git-master/r/62656
(cherry picked from commit 1f660b9ea615331624dcf8a923e7779fa3bcd48a)
Change-Id: I085342ae2d9808c1284d59222f968835bd469921
Reviewed-on: http://git-master/r/64060
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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After allocating pages, Update page attributes in kernel
page table as per mem type requested.
Bug 865816
Reviewed-on: http://git-master/r/56334
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
(cherry picked from commit bea4d449f4ff7090e0c2797693d2348f4586d8f6)
Change-Id: Ic1fe862412c09f57d1dbf05a1da98fd22d0d49a4
Reviewed-on: http://git-master/r/62720
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Hiro Sugawara <hsugawara@nvidia.com>
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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Flush needs to send error codes to user space instead of suppressing
them.
Bug 886411
Reviewed-on: http://git-master/r/62385
(cherry picked from commit 357f4f8c8cc31713a32a26488e7f2031e5fff842)
Change-Id: Ibec16d062242d2bdc7bc57cba7b264141decffc5
Reviewed-on: http://git-master/r/63219
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Set correct power state for modules during boot-up. This is done by
splitting nvhost_module_init() into two parts: preinit and init. Preinit
sets correct power state, and is called for all modules during boot-up.
Init calls pre-init and performs the rest of initialization of
nvhost_module structure.
Bug 855755
Reviewed-on: http://git-master/r/62102
(cherry picked from commit 003df5ddd4fcffca9b7456cdb1150cfc041f406c)
Conflicts:
drivers/video/tegra/host/nvhost_acm.c
Change-Id: I807f0c3608b1859bcbd7e8bfcb6ed27d6cdb1a80
Reviewed-on: http://git-master/r/63218
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Enable power gating for MPE and 3D in T30.
Bug 857044
Reviewed-on: http://git-master/r/62101
(cherry picked from commit 4fd4d2a948450f04181179f5f1e4da7b6c9e3060)
Change-Id: Ia9506fd188e31770d447faa25cf7b00adaca894a
Reviewed-on: http://git-master/r/63217
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Fix signature of show_channel_gather().
Reviewed-on: http://git-master/r/58398
(cherry picked from commit c1082bc73106b270b904cec80cca201a3caad472)
Change-Id: Ib16aaf411fba682e78b151f295c981783f0ebd58
Reviewed-on: http://git-master/r/63216
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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If an overlay is not being used, do not program the latency allowance.
This is to avoid underflows that occur at a resolution of 19x12. When the
unused overlays are reenabled, they underflow if the latency allowance has
previously been increased to a very high value.
(cherry picked from commit 8a4c47b17fae10a65e4816e419dff46b9f4785d1)
Change-Id: I825b4c1659a9f4f982bc66513b08b95879f17dd5
Reviewed-on: http://git-master/r/62522
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
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Add MIPI DCS short write (1 parameter) support.
The cmds sent with this new function will be sent every frame by hardware
Signed-off-by: Ming Wong <miwong@nvidia.com>
Bug 884157
(cherry picked from commit 855cac72bf030213db6fa1e42ce4e5891b16681c)
Change-Id: I5c4e8696195d01f4f9dfb8cf66b5b3744f78c41e
Reviewed-on: http://git-master/r/62300
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
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Temporarily disable support since it appears the
modeset to 1080p takes longer than anticipated.
Re-enable once issue has been fixed.
Bug 869099
Reviewed-on: http://git-master/r/#change,51833
(cherry-picked from change I4d596e33016a3723bca9bdb707cedd993a18f71b)
Change-Id: Ifa08a9bd9d0415e0f9f09b13c83e34d3ef4fc1a9
Reviewed-on: http://git-master/r/53891
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Dhiren Bhatia <dbhatia@nvidia.com>
Tested-by: Dhiren Bhatia <dbhatia@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Increase minimum loop count when checking for stuck syncpoint,
before triggering debug_dump()->BUG_ON(), to account for some
lengthy context-save operations. Now increased to
15 loops * 2s wait (SYNCPT_CHECK_PERIOD) per loop.
(Wait per loop may be less depending on user-specified timeout
for nvhost_syncpt_wait_timeout().)
Bug 834337
Reviewed-on: http://git-master/r/61412
(cherry picked from commit 5b13d80dc21855c52f53a67471453ea6e95e61f9)
Change-Id: Id4bab93ccc4eff22d2dd3a49b8c7df6cac95bff3
Reviewed-on: http://git-master/r/62367
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Add listing of wait bases and their values to debug output.
Reviewed-on: http://git-master/r/60389
(cherry picked from commit 16afc5516433d4a66d838c5a339ab8c07f4b42fa)
Change-Id: Ibdff91ee818a34acbe94a8a716e4cf7ca878d0d2
Reviewed-on: http://git-master/r/62366
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Add locking and checking for error codes to the output of
tegra_host/status debugfs entry, and clearing of freed memory.
Bug 840976
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/60231
(cherry picked from commit 811a722b7fe3e21357a8aa7b6cfb8b9f552b7de7)
Change-Id: I566eac09b1f93e577c9fd8d957c7b94dff16d05b
Reviewed-on: http://git-master/r/62365
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Add opcodes to synchronize the wait base for each channel at the
beginning of each submit. This adds robustness towards misbehaving user
space.
Context clear for robustness clears the opcodes for synchronizing the
wait base. This change also removes that part of robustness.
Bug 886411
Reviewed-on: http://git-master/r/60423
(cherry picked from commit c3740abf73ef6b7fd9b7de5bc4b6615ba25adf5e)
Change-Id: I339489a4156eef8529f01b29453f46b875389718
Reviewed-on: http://git-master/r/62364
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Add hwctx pointer to timeout structure. This makes sure the correct
hardware context is cleared.
Bug 886411
Reviewed-on: http://git-master/r/61449
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
(cherry picked from commit 7e2fb5bb2985373e869079ee7c628c1694216f21)
Change-Id: I285915ea7691dfac26caeec82bd3ea6c2ea0cc58
Reviewed-on: http://git-master/r/62363
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Add extra syncpt debug info and kernel panic when device stuck
waiting at syncpts.
Tested by inducing syncpt stuck-wait by bypassing nvhost_syncpt-
_cpu_incr.
Bug 822880
Bug 820056
Bug 818058
Bug 810463
Bug 803452
Reviewed-on: http://git-master/r/60206
(cherry picked from commit e73caae974f43ac5bf30589fc3cbc1fa66df926e)
Change-Id: Ia9a99cad17cbf49bf2fb860f783d0e94de0cec8e
Reviewed-on: http://git-master/r/62355
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Add timeout to throttling low-priority thread. Low priority threads are
allowed to push work either when push buffer is empty, or when they've
waited for a pre-defined period. Setting the period to 50ms for now.
Bug 864407
Reviewed-on: http://git-master/r/58330
(cherry picked from commit a9469db8c4c04fa7cd8f080bafdca26d99a3018c)
Change-Id: I80034188f177ae8721799a085baac0790da1f3b4
Reviewed-on: http://git-master/r/62351
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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This patch is based on "video: tegra: dc: use mask to control
interrupts", so we do not use DC_CMD_INT_ENABLE to disable IRQ.
Bug 888207
Bug 870801
Reviewed-on: http://git-master/r/58176
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
(cherry picked from commit 6feaad5a74a934f604f5d25220afff478c43736d)
Change-Id: I6b7eba2bcca89be2177e3f1c3a672151248848ad
Reviewed-on: http://git-master/r/62236
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>
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Use the enable irq register during init, and mask irq register to
control the interrupts to avoid a race in clearing interrupt status.
Clear mask and enable during DC disable.
Bug 888207
Bug 870801
Reviewed-on: http://git-master/r/57603
Reviewed-by: Xin Xie <xxie@nvidia.com>
Tested-by: Xin Xie <xxie@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit 4640498bd8d46b6c5c1898d8ca8c9760416d1eae)
Change-Id: I9ccf103a9cfcb9fda7f2247a370d9ccde12d611f
Reviewed-on: http://git-master/r/62235
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>
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This includes Get/Set clock rate functionality.
Removed the abstraction and added functionality for
T20 and T30 into nvhost_acm file
Bug 887263
(cherry picked from commit 5f59da121b14dc6263d67da12ea7071141ee9e6c)
Change-Id: I7226cbea0eb60d81f4a690f386ae801a6b37fc07
Reviewed-on: http://git-master/r/61471
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Separate clock and power gating from each other. There are now two
timeout values related to power management:
* clockgate_delay: how long to wait before clock gating
* powergate_delay: when to save context and power gate
If the module does not support power gating, that state is not used.
System suspend also explicitly power gates all channels before
suspending host1x.
Bug 875675
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/53195
(cherry picked from commit eda8a5ccc474bc60d76e241f292573a8b6f30ab6)
Change-Id: I9460b1427e6e3b5a2e41b62a767338e7945b6594
Reviewed-on: http://git-master/r/60393
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Wait for CDMA to become idle before freeing resources associated with a
channel.
Bug 877665
Reviewed-on: http://git-master/r/56653
(cherry picked from commit f40fe779ee2997c38a990b7270e55705517de574)
(cherry picked from commit 0247e44bb8ce794ea1bd470a5c678db7472410d4)
Change-Id: Ifaeb549dbafb5dcd714e51a28a1f69cc393dd750
Reviewed-on: http://git-master/r/60392
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Add interface for setting priority of a channel. When the priority is
low, wait for channel to become empty before submitting it.
Bug 864407
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/57237
(cherry picked from commit 75228616ee2c3073e391c529aecb3f82be3fc5a4)
Change-Id: Ife8057586bfc3be02f772034bd2c497b2c59f7aa
Reviewed-on: http://git-master/r/60391
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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By default Tegra graphics host driver is turned on. This
CL removes the default 'yes' for this driver. However,
the option is turned on in defconfig files, for an easier
out of box experience.
Bug 888777
Change-Id: I5c7d5d83742a3c6ba91b43abb45e7afc8d2068b5
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/57956
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>
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Adds phase_in_video field that slowly phases in changes to the
pixel modification and backlight values. This should only be enabled
during video as its results with content that has non-deterministic
time between frame updates is sub-optimal.
Bug 888294
Reviewed-on: http://git-master/r/57596
(cherry picked from commit e22fc24a34f4799c7c61da917a9a6e6ff8211ecd)
Change-Id: Ie1abd097651b3d8bb98c7d0c0e73580c72392a5c
Reviewed-on: http://git-master/r/58426
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Allows DIDIM to keep track of multiple aggressiveness settings
based on different priority levels. Four Priority levels are supported
and the maximum priority currently specified overrules the other settings.
Lowest priority is given to the default kernel value and user specified values.
Bug 888292
Reviewed-on: http://git-master/r/57130
(cherry picked from commit 555a50c0fe4840d4de41c789bc472cda2902ed31)
Change-Id: I869034d913a4a324441f5945ccde5bd3e11eb697
Reviewed-on: http://git-master/r/58425
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Adds checks for memory allocation failures, and proper propagation
of error conditions. Adds clearing of pointers after free or unpin
has been called to catch use after free.
Bug 877551
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/54027
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Gerrit_Virtual_Submit
(cherry-picked from commit bfbf2766d11a5f85781532ddce3a87b7ae762ba3)
Change-Id: Ibb8d14ef9a21d38d08748941e23d86c7c3a700ea
Reviewed-on: http://git-master/r/58309
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Context to be restored needs to be reference counted. Otherwise a
sequence of process submitting the work and exiting before hardware
executes the work can result in access to memory that is not mapped
anymore.
Bug 870787
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/55706
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit 02331c00e0233c09fdeea8cce65f2c0abc50d358)
Change-Id: I81858c2cc583dc7ab706c1e905014d8d158c36f6
Reviewed-on: http://git-master/r/58308
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Use pll_d_out0 for HDMI instead of using pll_d2_out0 which is not available T20
Bug ID : 875270
Change-Id: I81f680353c5ba319f0ed8169522ab83f590d23e2
Reviewed-on: http://git-master/r/57401
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Tested-by: Hyungwoo Yang <hyungwooy@nvidia.com>
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Bug 834959
Reviewed-on: http://git-master/r/54861
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
(cherry picked from commit 8f2ce3c04c16331332d4ba12f097787fd82af2db)
Change-Id: I01fe3e9f9e1e4772e1ae95b0e47f6f17ccee5689
Reviewed-on: http://git-master/r/56732
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Reviewed-on: http://git-master/r/54824
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
(cherry picked from commit 4681815651f5949840815a03698d55ec8186796c)
Change-Id: Ia3da8b5d6eb17b513e55fdc2fffcb2b30bde8b44
Reviewed-on: http://git-master/r/56731
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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V_BLANK_INT was used to mark frame end for other tasks. However, it occurs at
frame start. Switch to FRAME_END_INT to mark the end of frame.
Bug 875448
Reviewed-on: http://git-master/r/52694
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
(cherry picked from commit 078a2688c67c46cf840f191405cd4324cb9c4574)
Change-Id: I1b1b4bf5ad9c6e9be94ce0eef981b711e9c0002a
Reviewed-on: http://git-master/r/56730
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Bug 873860
Reviewed-on: http://git-master/r/52135
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Robert Morell <rmorell@nvidia.com>
(cherry picked from commit 92ec78210ee1526dc2c35b7775674105aa6f729b)
Change-Id: I9f6ef0e90b3ea5f921ef5138d665dea88a1c5b08
Reviewed-on: http://git-master/r/56729
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Increase the bit field width to 2, to accomodate all possible
status for LP read.
Reviewed-on: http://git-master/r/54223
(cherry picked from commit 944d343216efbc12ba78b4bbb8b52601847b6725)
Change-Id: I35f4a692474032195ab8ab4eada4d1f5266d2fc5
Reviewed-on: http://git-master/r/56563
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Tested-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Only clear the display when ioctl FBIOBLANK is FB_BLANK_NORMAL is used
This indicates that display should still be powered on and is useful
when HDMI audio needs to remain active but no content is displayed on
screen.
bug 857117
bug 868916
Reviewed-on: http://git-master/r/53608
(cherry picked from commit 234a39002a5a4daa364271ed357de14cff06f6a9)
Change-Id: I28b71c693681852933158aa4491a0d164ce64a8f
Reviewed-on: http://git-master/r/56443
Tested-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Collect individual underflow counts for underflow statistics to provide
a more accurate number of underflows. Changed stats to use 64-bit numbers
due to the larger numbers involved, about 100x from previously.
Reviewed-on: http://git-master/r/52940
(cherry picked from commit 1d39d430ad90a027be43323f65eef85a3a30faab)
Change-Id: I970e842aef12bd1ff4822bd8cdde3f2bbcc66a8a
Reviewed-on: http://git-master/r/56442
Tested-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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This reverts commit 30ab4d7479b6edf27495e701a095e6b3102cf5e4.
Reverting it as Camera team seem to have issues.
Bug 865816
Reviewed-by: Michael Stewart <mstewart@nvidia.com>
Tested-by: Michael Stewart <mstewart@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
(cherry picked from commit 74d7b1440d4719bd258a34d1a5cafa10488e2d9d)
Change-Id: I41e2c63c4f8d9902e7afe33221e4991f3976b3d9
Reviewed-on: http://git-master/r/56338
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Power gating of 3D and MPE on Tegra3 was accidentally enabled. Disable
power gating.
Bug 877488
Change-Id: Id18ee908f87f9f3d8753159533ae03a48b82b9bb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/52827
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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bit WRITE16 of HDMI_NV_PDISP_KEY_CTRL_0 shall be polled until it
reports DONE, which is value 0 to ensure the write is complete.
bug 858744
bug 861719
(cherry picked from commit b0301fcb512f4fa083c217edf7dae2edd52323bb)
(reviewed on http://git-master/r/52854)
Change-Id: Ibb0ce6a9d25c64ef88eab4e2a46e4b3c70797633
Reviewed-on: http://git-master/r/54689
Reviewed-by: Artiste Hsu <chhsu@nvidia.com>
Tested-by: Ken Chang <kenc@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Settings in DIDIM driver are now phased in over a defined
number of steps in order to minimize the perception of changes
to the settings during runtime
Bug 840155
Reviewed-on: http://git-master/r/52495
(cherry picked from commit a33d4f5c677b657751fd017f8419df88016122a5)
Change-Id: Ie738444d883955b15b1c5dd9825233b71d656b84
Reviewed-on: http://git-master/r/54294
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Matt Wagner <mwagner@nvidia.com>
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Resolution wise the pixel clock of the peripheral and supported resolution
mode if found different was checked whether in permissible range or not.
PICOS2KHZ macro argument is taken as denominator in division, in multiple
argument case care should be taken.
Bug 878912
Similar Bug 872389
Change-Id: I0b481c3fc8ac6d001cd23566f82822bc99f4bb7e
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/54050
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Donghan Ryu <dryu@nvidia.com>
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Don't allow root user allocating more than iovm limit to avoid pin
time issues.
Bug 864535
(cherry picked from commit 21e30b0910d6ee38eb7f1e68e21507a80758c74d)
Change-Id: Iad02b5e06ff4f2ab7bf2d3d99875bb3bf018c5ab
Reviewed-on: http://git-master/r/53855
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
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After allocating pages, Set page attributes as per mem type
requested.
Change-Id: I972ec3613e529b64ba7d1d417c06c235fe1d3633
Reviewed-on: http://git-master/r/49882
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Mark the dependencies of dc driver on switch class explicit,
using proper pre-processors.
Bug 877239
Change-Id: I977f24173a0e19f3371afbd82c70bdc00aad41f4
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/52679
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>
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Bug 871094
Change-Id: I9bb194c5a56477adfdcbca74117e9d473c1354eb
Reviewed-on: http://git-master/r/52492
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Android framework code has been modified to no longer need kernel
support. Removing that support.
This reverts commit d827065381dbcd0d4884267b86397fb2af009c21.
Change-Id: I7fd9b13505dba6b8767316b526d36c5affde9914
Reviewed-on: http://git-master/r/51731
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Various attributes of windows which are currently being updated are
displayed with these debug messages. It also adds debug messages to
show processes using overlays.
Change-Id: I36518320bbf46fb5c1041176c91323d7bbabdc7a
Reviewed-on: http://git-master/r/51979
Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Refactor nvhost_acm.c so that module specific code can be separated from
generic code:
* Module clock and power op descriptions added to channelmap table
* New module busy/idle interface added
* 3D clock scaling for Tegra3 moved behind the module busy/idle API
* 3D power off code moved to 3dctx where it belongs
* Module power on API removed as there were no users
* Get/Set rate moved to Tegra3 specific file
Bug 870791
Change-Id: I2c1612dcadd90046f43f9d81ff790a6d9e7d9804
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
(cherry picked from commit b01476638647e10cfc914da9e0c75996e0e71ae6)
Reviewed-on: http://git-master/r/50280
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Ilan Aelion <iaelion@nvidia.com>
Tested-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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GRHOST should be buildable without IOVMM (i.e. with carveout only)
Bug 870898
Change-Id: I1f40b8356b0bb75b42379a0aa79bd410b395c53f
Reviewed-on: http://git-master/r/49478
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Made kernel boot up with CONFIG_TEGRA_IOVMM=n
Change-Id: I02dead119bc232622abf494d29cbe4d4b13d7131
Reviewed-on: http://git-master/r/49476
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Change-Id: I40505c002c70a0c985889bba527f6ca9975fe66b
Reviewed-on: http://git-master/r/51026
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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