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On k32, remote wake up is enabled in the descriptor based on gadget->ops. Since,
remote wakeup is not supported, disabled gadget->op->remote_wakeup based
on USB_ANDROID.
Bug 710624
(cherry picked from commit c0340053278c9c9ceb98772cc3566d298dca4d9a)
Change-Id: I760632dd38a9f56dadfbb4d446e83f28cdb5338f
Reviewed-on: http://git-master/r/7556
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Tested-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
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Keep enabling the kc controller only if any of keys are configured
as wakeup source during suspend.
bug 735233
(cherry picked from commit 13825a46587b0508aa7a43054964b76524d5f2b6)
Change-Id: I028965400ee4f96c1460f8e261a2376943384030
Reviewed-on: http://git-master/r/7499
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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A new driver is implemented to actively manage the bluetooth module
power. bluesleep also tries to manage the power of the transport used.
Two signals (GPIOs) are used to manage the power events.
BT_WAKE : signal from HOST to BT chip to intimate BT chip can sleep.
HOST_WAKE: signal from BT chip to HOST to intimate HOST should wakeup/
activate the transport modules required for BT communication.
Bug 680524, 691608
(cherry picked from commit 111f4ccd3c4cfde2fa52ae4c0c56a2288c3af3a8)
Change-Id: I5edba2aa18c566f0ebfc4ecf9c54149ee3376666
Reviewed-on: http://git-master/r/6850
Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Anantha Idapalapati <aidapalapati@nvidia.com>
Tested-by: Anantha Idapalapati <aidapalapati@nvidia.com>
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Moving the isl29018 from hwmon to the staging/iio/light driver.
Replacing the hwmon registration with iio registration and doing
required changes to make it iio driver.
bug 728678
(cherry picked from commit 2c72f7dff2b74375b35936cd4c94a891f169009d)
Change-Id: I223d4451b62f2260cd2f9ee2ed8ba77ec8672b52
Reviewed-on: http://git-master/r/7109
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Following are changes:
- using smbus api to read/write from/to device.
- Adding proximitysensing with scheme 0 and 1.
- Adding ir sensing.
- Removing the undesired definition and code.
- Remove gpio initialzation and usage.
- Sysfs interface for setting range/resolution/proximity scheme.
- sysfs interface for reading lux/proximity ir and ir.
- General code cleaning.
(cherry picked from commit 0a148f035c9284cfa0e60e875052d6768267d731)
Change-Id: I0d84f534a14b85e5a6bcea3218ecd8d864c0a103
Reviewed-on: http://git-master.nvidia.com/r/7102
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Reduced ACM timeout to 2ms (from 1sec). This is necessary to detect
host / 3D idle under frequent activity bursts.
Bug 735111
Bug 726052
(cherry picked from commit 1ff7aa46f02f61f070ae41abd8e0a36d4a4f1f3d)
Change-Id: I711286925776c2955f7c43acae0cb8b2c1763e4a
Reviewed-on: http://git-master.nvidia.com/r/7007
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Niranjan Wartikar <nwartikar@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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limit the number of times adb_open and adb_release may be printed
in a short period of time, to prevent adb death spirals when
exiting suspend
(cherry picked from commit 3a1e33f6715f7133ba9fe26d68342c1ff6106b20)
Change-Id: I575f38269c9a4c46a3a59ff7a06c8bda36a0c0d4
Reviewed-on: http://git-master/r/6723
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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When user doesn't use default heap policy and selects
GART or carveout allocation, automatic single-page-to-sysmem
rule doesn't work. Because of broken rule many single page
allocations go to GART and carveout.
The fix adds sysmem bit to heap mask when allocation is
single page and GART or carveout is present in heap mask.
bug 730124
bug 731923
(cherry picked from commit 3ca9989c922420a57215d297189738a0464c4073)
Change-Id: I2ea8018ae5ed9d31e90659479d0e44052ebf9431
Reviewed-on: http://git-master/r/6701
Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com>
Tested-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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add a driver for the hardware watchdog timer embedded in NVIDIA
Tegra SoCs
Change-Id: I40730213119b4f325e3de008a5efb28f5d578b1c
Signed-off-by: Gary King <gking@nvidia.com>
Reviewed-on: http://git-master/r/6305
Reviewed-on: http://git-master/r/6705
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bug 715382
Integrate from tegra-2010-07
Change-Id: I790bd0e6ff5ddd9513ae7a5ddfce491dcd1e32b3
Reviewed-on: http://git-master/r/6673
Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com>
Reviewed-by: Antti Hatala <ahatala@nvidia.com>
Tested-by: Antti Hatala <ahatala@nvidia.com>
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When system runs out of dma and uart driver tries to allocate
dma, the dma allocation fails. In such case, the uart
communication should work with interrupt based -non dma mode.
bug 730003
(cherry picked from commit 4a9d5633474c806799ccc6d167f3d624c92d560c)
(cherry picked from commit 2000a076103c559446d11ad49debc4e0f2952e8a)
Change-Id: I96c2a3f79fd9044e3b54771b60cad7dcb12f517b
Reviewed-on: http://git-master/r/6599
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Harry Hong <hhong@nvidia.com>
Tested-by: Harry Hong <hhong@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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[bug] 729378
Change-Id: I34d276d2552491c933983309df0fe31f7bf3ba7e
Reviewed-on: http://git-master/r/6443
Reviewed-by: Andy Carman <acarman@nvidia.com>
Tested-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Adding the valid pointer checks before accessing the pointers
which is passed when public apis are called.
Also resetting the pointers to null once the allocated handles
are freed.
(cherry picked from commit 0954407534a757b316bc35a0232968feed23243a)
Change-Id: Ib8b99f0556fb9a98c74ba8911a00879451fad9e5
Reviewed-on: http://git-master/r/6578
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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When uart_close() or uart_suspend() calls the tegra_uart_suspend()
the drivers waits in tight loop for tx to be empty. This wait is
not required because serial_core driver have already waited for the
tx fifo to empty with proper timeout before calling these function.
bug 730612
(cherry picked from commit 13387c532dfb35dc672b290aec8b7a4db49730d6)
(cherry picked from commit ddd896c933e3f8d5fb28948ad957ec12b3d881cd)
Change-Id: Ie898ad0a134684844bf80ae00a1c8dd4b02a605a
Reviewed-on: http://git-master/r/6372
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Harry Hong <hhong@nvidia.com>
Tested-by: Harry Hong <hhong@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Replaced assert on powering down of already powered off module with
skipping the power down procedure in this situation is detected. WAR
for bug 727964.
(cherry picked from commit c562c8fdf58a552fe9ba1c62ffec66e0b67447e5)
Change-Id: I2f55052d38874bf196bc89a06fa478aa3e9783c2
Reviewed-on: http://git-master/r/6283
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Added nvhost device resume function, and moved syncpoints restoration
here from run-time power_host() control. Respectively added syncpoints
saving to nvhost suspend procedure. This change is required, since
power_host() has no way to account for display advancing syncpoints
after they have been already saved.
Bug 726052
(cherry picked from commit 629bbd439e1bb156a8cfce3de9384e42586d4f42)
Change-Id: I6149cfa1bff72cb9b5e9e9da0f302c7d8a3032a0
Reviewed-on: http://git-master/r/6282
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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MSD write performance is decreased due to the file_sync() called in the write
path this is introduced in the K32. After removing this write performance is
increased and it is back to K29.
Bug 727609
(cherry picked from commit 3674a60b8d4ede5d9305bf59a205e9f16e025f2a)
Change-Id: I99e63302e1b189b600163c216847eae437e86a9f
Reviewed-on: http://git-master/r/6246
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Tested-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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The block realignment if a block wasn't split lead to a slow leak of carveout memory if the previous block was not a free block.
Change-Id: I08bd89364932f2c4fc4faf1dec177dab03e82a9a
Reviewed-on: http://git-master/r/5851
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Thomas Roell <troell@nvidia.com>
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On resume restore SDHCI interrupts to the state which
was before entering into suspend for SDIO (always_pwr_on)
slot. Also, in suspend keep CARD_INT enabled if it was
before going to suspend, so that it can be used as wake
source.
Broadcom wifi driver does not disable/enable SDIO_INT
on early_suspend/late_resume, it requires SDIO INTs to
be enabled on resume, as even before broadcom driver's
late_resume is called which puts wifi is high_pwr, it
needs to communicate with MAC for incoming IOCTLs from
wpa_supplicant.
Bug: 723708
Change-Id: Id1bfe67f415080eeb7563428322dbec3df0f27d2
Reviewed-on: http://git-master/r/5407
Reviewed-by: Rahul Bansal <rbansal@nvidia.com>
Tested-by: Rahul Bansal <rbansal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Suspending the device nct1008 before going to suspend
and reconfiguring at the time of system resume.
This is implemneted for the nct1008 which is adt7461 type
device.
Change-Id: Iecfb33819d0427e2ab2bb1f8eed0066222e5793f
Reviewed-on: http://git-master/r/4800
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Address should be calculated based on pitch not width
Bug 709201
Change-Id: Ic2a73a9f665d212595bf4b61eeb7ea2984df7548
Reviewed-on: http://git-master/r/5718
Reviewed-by: Daehyoung Ko <dko@nvidia.com>
Tested-by: Daehyoung Ko <dko@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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To improve the performance in receive path, the uart configures
the dma in the continuous double buffering mode. The dma keep
filling the same buffer in continuously and inform uart driver
when half of buffer completes.
Change-Id: Iff7c9433766f272384fc1a329ff1db8031987544
Reviewed-on: http://git-master/r/4419
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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When CONFIG_USB_SUSPEND is enabled USB device detection is not working. This is
due to the wrong API called to resume the hub and HUB resume funtionality not
happening properly. Fixed this by calling the correct API to resume the HUB
driver when auto suspend is called.
Bug 713237
Bug 713966
Change-Id: Ia4d091fd29ea7ebfe5844cf5685fc5a86e66d12a
Reviewed-on: http://git-master/r/4984
Reviewed-by: Abhishek Aggarwal <aaggarwal@nvidia.com>
Tested-by: Abhishek Aggarwal <aaggarwal@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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The ON semiconductor's temperature sensor NCT1008 is
driver compatible with National semicondutor's LM90
driver.
Adding NCT1008 as the list of lm90 driver id table.
Change-Id: I3dcbe1cdd1441e5196239551265444ebb633a1a2
Reviewed-on: http://git-master.nvidia.com/r/5080
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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For each channel submit where null kickoff is requested, we don't
place the user's commands in the pushbuffer. All necessary context
switches, syncpoint increments and waitbase increments do happen
though.
Bug 717235
Change-Id: I51c323729ea57993a5b52fb395ab90cb8608ee6b
Reviewed-on: http://git-master/r/5091
Reviewed-by: Antoine Chauveau <achauveau@nvidia.com>
Reviewed-by: Antti Hatala <ahatala@nvidia.com>
Tested-by: Antti Hatala <ahatala@nvidia.com>
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Added suspend and resume functionality to tegra
accelerometer, for supporting LP0 on Ventana
tested on Ventana-C
bug 716080
Change-Id: Ib57b3f2f0d3bec77839f40226f79cd60e222a366
Reviewed-on: http://git-master/r/4836
Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Sometimes, in uart, the desired baudrate can not be configured
in 5% error accuracy due to not finding the correct combination
of clock source freq and integer divisor. In this case the driver
should generate the error message.
Change-Id: Iafe245876a2cb9810c1025c02a4b6a36eb26aa4c
Reviewed-on: http://git-master/r/4974
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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As Threshold settings are done in a common place for
different accelerometers, removing it. Need to add threshold
settings to individual ODM driver based on the need.
Bug 721469
Change-Id: I6fe20c4e501208dde9fcf47ac3e31bdf81343efc
Reviewed-on: http://git-master/r/5082
Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Change-Id: I69bfed3522d7d2082530204d8f568458f2966638
Reviewed-on: http://git-master/r/5094
Reviewed-by: Andrew Howe <ahowe@nvidia.com>
Reviewed-by: Antti Hatala <ahatala@nvidia.com>
Tested-by: Antti Hatala <ahatala@nvidia.com>
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For the power managementi functionality for the device magnetometer ak8975,
added the power suspend and resume functions.
Change-Id: I40bc799d77dcbcc419200d9a6b6622415b520246
Reviewed-on: http://git-master/r/4790
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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To support wifi connectivity on system suspend
resume for always powered on SDIO cards.
Added card_always_on flag. This flag will prevent
SDIO de-init/re-init in suspend/resume.
If this flag is not set, then SDIO
card is de-init/re-init on suspend/resume.
Change-Id: Ib092fa9e0bc63ba781e0f4b6637dad0231303ba9
Reviewed-on: http://git-master.nvidia.com/r/4257
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Deepesh Subhash Gujarathi (Engrg-Mobile) <dgujarathi@nvidia.com>
Tested-by: Deepesh Subhash Gujarathi (Engrg-Mobile) <dgujarathi@nvidia.com>
Reviewed-by: Rahul Bansal <rbansal@nvidia.com>
Tested-by: Rahul Bansal <rbansal@nvidia.com>
Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com>
Tested-by: Victor (Weiguo) Pan <wpan@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Tested-by: Venkata (Muni) Anda <vanda@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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If the open of tegra odm battery driver fails, we are failing the probe
of tegra-battery without unregistering the tegra power supplies which
causes errors during boot.
Fixed this by moving the call to open tegra odm battery driver and its
failure check before we register tegra power supplies.
Bug 715515
Change-Id: Ie11c860fa692b3b707ce79796e2713366107bdec
Reviewed-on: http://git-master/r/4839
Tested-by: Abhishek Aggarwal <aaggarwal@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Reviewed-by: Phillip Smith <psmith@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Sometimes, when uart ask for the dma for get the number of bytes
transferred by dma, the dma does not return the actual number of
bytes transffred, it returns the less number of byes (less by
burst size) and so uart driver client gets the data loss in
communication.
So to avoid the race condition, the driver stops the incoming data
by making RTS line to inactive and wait for some time to complete
the dma burst and then ask dma to get number of bytes transffred
by dma from fifo to memory.
Change-Id: I08de955fde77431115626bd884b68c8e42d52270
Reviewed-on: http://git-master/r/4832
Reviewed-by: Anantha Idapalapati <aidapalapati@nvidia.com>
Tested-by: Anantha Idapalapati <aidapalapati@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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On tegra uart, the FCR setting for different tx trigger level
is not same as the 16550 tx trigger level setting. The tegra
uart have the setting in reverse direction on tx fifo attention
level:
b00 for 16 bytes attention level.
b01 for 8 byte attention level.
b10 for 4 byte attention level
b11 for 1 byte attention level.
The rx trigger attention level match with the standard uart
FCR register setttings.
Also fixing the typo in code when setting DTR.
bug 717072
Change-Id: I3e5230de71652e3216949734f4eaca8b85e03d99
Reviewed-on: http://git-master.nvidia.com/r/4753
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Anantha Idapalapati <aidapalapati@nvidia.com>
Tested-by: Anantha Idapalapati <aidapalapati@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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The write accessor function uart_writeb() and uart_writel() is
doing the read of the same address on which it is writing the data.
This is causing unnecessarily read of rx fifo and so causing data
loss in rx path if tx fifo is getting written by cpu. This is
happening becasue of rx fifo and tx fifo address are same.
Change-Id: I194363872d0fd251ddd15a40f42e58acd5ccc7a1
Reviewed-on: http://git-master/r/4746
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com>
Reviewed-by: Anantha Idapalapati <aidapalapati@nvidia.com>
Tested-by: Anantha Idapalapati <aidapalapati@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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On cable disconnect, the controller was stopped but on cable connect it
was restarted only if OTG is enabled. Due to this for non-OTG mode, the
USB device was not working after disconnecting and re-connecting the
cable.
Fixed this by restarting the controller for both OTG and non-OTG modes.
Bug: 717685
Change-Id: I4ba83e96cfe9a559b203615a2d78d0ed582a20a7
Reviewed-on: http://git-master/r/4708
Tested-by: Abhishek Aggarwal <aaggarwal@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Tegra framebuffer is double buffered (two contiguous
framebuffers), so panning needs to be implemented.
Each call to tegra_fb_pan_display also needs to cause
a frame trigger in the case of one-shot displays.
Change-Id: Ica110acd53f292505e487a0ca25adcb3f7a9d9aa
Reviewed-on: http://git-master/r/4223
Tested-by: Arthur Spence <aspence@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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The graphics hardware modules on Tegra family of SOCs are accessed via
the host1x dma and synchronization engine. This driver exposes an
userspace interface for submitting command buffers to 2d, 3d, display
and mpe hardware modules and accessing the module register apertures
for exclusive use hardware modules.
Additional features of the driver include:
- interrupt-driven hardware module usage synchronization
- automatic clock management for hw modules
- hardware context switching for 3d registers
Change-Id: I693582249597fd307526ff3c7e35889d37406017
Reviewed-on: http://git-master/r/4091
Reviewed-by: Janne Hellsten <jhellsten@nvidia.com>
Tested-by: Janne Hellsten <jhellsten@nvidia.com>
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Generate mmcblk[%d] names based on sdhci controller instance numbers.
Bug 700011
Change-Id: I2be0c88f45cb2044306b1f8b8fe98ee95a800e0e
Reviewed-on: http://git-master.nvidia.com/r/4274
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Implementation using internal RTC(real time clock).
Alarm wake up from lp0/lp1 is supported.
Use option CONFIG_RTC_DRV_TEGRA to enable.
Tested as working on E1108 A02 and E1109 A01 boards.
Bug: 607035
Change-Id: I4c048439fd87f7df1918983f565dc7ca566fdf4c
Reviewed-on: http://git-master.nvidia.com/r/3899
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Tested-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Signed-off-by: Zhangfei Gao <zgao6@marvell.com>
Reviewed-by: Matt Fleming <matt@console-pimps.org>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Change-Id: Ie20a9aea9ac6811bc6d4f0a96d60f9f226024747
Reviewed-on: http://git-master.nvidia.com/r/4482
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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The GPIO port R pin 6 needs to be set low for charging of battery on ventana rev C
Change-Id: I2ac17494f65f550d5bf676ae8ec09819983b72ac
Reviewed-on: http://git-master/r/4171
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Regulator current limit uses mutex, which is called from the irq after acquiring
the spin locks. Similarly when vbus is detected phy clock enable is called,
which uses mutex inside the spin locks. This is fixed by calling these apis
under work when called from interrupt context.
Bug 711837
Change-Id: Ib926ad33d3d3674353447b3d94ff63f9eecf6f65
Reviewed-on: http://git-master/r/4339
Tested-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com>
Tested-by: Ramachandrudu Kandhala <rkandhala@nvidia.com>
Reviewed-by: Frank Cheng <fcheng@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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with out this change, we would only support signal mode 0...
Change-Id: I2cd2c9a3e30da94f2e95a654f3154fd33e940f13
Reviewed-on: http://git-master/r/4286
Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com>
Reviewed-by: Sheshagiri Shenoy <sshenoy@nvidia.com>
Tested-by: Sheshagiri Shenoy <sshenoy@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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After resume from LP0 VBUS and ID interrupt enable bits are cleared and are not
enabled. So cable connect/disconnect is not functional after resume from LP0.
This is fixed by enabling the interrupts during the resume functionality.
Bug 712862
Change-Id: I67fd63f4daefbb811757c675538071371242c428
Reviewed-on: http://git-master.nvidia.com/r/4266
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Setting OTG state to device mode on resume from LP0 if VBUS is detected during
LP0 resume.
Change-Id: Ib029e6ea5b1d3e4b5c4b5c913c71e2789106a426
Reviewed-on: http://git-master/r/4247
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Adding rfkill Implementation for Broadcom BT chip (BCM4329) in
existing code.
Change-Id: I9a59052ca440124a1039255c72aa7cb00a015416
Reviewed-on: http://git-master/r/3883
Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Change-Id: I353d5ff87243c3098100320b2cd184b47b471e84
Reviewed-on: http://git-master/r/4182
Reviewed-by: Gary King <gking@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Tested-by: Jonathan Mayo <jmayo@nvidia.com>
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change to subtract the boot partiotion size from the entire device size
so that proper device size is reported.
updated the code as per suggestions from Gary, removed the comment
bug: 683019
Change-Id: Iaa1a8d773dc1b876eb1da55823ff44a7f745d234
Reviewed-on: http://git-master/r/3496
Tested-by: Nitin Ghate <nghate@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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After long time of executing LP0 cycles some times device fails to handle the
udc irq in OTG mode. This is due to the OTG state which is changed to unknown
before the controller is completely stopped. Fixed this by setting OTG state
properly to unknown only after disabling the interrupts and stopping the
controller completely in suspend path.
Change-Id: I4baf2f29857cd35937acc67aca7c01077e362be1
Reviewed-on: http://git-master/r/4016
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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