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SVN value (0x3) defined in fsl host controller on mx6dq/mx6dl differs from
the one (0x2) defined in sdhc specification.
- original 0x11 is an incorrect value, it should be 0x3
Note: mx6sl has no such issue because it's fixed by IC, in other word,
mx6sl aligns with sdhc specification.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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When vf_rotation > IPU_ROTATE_VERT_FLIP, canncel the MEM_ROT_VF_MEM
- MEM_FG_SYNC channel link and using IPU_IRQ_PRP_VF_ROT_OUT_EOF irq
to trigger double buffer switch.
When vf_rotation <= IPU_ROTATE_VERT_FLIP,cannel the CSI_PRP_VF_MEM
- MEM_FG_SYNC channel link, and using IPU_IRQ_PRP_VF_OUT_EOF to
trigger double buffer switch.
Signed-off-by: Yuxi Sun <b36102@freescale.com>
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Get the ipu device which the display frame buffer is on before start
preview, then request the correspondding display channel irq.
Signed-off-by: Yuxi Sun <b36102@freescale.com>
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Add 3 overlay output item for IPU2: DISP4 BG, DISP4 BG - DI1,
DISP4 FG.
Signed-off-by: Yuxi Sun <b36102@freescale.com>
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Merge vivante 4.6.9 kernel part code
Updated clock management code
Updated gpu reset code
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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usb driver part
- After USB driver prime a bulk transfer(whatever IN or OUT, take
OUT for example) on ep1, only one dTD is primed, an USB Interrupt
(bit 0 of USBSTS) will be issued, and find that endptcomplete
register is 0x2 which means an OUT transfer on ep1 is completed,
at this time the ep1 out queue head status is 0x1e18000, and next
dtd pointer is 0x1 which means transfer is done and everything is
OK, while the dTD token status is 0x2008080 which means this dTD
is still active, not completed yet.
- Audio SDMA and Ethernet have the similar issue
- root cause is not found yet
- work around:
change the non-cacheable bufferable memory to non-cacheable
non-bufferable memory to make this issue disappear.
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
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- the root cause of this issue is there is no protection for
the resource which will be accessed by multiple thread
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
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- communication between the usb driver and msc class driver is using
raise_exception/handle_excpetion, such mechaism can only have two
events(exceptions) at most, one is on processing and another is store to be
executed after the current one completed.
If the first one processing is very slow, and the third one occur, then the
second one will be overwriten by the third one and then the second event is
lost and then enumeration failed
- since it is the linux community code, it is hard to change the whole frame
work, currently only a work around is provided
- because this issue is brought in when the first reset event, when this
event occur, a lun sync will happen and it will cost much time, but in fact
this lun sync is not necessary for the first reset event, the work around
is to skip this lun sync.
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
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- the response in csw to request sense will be 1 due to UTP change
some storage information
- host will reset the bus if response to request sense is 1
- change the response to 0 if CONFIG_FSL_UTP is defined
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
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Revert to rngc code before as we will add dummy clock for it.
Signed-off-by: Terry Lv <r65388@freescale.com>
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this battery property provides battery capacity low/normal/full status
Signed-off-by: Rong Dian <b38775@freescale.com>
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RNG4 requires a kickstart process to transition into running mode.
In the case that this kickstart process errors, the driver is shut
back down (under the assumption that internal random padding of keys
or data cannot occur).
In an isolated case, the kickstart failed to start the RNG, an error
was returned, and the driver attempted to de-register an RNG function
that never completed, causing a crash. (This is difficult to test for
without manual intervention).
Therefore, amended the driver shutdown process to only de-register
the hardware RNG when an instance kickstarted without error.
This does NOT correct the kickstart problem, only the consequences.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
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During a bug search, a review turned up two places where the wrong
direction was used in dma_sync function calls. In practice. these
compiled away to be inconsequential on the platform in question, but
this may not be true on all platforms.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
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Former versions of this (ARM) branch of this driver reworked the hardware-
readable scatter/gather list to operate as a set of 32-bit integers,
rather than a packed structure of smaller sizes, which cannot burst-read
correctly on a little-endian platform.
Integration of caamhash.c revealed subtle ways in which the ordering of
items written to a hardware s/g list could create bugs, such as the
"final" bit being written to an entry that would later be updated with
a size, inadvertently erasing the bit (e.g. such as sg_to_sec4_sg_last()
before sg_to_sec4_sg()).
Since fields must be ORed in to operate correctly using any order of
operations, changed allocations of the combination of extended descriptor
structs + hardware scatterlists to use kzalloc() instead of kmalloc(), so
as to ensure that residue data would not be ORed in with the correct data.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
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- Add early param to select SPDC module, which can enable SPDC and
EPDC modules build in kernel. Fix the build error because they both
modules use the same gobal varaible.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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- Fix the typo to avoid kernel build warning.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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When use ESAI p2p playback, ASRC is configured no ratio mode.
Due to an IC bug(TKT117009), user may hear noise sometimes.
In this patch, use ideal ratio mode for ESAI p2p playback to avoid
noise.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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Added HDMI vendor specific data block parse to MXC EDID code.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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Check HDMI VSDB block, only enable HDMI output when EDID with HDMI
VSDB block, enable DVI output when EDID with no HDMI VSDB.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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HDMI not support deep color output, setting register
VP_PR_CD bits color_depth to 0.(24 bits per pixel video)
Signed-off-by: Sandor Yu <R01008@freescale.com>
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This patch will add driver menu support.
And also, for rng don't need to enable clock, we add operation when no
clock is specified for rng.
Signed-off-by: Terry Lv <r65388@freescale.com>
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this patch is adding a ioctl for vpu to check the phy addr before vpu
start using this addr, this use case is common in some Direct Render case,
the VPU 's framebuffer phy memory is allocate by GPU, if the address given
by GPU have some wrong, like pass a virtual address, vpu will hang the system.
Add this IOCTL to be the goalkeeper, this IOCTL can check whether the phy
address was virtual memory or the address is within phy memory of your DDR.
The phy memory valild check is now doing best effort:
1. check whether is was allocated by vmalloc(), which must be a phy un-continus
2. check whether is was beyound DDR's top address, usually the other driver
pass a virtual address as a phy address.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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1. in mx6sl, it adds sd3.0 uhs mode capability indicator bits.
2. in mx6sl, exe_tune and smp_clk_sel bits for standard tuning procedure
have been put in ACMD12_ERR reg
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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in mx6q/dl, move fsl tuning procedure into platform driver code from common
code hacking.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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MXC_VPU will return 0 if IOCTL don't support, for user space, it think
this IOCTL success, but it's needs actually return a failed return
value.
Signed-off-by Zhang Jiejing <jiejing.zhang@freescale.com>
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1. For sdio card, only when MMC_POWER_OFF is set,
sdhci_disable_clk will be called for sdio. otherwise sdio clk
will not be gated.
2. Set MMC_CAP_POWER_OFF_CARD caps in esdhc, so that
sdio_bus power off and clock gate off card through
to pm_runtime interface.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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VPU driver will enable/disable PU LDO by calling regulator API
Enable PU LDO in vpu_open
Disable PU LDO in vpu_release
Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
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Check input params for progressive tiled format to remind the application
input wrong params and make driver more robust.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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add usb charger voltage offset sysfs interface
Signed-off-by: Rong Dian <b38775@freescale.com>
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increase update period to 2 minutes. Due to improper hardware design,
when enable HDCP function, the I2C2 bus pins function is change to DDC
function,the CPU loading is high when I2C failed transfer data via I2C
bus,so decrease battery update voltage frequency.
Signed-off-by: Rong Dian <b38775@freescale.com>
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adv7180.c code was not working properly in this new release because some
changes done in mxc_v4l_capture.c driver.
Also mostly of the error messages and kernel dump problem which were related
to csi_enc are already fixed on this release.
In order to fix on previous releases csi and ipuv3 fixes
should be applied or back ported.
Signed-off-by: Israel Perez <B37753@freescale.com>
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ttymxc serial uart driver add support loopback mode.
returns TIOCM_LOOP set when reading the status.
Signed-off-by: Israel Perez <B37753@freescale.com>
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when usb charger is online, driver also updates battery voltage
Signed-off-by: Rong Dian <b38775@freescale.com>
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update the battery info just when the value is changed.
Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
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Add the AHCI platform suspend/resume function callback to
fix this issue.
Signed-off-by: Richard Zhu <Hong-Xing.Zhu@freescale.com>
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This patch fix green line issue on captured frames for
720x480p@30 and 720x576p@30 modes by changing register
0x302c's bit[6:5] to 0'11 to enhance output driving
capability to 4x.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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- USB gadget disconnected when system boot kernel with USB connected. Commit
68b1c60f7f6c436340206679a18d61d9 induce the issue, call dr_discharge_line(1)
to ensure no abnormal usb wakeup interrupt happen after plug out the cable.
There are two cases cause dr_discharge_line(1) of fsl_otg_event() be called.
One case is switch the otg mode form Host mode to Device mode. Another case is
boot kernel with USB connected. The host_first_call is true when system boot
kernel with USB connected, otherwise it is false. So dr_discharge_line(true)
should not be called in fsl_otg_event() if host_first_call is true.
- USBOH3 clock is still on after plug out the cable when boot kernel with USB
connected, If the suspended bit is 0x1 and stopped is 0x0,the case is regarded
as suspend connected to usb charger. USB clock will be turn on, otherwise the
second suspend is processed without USB clock and it causes system hang. But
system boot kernel with cable connected, suspended is 0x1 and stopped is 0x0.
USB clock will be on by mistake. And stopped is cleared in dr_controller_run()
when system boot kernel with USB connected. We should check the suspended and
stopped bit before call dr_controller_run() to fix the issue.
Signed-off-by: make shi <b15407@freescale.com>
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The patch is from vivante.
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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Originally only QSXGA mode use exposure calculation, now we enable
this function on every mode to fix image dark problem.
Signed-off-by: Yuxi Sun <b36102@freescale.com>
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Really disable pix/axi clock when SPDC is idle.
Signed-off-by: Robby Cai <R63905@freescale.com>
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Because we have DISPLAY power down/up request when do suspend/resume,
EPDC/SPDC has been powered off and powered on again, thus re-initialization
is needed.
Signed-off-by: Robby Cai <R63905@freescale.com>
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This patch corrects ov5640 mipi camera sensor chip name
to distinguish it from ov5640 csi camera.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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Consider the below scenario: there is one CPU enter idle state before
switch happen, and the CPU frequency is set on high point(1G with userspace
cpufreq profile). After cpufreq profile is switched to interactive, all of the
cpus's target_freq will be set to the current CPU frequency 1G. Then after one
sample window, interactive profile will revalue the current cpu loading in
every cpu(except idle cpu), and get the desired frequency and compared with
target_freq to decide up or down frequency. Until all of cpus's target_freq
is lower than desired frequency , down frequency will happen. But the idle
CPU's frequency has been set on 1G , so cpu frequency miss the chance to set
lower cpu frequency , although there is no loading in all of cpus.CPU frequency
will be down unless the idled CPU exit idle to revalue cpu loading and get the
right target_freq, in the worst case, it will never happen.
Now we can do this:
If we judge cpu idle state and set taget_freq to lowest frequency when switch
to interactive, then CPU frequency modify will never be blocked on idled CPU.
Signed-off-by: Robin Gong <B38343@freescale.com>
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For fast mode setting, ov5642_change_mode does not check the fps setting.
New mode in ov5642_change_mode will have to be the same FPS as previous mode.
Only schedule the fast setting if previous fps is same as new one.
Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
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If fail to communicate with I2C2 in any potential possibility,
driver doesn't update wrong ADC sample data into buf for battery.
Signed-off-by: Rong Dian <b38775@freescale.com>
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This patch changes output drive capability of ov5642
camera register 0x302c's bit[6:5] to 0'11 to get 4x
drive capability so that green lines cannot be seen
in the captured frames.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit f3e5d9944e989e66167cbbaa4f3433d8a9baf84d)
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Hardware cannot support battery internal resistance and coulomb calculation,
estimate data only by battery voltage.The true battery voltage will change to
a bit lower about 50mV~500mV than normal voltage with playing game or video or
other consumption actions, then change back to normal voltage with finishing
playing game or video or other consumption actions in the discharger stage.
Signed-off-by: Rong Dian <b38775@freescale.com>
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set screen black when resizing during video playback.
Fix bug: when video playback, switch to full screen or leave full screen,
sometime it has the colour stripe
Signed-off-by: Wayne Zou <b36644@freescale.com>
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If LUT 63 is busy and LUTs 0-31 are busy, the epdc_choose_next_lut
function was not correctly selecting an available LUT between 32-62.
Instead, it was returning 0. This fixes that issue by properly
offsetting the available LUT from the second 32-bit segment of the
64-bit LUT field.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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This patch corrects sensor data struct by adding static
attribute.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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