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BCMDHD_SDIO needs to be tristate for the correct dependency
of MMC core subsystem.
And the old driver buildin mode is static defined by DRIVER_TYPE.
Fix it to depend on CONFIG_BCMDHD_SDIO.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit a240645d6bb8062e5a9e73bc14697d0920e0c34e)
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i.MX6ULL has errata ERR010450, which says due to SOC I/O timing
limit, eMMC HS200 and SD/SDIO 3.0 SDR104 at 1.8v can only work
below or equal to 150MHz. And eMMC DDR52 and SD/SDIO DDR50 at
1.8v can only work below or equal to 45MHz.
This patch add this limit for imx6ull.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit fa0a37eca728bdf23b454b4d25f1e47f4f10a3bd)
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Enable OOB feature for MX6Q/DL SDB, MX6SL EVK, MX6SX SDB, MX7D SDB boards.
NOTE: The performance optimization option CONFIG_BCM4339 is disabled
by default due to a WiFi driver issue that it breaks MX6SL EVK.
If user want to test performance on the above platforms (except MX6SL EVK),
CONFIG_BCM4339 has to be enabled manually.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit ae55027339431f7d1c4251dd39ac484c9f9f4245)
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The patch is delivered by Cypress to add OOB switch interface
and a P2P stability fix.
Whether to enable OOB is controlled by the gpios property under
bcmdhd_wlan_0 node.
e.g.
bcmdhd_wlan_0: bcmdhd_wlan@0 {
compatible = "android,bcmdhd_wlan";
gpios = <&gpio5 20 0>; /* WL_HOST_WAKE */
wlreg_on-supply = <&wlreg_on>;
};
If valid gpios property found, then driver will consider to use
OOB feature.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit a1f93352b071d37697ad7c09c9bb910482d5a77e)
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For Mega/Mix enabled SoCs like MX7D and MX6SX, uSDHC will lost power in
LP mode no matter whether the MMC_KEEP_POWER flag is set or not.
This may cause state misalign between kernel and HW, especially for
SDIO3.0 WiFi cards.
e.g. SDIO WiFi driver usually will keep power during system suspend.
And after resume, no card re-enumeration called.
But the tuning state is lost due to Mega/Mix.
Then CRC error may happen during next data transfer.
So we should always fire a mmc_retune_needed() for such type SoC
to tell MMC core retuning is needed for next data transfer.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit 91091e4233d690225f5dbcffc11e5c6803d6d096)
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Fix build issue caused by high impact Coverity issue in GPU kernel driver
Date: Sep 13, 2016
Signed-off-by: Prabhu Sundararaj <prabhu.sundararaj@nxp.com>
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Fix high impact Coverity issue in GPU kernel driver
Date: Sep 13, 2016
Signed-off-by: Yuchou Gan <yuchou.gan@nxp.com>
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GPU MMU pages are removed with process kill event, but the memory is still in hardware access.
gckKERNEL_DestroyProcessDB --> gckOS_UnmapUserMemory --> gckMMU_FreePages --> _FreePages --> clear MMU
pages with gcdMMU_CLEAR_VALUE.
This is the common issue in GPU driver, can be reproduced easily on GC400T due to low hardware performance.
this patch add the command stall to complete gpu hardware pipeline before remove the MMU pages.
the original issue can be reproduced with several minutes, not reproducible with the fix.
Date: Sep 13, 2016
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
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When HAB boot, the CAAM clocks are disabled after authenticate kernel image.
But the CAAM driver accesses the CTPR_MS register earlier than enabling clocks,
which causes kernel hang.
Fix the issue by moving the page size getting later than clocks enabling.
Signed-off-by: ye li <ye.li@nxp.com>
(cherry picked from commit 781ffdb82e9a08521394e6a3b94a4354e94c51eb)
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In order to pass the pcie gen2 compliance tests,
the external oscillator is mandatory required by
imx6 legacy platforms.
add the external osc support by this patch.
- pll6 should be set bypass mode.
- src of the pll6_bypass should be lvds_clk1
- adjust the swing/deemphase value
- re-configure the phy if the external 100Mhz
differential osc is used. Because that phy used
the 125Mhz before.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
(cherry picked from commit c98c16d7a28641cdc032a46d139baf592a5f4a7d)
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suspend
For imx6ul PHY, when the system enters suspend, its 1p1 is off by default,
that may cause the PHY get inaccurate USB DP/DM value. If the USB wakeup
is enabled at this time, the unexpected wakeup may occur when the system
enters suspend.
In this patch, when the vbus is there, we enable weak 1p1 during the PHY
suspend API, in that case, the USB DP/DM will be accurate for USB PHY,
then unexpected usb wakeup will not be occurred, especially for the USB
charger is connected scenario. The user needs to enable PHY wakeup for
USB wakeup function using below setting.
echo enabled > /sys/devices/platform/soc/2000000.aips-bus/20c9000.usbphy
/power/wakeup
Cc: Shaojun Wang <shaojun.wang@nxp.com>
Cc: Anson Huang <anson.huang@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit d4e00cd5db37df258a25c7c88233a176e62e5d3b)
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On imx6qp sabresd rev b board, there is a standalone
external oscilator, used to provided the clks for
imx6qp pcie.
Add one regulator into pcie node, let the ext osc work.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
(cherry picked from commit 891e336212fe9a8a8fd71f4d78868faaa9481d32)
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sync gpu kernel driver with the latest 5.0.11.p8
source branch: imx_5.0.11.p8
source commit: 864a00a65ede8d3ded786c9afccc0b8b4ef5007d
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
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On i.MX6ULL, when the CPU freq is running at 198MHz or 396MHz, the system will
enter low bus mode if no device need high bus mode. The first time the system
entering low bus mode, CPU freq will be set to 24MHz, if cpufreq change the CPU
freq from 198MHz(396MHz) to 396MHz(198MHz), the CPU freq will be set to 198MHz or
396 MHz. At this time, if the CPU enter low power idle, system will hang.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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Since the eink panel will not be re-initialized after exit DSM(deep sleep mode),
it will depend on the last update content so we need keep the associated working
buffer content during DSM. The patch moves the initialization of working buffer
to probe() function and ensure it's just be initialized once and thus its
content will be kept.
The patch shall fix the following issue:
The codes as follows in unit test for clearing screen does not take effect
when enter/exit DSM.
---
printf("Blank screen\n");
memset(fb, 0xFE, screen_info.xres_virtual*screen_info.yres*screen_info.bits_per_pixel/8);
update_to_display(0, 0, screen_info.xres, screen_info.yres,
wave_mode, TRUE, 0);
---
Signed-off-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit 87ba6d771e028f7482019a3003965b029ec08c65)
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When VPU runs at 396MHz, VDDSOC_CAP's voltage
should be set to 1.275V for all set-points,
add VPU clock rate check to support this case.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Added clock enable and disable to the probe and remove functions
where appropriate.
Signed-off-by: Dan Douglass <dan.douglass@nxp.com>
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According the the latest datasheet, we updated the lowest
OPP to 198MHz. So we need to update the cpufreq code to fix
the syttem hang issue when run 'cpufreq-info' in low bus mode
on i.MX6ULL.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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dev->port_usb is checked for null pointer at above code, so dev->port_usb
might be null, fix it by adding null pointer check.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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cdev->config is checked for null pointer at above code, so cdev->config
might be null, fix it by adding null pointer check.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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Enable DCP support for imx6 series.
Signed-off-by: Dan Douglass <dan.douglass@nxp.com>
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running following vte stress test will meet "mx6s-csi 21c4000.csi: mx6s_csi_irq_handler Rx fifo overflow"
and cannot be stopped to capture again.
i=0; while [ $i -lt 3000 ];do v4l2_capture_emma -D /dev/video1 -C 2 -M 0 -J 30,4 -W 640 -H 480;i=`expr $i + 1`;done
This patch adds the same handling as BIT_HRESP_ERR_INT for BIT_RFF_OR_INT
(RxFiFo OverFlow) to reset CSI as a recovery.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
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Add fb name check function pwm_backlight_check_fb_name(),
pwm driver can banding to fb with fb name when driver working
in device tree architecture.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
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On i.MX6ULL, when the system entering the low bus mode, system will enter
low power run mode in which the cpufreq is at 24MHz. If we run
'cpufreq-info' until, the cpu frequency will be change from 24MHz to 99MHz,
this will lead to system enter low power idle wrong, and system will hang
in low power idle.
Add the ARM core clock handling code to fix this issue.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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Integrate gpu kernel driver part for 6.1.1 release
Date: Jul 26, 2016
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
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Add the sanity check for drect's width and height in
pxp_set_scaling() to avoid div0 exception.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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The dynamicly allocated 'pseudo_palette' area should be
freed when unused to avoid memory leak.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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Refine the 'fb_info' field in 'mxsfb_info' that change this
field to be a pointer which can reduce the 'mxsfb_info' size.
Besides, store the 'host' data to fb_info->par to replace the
unnecessary 'to_imxfb_host' macro.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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The function 'platform_set_drvdata' will be called twice
during the probing stage. And the second calling is not
good and not necessary.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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QSPI only support upto 16 LUT slots while the QSPI commands are more
than this number, reserve the last two slots for dynamic change (most
commands used in pairs). Later all extra supported commands will be add
in dynamic lut table.
Signed-off-by: Han Xu <han.xu@nxp.com>
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Missing the 'break' will cause the function return failure
when the 'bits_per_pixel' is 32 which should be supported.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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The default bpp should be set to a proper value if it is
not set yet during mipi panel display initialization.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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Using a dedicated kernel thread to dispatch all the client
requests which can support asynchronous multi-task.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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The 32 bpp pixel format which is passed to pxp should be
'PXP_PIX_FMT_RGB32' instead of 'PXP_PIX_FMT_RGB24', since
only 'PXP_PIX_FMT_RGB32' can be recognized by lcdif.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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with CONFIG_HZ=100, the precision of jiffies is 10ms, and the
generic_cmd6_time of some card is also 10ms. then, may be current
time is only 5ms, but already timed out caused by jiffies precision.
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 8bcce64faaaf07165453e6600ae9ffb887e79b1a)
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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there is a time window between __mmc_send_status() and time_afer(),
on some eMMC chip, the timeout_ms is only 10ms, if this thread was
scheduled out during this period, then, even card has already changes
to transfer state by the result of CMD13, this part of code also treat
it to timeout error.
So, need calculate timeout first, then call __mmc_send_status(), if
already timeout and card still in programing state, then treat it to
the real timeout error.
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 3bbb0deea6d5c6d5ed38ae927a5bf9b0cd7c8639)
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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Now, when call esdhc_set_timeout() to set the data timeout counter value,
IPP_RST_N(bit 23) is wrongly affected. This patch add a mask to avoid this.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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Our Reference Manual has a mistake, for the register SYS_CTRL,the
DTOCV(bit 19~16) means the data timeout counter value. When DTOCV
is set to 0xF, it means SDCLK << 29, not SDCLK << 28.
This patch correct this in our usdhc driver.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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the commit 1b98a9be39a37c2d3ad239c3a1a3a1af1d4ac637 breaks the setting for mx7d.
the patch fixes it.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
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dithering test will met timeout issue on i.MX6ULL platform.
to reproduce, run ' /unit_tests/mxc_epdc_v2_fb_test.out -n 17 -d 1 -q 1'
Ginger dithering mode "Floyd-Steinberg" and quant_bit 1
imx_epdc_v2_fb 228c000.epdc: PxP operation failed due to timeout
imx_epdc_v2_fb 228c000.epdc: Unable to complete PxP update task: dithering process
imx_epdc_v2_fb 228c000.epdc: Timed out waiting for update completion
This patch corrects the setting (different from V3 on i.MX7D).
Signed-off-by: Robby Cai <robby.cai@nxp.com>
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for imx6qdl"
This reverts commit 312979d1fcbd068d4ba0f461e974e7cbcc889548.
When busfreq is at low bus mode, which is 24MHz, it means DDR/AHB/AXI
will drop to 24MHz. At the same time, when in low busfreq mode, cpuidle
can be in low power idle, DRAM will be put into self-refresh and DRAM IO
will in low power mode to save power, so DMA will NOT work.
So all peripherals that needs DMA, need to request bus freq to high
setpoint when it is active.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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Add the mipi panel 'TFT3P5581' driver.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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and cmds.
Since the lcdif uses RGB interface to transfer image data to
mipi dsi, video mode should be used to transfer the image data.
So, the commands transfer should also use video mode to avoid
unnecessary mode switches.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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write operation.
Add 10msec delay after all the pkt write operations to let
the data to take effect on the panel's side.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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position.
The hardware reset should be done on LP-11 mode which
is the data/clk stop state.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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deferred probe
The assert gpio comes from 'gpio_spi' module, so the framebuffer
depends on the 'gpio_spi' driver loading. And in the case that
the framebuffer driver is loaded earlier than the 'gpio_spi'
driver, the gpio asserting will fail. So handle this gpio in
the framebuffer driver and add deferred probed support.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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Add more delay to wait sensor stable.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit c1d7c35b6d2c8b6ec69b90bac6febf673d04acc5)
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- HIST_A as collision, need set to 1 for wfb_store
- WFE-A flag0~3 changed to WFE-B flag4~7 on i.MX6ULL
This patch fixes the collision issue and some part of
updated region can not display with auto waveform mode.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
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When CPU/AXI/AHB are running at 24MHz, IPG at
12MHz, two consecutive reads of RTC timer registers
never get same value, so we need to skip the low
15 bits, only make sure the second value are same
during two consecutive reads.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Add ocotp support for i.MX6ULL.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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