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Micrel KSZ9131 PHY LED behavior is not correct when configured in
Individual Mode, LED1 (Activity LED) is in the ON state when there is
no-link.
Workaround this by setting bit 9 of register 0x1e after verifying that
the LED configuration is Individual Mode.
This issue is described in KSZ9131RNX Silicon Errata DS80000693B [*]
and according to that it will not be corrected in a future silicon
revision.
[*] https://ww1.microchip.com/downloads/en/DeviceDoc/KSZ9131RNX-Silicon-Errata-and-Data-Sheet-Clarification-80000863B.pdf
Upstream-Status: Backport [0316c7e66bbd16cf2d01a4e2f5afa6afb01278f2]
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Philippe Schenker <philippe.schenker@toradex.com>
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When adding the bus_early device tree property, bus_early_clk was
incorrectly used as name. This commit changes the property name to
bus_early, which is consistent with the other clocks.
Upstream-Status: Inappropriate [other]
This fix is only needed for the downstream kernel. In the upstream
kernel they added a power-domain for all hsio devices (usb, pcie, etc.)
and enable the clock there. However, backporting this solution would
probably cause more issues for now.
Fixes: 4d948676c55f("usb: dwc3: imx8mp: add bus_early_clk")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
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Add a bus_early_clk which is the same clock as for the usb controllers
child. This is necessary because the mentioned commit in fixes is
accessing registers which need the IMX8MP_CLK_HSI_AXI clock to be
enabled. Without this fix suspend/resume is not working properly if no
USB-devices are connected.
rtcwake -s 5 -m mem -d rtc1
It will try to wakeup after 5 seconds but hangs afterward.
Upstream-Status: Inappropriate [other]
This fix is only needed for the downstream kernel. In the upstream
kernel they added a power-domain for all hsio devices (usb, pcie, etc.)
and enable the clock there. However, backporting this solution would
probably cause more issues for now.
Fixes: cbd09f688623 ("usb: dwc3: imx8mp: Add support for setting SOC specific flags")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
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The controller's power may be powered off during system suspend. This
will add suspend/resume support when the controller suffers power lost.
Upstream-Status: Backport [2f64d6a6cdfbd992e8a8c481ebf79bfa9a71325b]
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Link: https://lore.kernel.org/r/20221013151442.3262951-4-xu.yang_2@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The suspend/resume code is broken for i.MX 8 CPUs. When waking up from
suspend it might happen that devices are not recognized anymore. To
reproduce do:
root@apalis-imx8-07107223:~# lsusb -t
/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=ci_hdrc/1p, 480M
|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/3p, 480M
|__ Port 1: Dev 4, If 0, Class=Wireless, Driver=btusb, 480M
|__ Port 1: Dev 4, If 1, Class=Wireless, Driver=btusb, 480M
|__ Port 2: Dev 3, If 0, Class=Hub, Driver=hub/4p, 480M
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
root@apalis-imx8-12345678:~# rtcwake -s 1 -m mem -d rtc1
root@apalis-imx8-07107223:~# lsusb -t
/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=ci_hdrc/1p, 480M
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
We remove this broken code to replace it with the upstream code for
suspend and resume.
Upstream-Status: Inappropriate [other]
This is an issue of the downstream driver. We replace the broken
suspend/resume with the upstream solution.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
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If the PCIe PLL locking fails we also have to disable vpcie because it
was already enabled before. Without this commit we get a warning when
the kernel tries to free the vpcie regulator.
Upstream-Status: Pending
Mainline for i.MX 8X does not support PCIe yet, this patch cannot be
upstreamed as of now.
Fixes: f6bf1945c5d5 ("PCI: imx: Do not hang if REFCLK is missing")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
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This reverts commit 2b311be08a61793e26757d5239ad9b79222962e5.
This patch breaks SATA. We will apply another workaround which is known
to work.
Upstream-Status: Inappropriate [other]
The reverted commit was never sent upstream
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
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There is a clock dependency between the ahci-imx driver and the PCIe
driver on i.MX8 which causes the PCIe link to never come up. It happens
every 20-100 reboots when the SATA driver probes before PCIe. By never
disabling the APB clock in the SATA driver this issue goes away. In BSP5
we compiled the SATA driver as a module and the SATA driver was probing
after the PCIe driver, therefore we could not see the issue there.
Upstream-Status: Inappropriate [other]
This is an ugly workaround that should not land upstream. We try to get
help from NXP regarding this issue to find a proper solution.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
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Fails the probe with ENODEV when the REFCLK is missing and the PCIe PLL
cannot be locked. Without this change the driver just hang during
probe, completing freezing the system.
Upstream-Status: Pending
This is required to solve a specific issue we have on Colibri-iMX8X,
in which we have the PCIe node enabled for non Wi-Fi variant
and the PCIe REFCLK generator is not assembled.
Upstream driver does not support i.MX8QXP at the moment,
therefore there is nothing we can upstream.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
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This reverts commit 1d3d34c377dc78e18c483e7c748964a8750c6ec4.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [not upstream]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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This reverts commit 6733dd9e5c95fef0a74cd35154fa385cf32745d2.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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This reverts commit f57690a9374745357c290b56e6007a7820f11461.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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This reverts commit 164ceca07ae13052a9db49125d4b42f0c1413671.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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This reverts commit e435f17a00caf52cc3f0154367308888c4e7d676.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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This reverts commit 963141684eb2bd5166096f03865696e341598bb1.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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This reverts commit 90722e5666993df76bb203e0ad60b42cd4111781.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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This reverts commit e3b41fa9c03182c51c93f54dfd2f31c87aec8a49.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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This reverts commit fd34ae5146f2df6d4f9f2a0046b697ff6b5a267e.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Returns EPROBE_DEFER when of_drm_find_bridge() fails, this is consistent
with what all the other DRM bridge drivers are doing and this is
required since the bridge might not be there when the driver is probed
and this should not be a fatal failure.
Cc: <stable@vger.kernel.org>
Fixes: 30e2ae943c26 ("drm/bridge: Introduce LT8912B DSI to HDMI bridge")
Upstream-Status: Submitted [https://lore.kernel.org/all/20230322143821.109744-1-francesco@dolcini.it/]
Signed-off-by: Matheus Castello <matheus.castello@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230322143821.109744-1-francesco@dolcini.it
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According to the PCIe standard the PERST# signal (reset-gpio in
fsl,imx* compatible dts) should be kept asserted for at least 100 usec
before the PCIe refclock is stable, should be kept asserted for at
least 100 msec after the power rails are stable and the host should wait
at least 100 msec after it is de-asserted before accessing the
configuration space of any attached device.
From PCIe CEM r2.0, sec 2.6.2
T-PVPERL: Power stable to PERST# inactive - 100 msec
T-PERST-CLK: REFCLK stable before PERST# inactive - 100 usec.
From PCIe r5.0, sec 6.6.1
With a Downstream Port that does not support Link speeds greater than
5.0 GT/s, software must wait a minimum of 100 ms before sending a
Configuration Request to the device immediately below that Port.
Failure to do so could prevent PCIe devices to be working correctly,
and this was experienced with real devices.
Move reset assert to imx6_pcie_assert_core_reset(), this way we ensure
that PERST# is asserted before enabling any clock, move de-assert to the
end of imx6_pcie_deassert_core_reset() after the clock is enabled and
deemed stable and add a new delay of 100 msec just afterward.
Link: https://lore.kernel.org/all/20220211152550.286821-1-francesco.dolcini@toradex.com
Link: https://lore.kernel.org/r/20220404081509.94356-1-francesco.dolcini@toradex.com
Fixes: bb38919ec56e ("PCI: imx6: Add support for i.MX6 PCIe controller")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Richard Zhu <hongxing.zhu@nxp.com>
Upstream-Status: Backport
- This patch is already backported to stable linux 5.15.y but was
overwritten by NXP patches. Do backport it again from upstream commit
a6809941c1f17f455db2cf4ca19c6d8c8746ec25
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
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Remove wrong mode-fixup on the LDB driver that limited the pixel clocks
to 74.25MHz in single channel mode and 148.5MHz in dual channel mode.
According to the iMX8MP Reference manual, the LDB peripheral supports:
"
- Single channel (4 lanes) output at up to 80MHz pixel clock and LVDS clock.
This supports resolutions up to 1366x768p60.
- Dual asynchronous channels (8 data, 2 clocks). This is intended for a single
panel with two interfaces, transferring across two channels (even pixel/odd
pixel). This is supported at up to 160MHz pixel clock, which is up to 80MHz
LVDS clock (due to 2 pixels per LVDS clock). This supports resolutions
above 1366x768p60, up to 1080p60.
"
We contacted NXP trying to find the real reason for this seemingly
random limitation, but we didn't get any response.
The forced pixel clock values were removed and now it's possible to
drive LVDS displays that have pixel clock requirements out of the previously
limited range, but that are still within the hardware limitations.
A check was added to ensure that clocks out of range are denied.
With this change, it is now possible to use this display:
- LVDS display (CMT1210A07R00 800x600 - 40MHz pixel clock)
Also, the Toradex 10" Capacitive touch display (68.93MHz pixel clock)
continues to work.
Upstream-Status: Pending
The file where this change was applied doesn't exist upstream.
Signed-off-by: Rafael Beims <rafael.beims@toradex.com>
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The pll1443x PLL so far only supports rates from a rate table passed
during initialization. Calculating PLL settings dynamically helps audio
applications to get their desired rates, so support for this is added
in this patch.
The strategy to get to the PLL setting for a rate is:
- First try to only adjust kdiv which specifies the fractional part of the PLL.
This setting can be changed without glitches on the output and is therefore
preferred
- When that isn't possible then the rate table is searched for suitable rates,
so for standard rates the same settings are used as without this patch
- As a last resort the best settings are calculated dynamically
The code in this patch is based on patches from Adrian Alonso <adrian.alonso@nxp.com>
and Mads Bligaard Nielsen <bli@bang-olufsen.dk>
Upstream-Status: Backport [b09c68dc57c9d44071d83bb935b733f53ea2b2b4]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220304125256.2125023-9-s.hauer@pengutronix.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Rafael Beims <rafael.beims@toradex.com>
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Print all messages from within the pll14xx driver with a common
prefix using pr_fmt. No need to print function names anymore, so
drop them from the messages.
Upstream-Status: Backport [80cbc80612a01461a257f2c2eb9976cbadfb7be2]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220304125256.2125023-8-s.hauer@pengutronix.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Rafael Beims <rafael.beims@toradex.com>
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clk_pll14xx_round_rate() returns the lowest rate by indexing into
the rate table with the variable i. i is actually pll->rate_count
as this is the value we come out of the loop with. Use pll->rate_count
explicitly to make it a bit more clear what is being done. While at
it fix a typo in the comment. No functional change.
Upstream-Status: Backport [5ff50031cb8852bfcf587d003ba6bad3c2336852]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220304125256.2125023-7-s.hauer@pengutronix.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Rafael Beims <rafael.beims@toradex.com>
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In clk_pll1443x_set_rate() 'tmp' is used for the content of different
registers which makes it a bit hard to follow. Use different variables
named after the registers to make it clearer. No functional change
intended.
Upstream-Status: Backport [052d03a043afebb8e26ec17de52e8cdc8b217ef9]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220304125256.2125023-6-s.hauer@pengutronix.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Rafael Beims <rafael.beims@toradex.com>
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The PLL driver has support for two different PLLs: The pll1416x and
the pll1443x. The latter has support for an additional kdiv value.
recalc_rate can be the same calculation when kdiv is assumed to be zero
for the PLL which doesn't support that value.
Upstream-Status: Backport [53990cf9d5b489fc0ec08e5c4df7139fc311a824]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220304125256.2125023-5-s.hauer@pengutronix.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
[Rafael: fixed conflicts in the clk_pll1443x_recalc_rate function caused
by some additions on the downstream branch in commit 9425151a59a4. The
changes in the downstream branch implement the same functionality of
this commit but without the other improvements in the patch series.
Additionally, the change in the downstream branch adds a function to
change the "k" value of the PLL which gets exposed through sysfs. This
function was also fixed to be compatible with the changes in the patch
series.]
Signed-off-by: Rafael Beims <rafael.beims@toradex.com>
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Linux has these marvelous FIELD_GET/FIELD_PREP macros for easy access
to bitfields in registers. Use them and remove the now unused *_SHIFT
defines.
Upstream-Status: Backport [58f4980ccbecf633df1fcb113e2a9f04842eccc6]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220304125256.2125023-4-s.hauer@pengutronix.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Rafael Beims <rafael.beims@toradex.com>
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The code tries to mask the bits in SDIV_MASK from 'tmp'. SDIV_MASK
already contains the shifted value, so shifting it again is wrong.
No functional change though as SDIV_SHIFT is zero.
Upstream-Status: Backport [d77461a616b659bd88dc153e3a86dba5bf78aa8a]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220304125256.2125023-3-s.hauer@pengutronix.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Rafael Beims <rafael.beims@toradex.com>
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The driver has defines for the registers, but they are mostly unused.
Use the defines consistently throughout the driver. While at it rename
DIV_CTL to DIV_CTL0 because that's the name in the reference manual.
Upstream-Status: Backport [485b4ff57c2777c15bfe2e6e6a204200b040e131]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220304125256.2125023-2-s.hauer@pengutronix.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Rafael Beims <rafael.beims@toradex.com>
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Add support for USB3803 and bypass mode, with this change
is also possible to move the component out of bypass mode.
In bypass mode the downstream port 3 is connected to the
upstream port with low switch resistance R_on.
Controlling mode of operations:
| RESET_N | BYPASS_N | Mode |
--------------------------------
| 0 | 0 | standby |
| 1 | 0 | bypass |
| 1 | 1 | hub |
Upstream-Status: Submitted [https://lore.kernel.org/all/20230313165039.255579-1-francesco@dolcini.it/]
Datasheet: https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocuments/DataSheets/00001691D.pdf
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230313165039.255579-4-francesco@dolcini.it
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[fdolcini: backport: fixed error path on IS_ERR(hub->bypass)]
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
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Refactor code to simplify adding support for USB3803 and bypass mode.
Remove static usb3503_reset() and move it to usb3503_switch_mode(),
with the addition of the bypass mode we need to drive the various
control signals to the expected configuration, not just to
assert/release the reset.
In addition to that the usb3503_connect() needs to be called only
for HUB mode.
No functional changes expected nor intended because of this change.
Upstream-Status: Submitted [https://lore.kernel.org/all/20230313165039.255579-1-francesco@dolcini.it/]
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230313165039.255579-3-francesco@dolcini.it
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Add minimal driver for Fairchild FXL6408 8-bit I2C-controlled GPIO expander
using the generic regmap based GPIO driver (GPIO_REGMAP).
The driver implements setting the GPIO direction, reading inputs
and writing outputs.
In addition to that the FXL6408 has the following functionalities:
- allows to monitor input ports for data transitions with an interrupt pin
- all inputs can be configured with pull-up or pull-down resistors
Upstream-Status: Submitted [https://lore.kernel.org/all/20230313170950.256964-1-francesco@dolcini.it/]
Datasheet: https://www.onsemi.com/download/data-sheet/pdf/fxl6408-d.pdf
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Co-developed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
[Bartosz: order includes alphabetically]
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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Add serdev support for the 88W8997 from NXP (previously Marvell). It
includes support for changing the baud rate. The command to change the
baud rate is taken from the user manual UM11483 Rev. 9 in section 7
(Bring-up of Bluetooth interfaces) from NXP.
Upstream-Status: Submitted [https://lore.kernel.org/linux-bluetooth/20230213120926.8166-1-francesco@dolcini.it/]
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
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Use the maybe_unused macro for the device tree ids instead of #ifdef
CONFIG_OF. This makes it easier to add support for new devices.
Upstream-Status: Submitted [https://lore.kernel.org/linux-bluetooth/20230213120926.8166-1-francesco@dolcini.it/]
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
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.read_alarm is not necessary to read the current alarm because it is
recorded in the aie_timer and so rtc_read_alarm() will never call
rtc_read_alarm_internal() which is the only function calling the callback.
Upstream-Status: Submitted
[https://lore.kernel.org/all/20230214222754.582582-1-alexandre.belloni@bootlin.com/]
Reported-by: Zhipeng Wang <zhipeng.wang_1@nxp.com>
Reported-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Fixes: 7ae41220ef58 ("rtc: introduce features bitfield")
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
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Set a pixel clock tolerance of 10% for the DSI interface of the i.MX 8MM
SoCs. There are some resolutions e.g. 1280x1024@60 Hz that do not work
without this commit.
Upstream-Status: Pending
This driver is not upstream and probably never will. It looks like the
function will become part of mxsfb. They don't verify the pixel clock
frequency there.
Related-to: ELB-4728
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
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Set a pixel clock tolerance of 10% for the DSI interface of the i.MX 8MP
SoCs. There are some resolutions e.g. 1280x1024@60 Hz that do not work
without this commit.
Upstream-Status: Pending
This driver is not upstream and probably never will. It looks like the
function will become part of mxsfb. They don't verify the pixel clock
frequency there.
Related-to: ELB-4728
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
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Set a pixel clock tolerance of 10% for the native HDMI interface of the
i.MX 8MP SoCs. There are some resolutions e.g. 1280x1024@60 Hz that do
not work without this commit.
Upstream-Status: Pending
The dw_hdmi-imx.c file is available upstream but they do not verify the
pixel clock frequency. Adding this check would harm more than it solves.
Related-to: ELB-4728
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
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Loading the hdmi firmware from kernel is broken. The firmware is loaded
from filesystem but never sent to the hdmi controller. This commit fixes
it by waiting for the firmware load to complete and afterwards transfer
it to the controller.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Upstream-Status: Pending
Downstream specific, i.MX 8 HDMI subsystem not yet in upstream.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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The HDMI PHY driver currently can only generate a discrete set of
pixelclock frequencies. Any mode read from a monitor's EDID with a non
matching frequency is rejected.
Change that to find the closest possible frequency and accept the mode
if it deviates less than 6%. 6% is chosen as with that any pixelclock
in the range of 22.25Mhz - 297MHz should be accepted.
Related-to: ELB-4015
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
(cherry picked from commit c6944a48583f6dc2d698df387fd648075491bf81)
Upstream-Status: Inappropriate [Downstream specific, i.MX 8M Plus HDMI subsystem not yet ready]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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In the case of not using edma set the RXIDEN field. This sets the RDRF
flag even if there are received characters in the FIFO and the receiver
has been idle for the specified number of characters.
Related-to: ELB-3517
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
(cherry picked from commit 35a34002c3c946195d72a12aa7cae91a21cdfb0a)
Upstream-Status: Inappropriate [Downstream specific, it requires additional patches on fsl_lpuart not available in upstream]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Conflicts:
drivers/tty/serial/fsl_lpuart.c
Upstream-Status: Inappropriate [Downstream specific, it requires additional patches on fsl_lpuart not available in upstream]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
(cherry picked from commit e35977dc853918aa9ff58a54df1073eb20160c57)
Upstream-Status: Inappropriate [Downstream specific, it requires additional patches on fsl_lpuart not available in upstream]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Any IIO ADC can be used with the driver, so do not depend
on VF610_ADC.
Upstream-Status: Backport [8a32cff217b7a0f1ab3b744fc9cd0626f08f7f15]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20220712101619.326120-2-francesco.dolcini@toradex.com
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
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The I2C clock is already reconfigured within the clock notifier.
This also fixes an ABBA locking deadlock if some other I2C device
reconfigures clocks it provides, e.g. tlv320aic32x4 during probe.
Fixes: 4f7ad5de1107 ("MLK-20368 i2c-imx: Coverity: fix divide by zero warning")
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
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This reverts commit 4199425b11325e893661d03f92330dd1adae03b0.
The lpuart_global_reset() uses fields set by the registration
to find out if we are a console or not.
Executing it before registration may make it fail.
E.g. on a imx8qm-mek the kernel stops booting without any
visable output when the switch to a console is done.
[ 1.219604] mxs-dma 5b810000.dma-apbh: initialized
[ 1.228743] Bus freq driver module loaded
[ 1.241522] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[ 1.252161] 5a060000.serial: ttyLP0 at MMIO 0x5a060010 (irq = 69, base_baud = 5000000) is a FSL_LPUAR[ 1.261335] printk: console [ttyLP0] enabled
[ 1.261335] printk: console [ttyLP0] enabled
[ 1.269756] printk: bootconsole [lpuart32] disabled
[ 1.269756] printk: bootconsole [lpuart32] disabled
While at it also remove the second call to uart_add_one_port()
which sneaked in during merging of stable patches.
Also, since we now reset after uart_add_one_port() call
sport->port.rs485_config() explicitely again.
The reset may have reverted the effects of the
uart_add_one_port -> sport->port.rs485_config call chain.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Enable hot plug detection when it is available on the HDMI port.
Without this connecting to a different monitor with incompatible timing
before the 10 seconds poll period will lead to a broken display output.
Upstream-Status: Submitted [https://lore.kernel.org/all/20221128112320.25708-1-francesco@dolcini.it/]
Fixes: 30e2ae943c26 ("drm/bridge: Introduce LT8912B DSI to HDMI bridge")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
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commit f002f45a00ee14214d96b18b9a555fe2c56afb20 upstream.
MMC_CAP_8_BIT_DATA belongs to struct mmc_host, not struct sdhci_host.
So correct it here.
Upstream-Status: Backport [from 5.15.79, commit 29100c674208]
Fixes: 1ed5c3b22fc7 ("mmc: sdhci-esdhc-imx: Propagate ESDHC_FLAG_HS400* only on 8bit bus")
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Cc: stable@vger.kernel.org
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1667893503-20583-1-git-send-email-haibo.chen@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The i.MX8MP glue layer has support for the following flags:
* over-current polarity
* PWR pad polarity
* controlling PPC flag in HCCPARAMS register
* permanent port attach for usb2 & usb3 port
Allow setting these flags by supporting specific flags in the glue node.
In order to get this to work an additional IORESOURCE_MEM and clock is
necessary. For backward compatibility this is purely optional.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Link: https://lore.kernel.org/r/20220218152707.2198357-4-alexander.stein@ew.tq-group.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Upstream-Status: Backport [9d52107185b646d449b682e10e95e6b3037b79cf]
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Until now the iomem used is not USB glue as the name suggests, but
HSIO BLK_CTL. Rename the struct member accordingly. This is a preparing
patch for when USB glue is actually used.
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Link: https://lore.kernel.org/r/20220218152707.2198357-2-alexander.stein@ew.tq-group.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Upstream-Status: Backport [81915384b5d127c67bfb4d19a62ec193e12eaaef]
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