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Revert"ENGR00254931 IPUv3 Fb: Fix display twinkling issue during suspend/resume"
This reverts commit 4bd475ba0603e10cdcab7e55f89599f7016cad25.
That patch will lead to kernel crash when doing video playback on video16 with
overlay on. The reason is that fb driver doesn't reallocate larger DMA buffer
requested by V4L2 driver, while IPU hardware write to large DMA address.
Other solution is needed for the original issue.
kernel BUG at arch/arm/mm/dma-mapping.c:478!
Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = 80004000
[00000000] *pgd=00000000
Internal error: Oops: 817 [#1] PREEMPT SMP
Modules linked in: mxc_v4l2_capture ipu_csi_enc ipu_prp_enc ipu_fg_overlay_sdc
ipu_bg_overlay_sdc ipu_still ov5640_camera_mipi ov5640_camera
CPU: 0 Not tainted (3.0.35-2506-g556681e #1)
PC is at __bug+0x1c/0x28
LR is at __bug+0x18/0x28
pc : [<800442ac>] lr : [<800442a8>] psr: 20000113
sp : 80a8fe88 ip : c09b2000 fp : 80aa3a70
r10: 80a90080 r9 : 00000040 r8 : bffecec4
r7 : 00000001 r6 : 00000002 r5 : 00000800 r4 : ce5c5e65
r3 : 00000000 r2 : 00000104 r1 : 0bfcf000 r0 : 00000033
Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 10c53c7d Table: 4a97404a DAC: 00000015
Process swapper (pid: 0, stack limit = 0x80a8e2f0)
Stack: (0x80a8fe88 to 0x80a90000)
fe80: 80afde30 8004a464 00000880 ffdfd6b0 bffec000 802fa678
fea0: bffec000 00000060 5e5c5e65 ce5c5e65 bffec250 80ad4c88 bffece4c 00000001
fec0: bffecec4 00000040 0000012c 8c009480 8c009488 80a90080 ffff9527 80423f58
fee0: 00000001 80a8e000 00000096 00000001 80a9004c 80a8e000 00000103 80af77e0
ff00: 00000000 80a90040 00000003 8007a034 00000096 00000000 80a8e000 0000000a
ff20: 80a94c4c 80a8e000 80039c00 80a8e000 00000096 00000000 80a8e000 00000000
ff40: 00000000 8007a570 80aa3cc0 80041874 ffffffff f2a00100 00000096 00000002
ff60: 00000001 80040a0c 80af9140 80000093 00000001 00000000 80a8e000 80af1ce4
ff80: 80511044 80aa6e7c 1000406a 412fc09a 00000000 00000000 00000000 80a8ffb0
ffa0: 8004f648 80041b04 40000013 ffffffff 80041ae0 80041d08 00000001 80aa3b3c
ffc0: 80af1c40 8002f538 8c005160 80008868 800082f8 00000000 00000000 8002f538
ffe0: 00000000 10c53c7d 80aa3a6c 8002f534 80aa6e74 10008040 00000000 00000000
[<800442ac>] (__bug+0x1c/0x28) from [<8004a464>]
(___dma_single_dev_to_cpu+0x84/0x94)
[<8004a464>] (___dma_single_dev_to_cpu+0x84/0x94) from [<802fa678>]
(fec_rx_poll+0x228/0x2c8)
[<802fa678>] (fec_rx_poll+0x228/0x2c8) from [<80423f58>]
(net_rx_action+0xb0/0x17c)
[<80423f58>] (net_rx_action+0xb0/0x17c) from [<8007a034>]
(__do_softirq+0xac/0x140)
[<8007a034>] (__do_softirq+0xac/0x140) from [<8007a570>] (irq_exit+0x94/0x9c)
[<8007a570>] (irq_exit+0x94/0x9c) from [<80041874>] (handle_IRQ+0x50/0xac)
[<80041874>] (handle_IRQ+0x50/0xac) from [<80040a0c>] (__irq_svc+0x4c/0xe8)
[<80040a0c>] (__irq_svc+0x4c/0xe8) from [<80041b04>] (default_idle+0x24/0x28)
[<80041d08>] (cpu_idle+0xc8/0x108) from [<80008868>] (start_kernel+0x248/0x288)
[<80008868>] (start_kernel+0x248/0x288) from [<10008040>] (0x10008040)
Signed-off-by: Wayne Zou <b36644@freescale.com>
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In testing async mode on mx6q ard and mx6dl ard, driver always said "can
not alloc rx buffer".
Change async's ring buffer size from 2048 to 1536(MEP package size) and
reduce the extra ring buffer for drop package, now the iram usage amount
in async mode reduced from 34816 to 24576.
Signed-off-by: Terry Lv <r65388@freescale.com>
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This is an issue from IC errata ERR005641 which is described as follows:
----------------------------------------------------------
FlexCAN does not transmit a message that is enabled to be transmitted
in a specific moment during the arbitration process. The following
conditions are necessary to have the issue.
- Only one MB is configured to be transmitted
- The write which enables the MB to be transmitted (write on Control status
word) happens during a specific clock during the arbitration process.
After this arbitration process occurs, the bus goes to Idle state and no
new message is received on bus.
For example:
1) MB13 is deactivated on RxIntermission (write 0x0 on CODE field from Control
Status word) - First write on CODE
2) Reconfigure the ID and data fields
3) Enable the MB13 to be transmitted on BusIdle (write 0xC on Code
field) - Second write on code
4) CAN bus keeps in Idle state
5) No write on Control status from any MB happens.
During the second write on code (step 3), the write must happen one clock
before the current MB13 is to be scanned by arbitration process.
In this case, it does not detect the new code (0xC) and no new arbitration is
scheduled.
The suggested workaround which is implemented in this patch is:
The workaround consists of executing two extra steps:
6. Reserve the first valid mailbox as an inactive mailbox (CODE=0b1000).
If RX FIFO is disabled, this mailbox must be MB0. Otherwise, the first
valid mailbox can be found by using table "RX FIFO filters" on FlexCAN3 chapter.
7. Write twice INACTIVE code (0b1000) into the first valid mailbox.
Note: The first mailbox cannot be used for reception or transmission process.
-------------------------------------------------------------
Note: Although the currently flexcan driver does not have the step 1 to run,
it's also possible to meet this issue in theory because we can not predict
when the arbitration is scheduled.
With a modified can-utils/canfdttest tool simulating Pingpong test, we were
able to reproduce this issue after running a about one day.
After applying this patch, we ran six days and did not see the issue happen
again on two mx6q sabrelite boards.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Currently the flexcan driver uses hardware local echo. This blindly
echos all transmitted frames to all receiving sockets, regardless what
CAN_RAW_RECV_OWN_MSGS and CAN_RAW_LOOPBACK are set to.
This patch now submits transmitted frames to be echoed in the transmit
complete interrupt, preserving the reference to the sending
socket. This allows the can protocol to correctly handle the local
echo.
Further this patch moves tx_bytes statistic accounting into the tx_complete
handler.
Signed-off-by: Reuben Dowle <reuben.dowle@navico.com>
[mkl: move tx_bytes accounting into tx_complete handler; cleanups]
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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can_get_echo_skb() is usually called in the TX complete handler.
The stats->tx_packets and stats->tx_bytes should be updated there, too.
This patch simplifies to figure out the size of the sent CAN frame.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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The NOR may suffers a write-buffer timeout during the bonnie++/ubifs stress
test. This patch is just a workaround to fix this issue.
With this patch, the read/write/erase will do in the synchronous way.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Use circle buf to replace old ringbuf mechanism.
Change to use circle buffer in read, write, rx isr and tx isr functions.
In first design of MLB, it's using it's own mechanism to manage ring
buffer, like in mxc_mlb.c.
And then, I saw that kernel already had a serials of circ buffer macros
which can be used to manage ring buffers.
This patch is to use circle buffer macros to manage mlb internal ring
buffers.
For detail of circle buffers, you can refer to
linux-2.6-imx/Documentation/circular-buffers.txt.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Group static variables to structure mlb_data.
Use mlb_data as platform data to be passed to file operation
functions.
Change accordingly functions for this change.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Reset whole CDR in init function. This will make mlb connection to MITB
more stable.
This is a missed part in mx6 rm's mlb section, but new in mlb's latest
spec DS62420AP2.pdf 12.1.1-1.
Without this patch, mlb may receive irq from MITB during initialization.
It might cause some connection issue that mlb can't receive data
sometimes. It was treat to be MITB's fault before we get the latest
spec.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Changes are:
1. Use print_hex_dump to print buffer in DEBUG mode.
2. Add more debug msgs.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Remove MLB150_ from macro define names to make code clean.
Signed-off-by: Terry Lv <r65388@freescale.com>
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All of the interrupts from the ENET block are not routed to
the GPC block. Hence ENET interrupts are not able to wake
up the SOC when the system is in WAIT mode. And the ENET
interrupt gets serviced only when another interrupt causes
the SOC to exit WAIT mode. This impacts the ENET performance.
To fix the issue two options:
1. Route the ENET interrupt to a GPIO. Need to enable the
CONFIG_MX6_ENET_IRQ_TO_GPIO in the config.
2. If the GPIO mechanism cannot be used and is not enabled
by the above mentioned config, the patch will disable entry
to WAIT mode until ENET clock is active. When the ENET clock
is disabled, WAIT mode will be automatically enetered.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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When working on a problem with some flash chips that lock up during
write-buffer operations, I think there may be a bug in the linux
handling of chips using cfi_cmdset_0002.c.
The datasheets I have found for a number of these chips all specify that
when aborting a write-buffer command, it is not enough to use the
standard reset. Rather a "write-to-buffer-reset command" is needed.
This command is quite similar for all chips, the main variance seem to
be if the final 0xF0 can go to any address or must go to addr_unlock1.
The bug is then in the recovery handling when timing out at the end of
do_write_buffer, where using the normal reset command is not sufficient.
Without this change, if the write-buffer command fails then any
following operations on the flash also fail.
Signed-off-by: Harald Nordgard-Hansen <hhansen@pvv.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Fix the following issues with Micron's (formerly Numonyx)
M29EW NOR flash chips, as documented on TN-13-07:
- Correcting Erase Suspend Hang Ups (page 20)
- Resolving the Delay After Resume Issue (page 22)
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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These should be semicolons, not commas.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Spansion S29NS512P flash uses a 16bit transfer to report number
of sectors instead of two 8bit accesses as CFI specifies.
Artem: remove warning message which said that we are applying the
fixup - no need to scary the user unnecessarily.
Signed-off-by: Javier Martin <javier.martin@vista-silicon.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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This patch is part of a set which fixes unnecessary flash erase and write errors
resulting from the MTD CFI driver turning off vpp while an erase is in progress.
This patch ensures that only those flash operations which call ENABLE_VPP() can
then call DISABLE_VPP(). Other operations should never call DISABLE_VPP().
Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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This allows the mtdoops driver to work on flash chips using the
AMD/Fujitsu compatible command set.
As the code comments note, the locks used throughout the normal code
paths in the driver are ignored, so that the chance of writing out the
kernel's last messages are maximized.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Start moving away from the MTD_DEBUG_LEVEL messages. The dynamic
debugging feature is a generic kernel feature that provides more
flexibility.
(See Documentation/dynamic-debug-howto.txt)
Also fix some punctuation, indentation, and capitalization that went
along with the affected lines.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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This reverts commit 573bab0be2427d6664420eaf9d8e272dbe9d840f.
i.mx6dl/dq sabreauto/sabresd board will boot up failed
randomly with this patch-set, thus revert it. [Jason]
Signed-off-by: Jason Liu <r64343@freescale.com>
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We don't need invent the wheel to implement the wrap for the _do_div,
we can use the kernel common helper function for the u64 divide with
div_u64() function call
This also fix the build break when CONFIG_DEBUG_SECTION_MISMATCH=y with
GCC4.6.3 cross-compile toolchain.
CC init/version.o
LD init/built-in.o
LD .tmp_vmlinux1
drivers/built-in.o: In function `_do_div.part.1':
clkdev.c:(.text+0x15c23c): undefined reference to `__aeabi_uldivmod'
clkdev.c:(.text+0x15c25c): undefined reference to `__aeabi_uldivmod'
clkdev.c:(.text+0x15c2bc): undefined reference to `__aeabi_uldivmod'
clkdev.c:(.text+0x15c3ac): undefined reference to `__aeabi_uldivmod'
clkdev.c:(.text+0x15c3d0): undefined reference to `__aeabi_uldivmod'
This issue is caused by the wrongly optimized code produced by GCC,
See the bug report here: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48783
The similar build break issue report at:
http://lists.infradead.org/pipermail/linux-mtd/2012-May/041677.html
Signed-off-by: Jason Liu <r64343@freescale.com>
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For both CSI_MEMx and CSI_PRP_VF(ENC)_MEM capture channels,
we disable them with the following sequence:
1) Wait for an idmac channel eof interrupt.
2) Disable CSI by clearing CSIx_EN in IPU_CONF register.
3) Disable idmac channel by clearing relevant bit in
IPU_IDMAC_CH_EN_1 register and other settings.
However, currently, we don't do 3) until CSI_PRP_VF(ENC)_MEM's
idmac channel being not busy by a while loop check. In case, an
external sensor is plugged out from the system or the sensor is
somehow broken, we will be unable to get out of that infinite
while loop. Since this check is unnecessary(we've already
waited for an idmac eof interrupt), this patch simply removes
it from the disable routine of CSI_PRP_VF(ENC)_MEM channel.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 8136a50bd049d68f92604397f256e6067ef2b572)
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There is annoying ipu warning when doing preview
by using v4l2 fg overlay component:
/unit_tests/mxc_v4l2_overlay.out -iw 320 -ih 240 -ow 1280
-oh 720 -r 0 -fg -t 5
imx-ipuv3 imx-ipuv3.0: IDMAC12's EBA0 is not 8-byte aligned
This warning can be seen only when preview size is bigger
than 1024*1024(ipu device driver split mode is enabled).
After debug, it appears that the unaligned buffer address
is caused by input cropping for left strip, and this
cropping is triggered by the split mode algrithm. The
algrithm is complex, so currently this patch only changes
the input pixel format of the ipu task from UYVY to NV12
to workaround this warning.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit aaf14db7afe5ce603857782e96033b259606594b)
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According to the OV FAE, the image quality(iq) setting is
from 0x5000 register to 0x3a1f register in the camera's
initialization setting. This patch aligns image quality
setting of ov5640 dvp camera to ov5640 mipi camera.
The registers whose values are changed are 0x5001, 0x5189,
0x518b, 0x518d, 0x518e, 0x518f, 0x5199, 0x519c and 0x519d.
This change may improve the image quality of 5M/1M/VGA/QVGA
taken pictures in Android according to test team observation.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit c4f92bf59c7e3b397f42e3eb28dfbd93278c8441)
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Add support for single-touch for the Egalax Touch driver
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@freescale.com>
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Print out the @adr when the write timeout occurs.
This is useful to check if the write timeouts occur at the
same address.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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This reverts commit 4020b38fe2f0283af7630dbed28ed32d64118a83.
After apply these two patches, we can not pass the stress test.
So revert these two patches.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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All of the interrupts from the ENET block are not routed to
the GPC block. Hence ENET interrupts are not able to wake
up the SOC when the system is in WAIT mode. And the ENET
interrupt gets serviced only when another interrupt causes
the SOC to exit WAIT mode. This impacts the ENET performance.
To fix the issue two options:
1. Route the ENET interrupt to a GPIO. Need to enable the
CONFIG_MX6_ENET_IRQ_TO_GPIO in the config.
This patch provides support for routing the ENET interrupt
to GPIO_1_6. Routing to this GPIO requires no HW board mods.
If the GPIO_1_6 is being used for some other peripheral,
this patch can be followed to route the ENET interrupt to
any other GPIO though a HW mode maybe required.
2. If the GPIO mechanism cannot be used and is not enabled
by the above mentioned config, the patch will disable entry
to WAIT mode until ENET clock is active. When the ENET clock
is disabled, WAIT mode will be automatically enetered.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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Use universal equation and 25C's calibration data to
get thermal sensor's ratio on i.MX6DL.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Correct code to remove unnecessary GPU frequency scaling updte.
This patch is from vivante.
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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When doing video playback on video16, which is also the first framebuffer
and used for fb console as well, there is a color bar on top of 1080p screen.
We need to make sure the correct vmode when doing pan display.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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MTIP enet IP have one IC issue recorded at PDM ticket:TKT168103
The issue description:
The TDAR bit after being set by software is not acted upon by the ENET
module due to the timing of when the ENET state machine clearing the
TDAR bit occurring coincident or momentarily after the software sets
the bit.
The result:
The corresponding transmit packet for an incoming ping is delayed.
Workaround:
This forces the ENET module to check the Transmit buffer descriptor
and take action if the “ready” flag is set. Otherwise the ENET module
returns to idle mode.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Current OpenVG doesn't support to use non-contiguous memory.
Forbid VG to try to allocate non-contiguous memory when video
memory is used up temporarily.
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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If system run higher cpu loading with bigger current, such as GPU or VPU,
the voltage of battery will decrease down quickly and rise up later.But the
battery driver only permit voltage decreasing while discharging before, in
other words, in the above case , the voltage will keep in very low level,
although the voltage will rise back again.
Now, remove the constrain in the code. Of course, with the patch, voltage will
down and rise back when run high loading user case, but it's better than
LOW ALWAYS, in worst case, the battery capacity will be 0 as test team reported
Please note :
Current battery capaity is not accurate because of hardware
design defect(ENGR00219632) on Sabresd.So please ignore the accuracy issue.
Signed-off-by: Robin Gong <b38343@freescale.com>
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Use universal equation and 25C's calibration data to
get thermal sensor's ratio.
If want to use old calibration method, please add
"use_calibration" into kernel command line.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Fix the kernel modules building error for mx6q/mx6dl as follows:
LD [M] drivers/usb/gadget/g_serial.o
Building modules, stage 2.
MODPOST 48 modules
ERROR: "csi_enable_mclk" [drivers/media/video/mxc/capture/ov5640_camera.ko]
undefined!
make[1]: *** [__modpost] Error 1
make: *** [modules] Error 2
Signed-off-by: Robby Cai <R63905@freescale.com>
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The pdata->pdev is initialized at platform code, if init
fails at first, it will be not initialized, and platform exit
will not be called. This also fixes an oop when config usb
module wrongly:
Unable to handle kernel NULL pointer dereference at virtual address 0000005c
pgd = ba1c4000
[0000005c] *pgd=4a145831, *pte=00000000, *ppte=00000000
Internal error: Oops: 17 [#1] PREEMPT SMP
Modules linked in: ehci_hcd(+) usbcore
CPU: 1 Not tainted (3.0.35-02451-ge361da1 #60)
PC is at fsl_usb_host_uninit_ext+0xc/0x28
LR is at usb_hcd_fsl_probe+0x2c8/0x44c [ehci_hcd]
pc : [<80062b58>] lr : [<7f060934>] psr: a0000013
sp : ba11be80 ip : 00005027 fp : 000a76e0
r10: 00000048 r9 : ba11a000 r8 : bfd4d608
r7 : ffffffed r6 : bfd4d600 r5 : bfc84400 r4 : 80aaee48
r3 : 80062b4c r2 : 00000000 r1 : 60000093 r0 : 00000000
Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user
Control: 10c53c7d Table: 4a1c404a DAC: 00000015
Process modprobe (pid: 1555, stack limit = 0xba11a2f0)
Stack: (0xba11be80 to 0xba11c000)
be80: bfd97600 7f060934 00000000 00000000 bfd4d608 bfd4d608 80aca808 bfd4d63c
bea0: 7f062bd4 80041704 ba11a000 00000000 000a76e0 802a5cec bfd4d608 802a4a14
bec0: bfd4d608 7f062bd4 bfd4d63c 00000000 80041704 802a4bac 7f062bd4 ba11bee8
bee0: 802a4b20 802a4254 bffd4040 bff03f38 7f065000 7f062bd4 80a934c8 bfc8cd20
bf00: 00000000 802a3be0 7f062b1c 7f062bd4 00000000 7f017ec8 7f062bd4 00000000
bf20: 7f065000 80041704 00000000 802a51a0 7f017ec8 80aae500 00000000 7f065000
bf40: 80041704 7f065058 000a79e8 8003b4c4 00000000 00000000 00000000 80a14834
bf60: 000a79e8 000a79e8 7f062c20 00000000 0000e67b 80041704 ba11a000 00000000
bf80: 000a76e0 800aa428 ba076740 800f58dc 000a79e8 0000e67b 00000000 000a75d0
bfa0: 00000080 80041580 0000e67b 00000000 000a79e8 0000e67b 000a75d0 000a76e0
bfc0: 0000e67b 00000000 000a75d0 00000080 000a6a78 00000008 000a76a0 000a76e0
bfe0: 7ec7ab50 7ec7ab40 0001a32c 2ace6490 20000010 000a79e8 4fffe821 4fffec21
[<80062b58>] (fsl_usb_host_uninit_ext+0xc/0x28) from [<7f060934>]
(usb_hcd_fsl_probe+0x2c8/0x44c [ehci_hcd])
[<7f060934>] (usb_hcd_fsl_probe+0x2c8/0x44c [ehci_hcd]) from [<802a5cec>]
(platform_drv_probe+0x18/0x1c)
[<802a5cec>] (platform_drv_probe+0x18/0x1c) from [<802a4a14>]
(driver_probe_device+0x98/0x1a4)
[<802a4a14>] (driver_probe_device+0x98/0x1a4) from [<802a4bac>]
(__driver_attach+0x8c/0x90)
[<802a4bac>] (__driver_attach+0x8c/0x90) from [<802a4254>]
(bus_for_each_dev+0x60/0x8c)
[<802a4254>] (bus_for_each_dev+0x60/0x8c) from [<802a3be0>]
(bus_add_driver+0x184/0x25c)
[<802a3be0>] (bus_add_driver+0x184/0x25c) from [<802a51a0>]
(driver_register+0x78/0x13c)
[<802a51a0>] (driver_register+0x78/0x13c) from [<7f065058>]
(ehci_hcd_init+0x58/0x88 [ehci_hcd])
[<7f065058>] (ehci_hcd_init+0x58/0x88 [ehci_hcd]) from [<8003b4c4>]
(do_one_initcall+0x30/0x16c)
[<8003b4c4>] (do_one_initcall+0x30/0x16c) from [<800aa428>]
(sys_init_module+0x84/0x19c)
[<800aa428>] (sys_init_module+0x84/0x19c) from [<80041580>]
(ret_fast_syscall+0x0/0x30)
Code: 80aaee48 e92d4010 e30e4e48 e34840aa (e590005c)
---[ end trace 719afdfe4af3a442 ]---
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Confirmed from OV, the missed setting for light_frequency need to be added.
Signed-off-by: Robby Cai <R63905@freescale.com>
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After the patch of auto-detection for sensor pushed, there's a need to
read sensor ID in probe function. But on MX6SL, MCLK is not enabled at
that time. So need to enable it before read sensor ID.
Signed-off-by: Robby Cai <R63905@freescale.com>
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Need power on the sensor for its initialization, otherwise the sensor can
not work properly.
Signed-off-by: Sheng Nan <b38800@freescale.com>
Signed-off-by: Robby Cai <R63905@freescale.com>
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Fix display twinkling issue when video playback on LVDS during suspend/resume.
The issue happens when the rootfs application Xfbdev calls fb_set_var() for IPU
BG fb to unblank the console, so it wants to reinitialize the IPU BG. However,
IPU FG is still being used for video playback.It is reasonable to refuse
reprogramme because of the resources confilct.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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This patch removes unnesessary header files in the driver.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 871c22325d619ee1c4d2107ab9298e7ef5193c21)
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ADV7180 power down/on can be controlled by a gpio
pin or i2c register setting. The PDBP bit in 0x0f
register chooses the control source, and the PWRDWN
bit in 0x0f register chooses to power down the chip
or power on the chip if control source is i2c.
This patch removes all gpio pin power down/on code
after probe function and uses i2c to do power down/on
operation, as some boards may choose to not connect
ADV7180 power down pin with AP, however, AP's i2c bus
has to be connect with the ADV7180 chip.
Moveover, this patch also adds a 400ms sleep after
the chip is powered on, which is a workaround for
preview scrolling issue(we suspect that the chip
needs some time to in a stable status, so that it
may sends correct data to AP).
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit fc214fa7a0d6cf12cba45b7e269e983d8281e1ad)
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commit f8e1a3bb62eecf93a31a51c4dbe08a0214fa1d57 introduced an
annoying kernel log by changing a pure debug info to error level.
This patch reverts that change.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 289cc885ae097bbf9849cb266679a2969e5c39a9)
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commit f8e1a3bb62eecf93a31a51c4dbe08a0214fa1d57 added a hard
coding for csi_parma.mclk setting to 27MHz. The comment added by
that commit is totally wrong by telling that csi_param.mclk
would be a kind of 'pixel clock' set in 'csi_data_dest' register.
This patch removes the unnecessary mclk setting for csi_param.mclk
variable, since it is only valid for CSI test mode.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 5fed1e3fde2d63c80f414f204734d35ceecef561)
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This patch removes test mode clock setting in function
ipu_csi_init_interface(), since the setting is only
necessary for function _ipu_csi_set_test_generator().
This unnecessary setting is added wrongly by commit
f8e1a3bb62eecf93a31a51c4dbe08a0214fa1d57.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 482c30821d0aad0ab500a9d5db95654917986a3c)
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We reversed CCIR code1/2 setting before, which may brings
captured frame quality issue(jaggy edge can be seen). This
patch revert that change.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit abdb4369f6ebcd90656b5fc319ee79eeb3bec7c5)
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Fix NULL pointer bug when IPU BG EOF interrupt occur before register irq handler
It can be reproduced on MIPI DSI display on i.mx6dl SabreSD board.
The sequence is:
a) enable display channel
b) pan display (fb_set_var()) -> ipu_enable_irq
c) ipu_request_irq
If an EOF interrupt comes before c and after b, the issue happens.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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This patch is to
1) add clock enablement before access EPDC registers, otherwise system may hang.
And,
2) fix unbalanced disablement for PMIC regulators
------------[ cut here ]------------
WARNING: at drivers/regulator/core.c:1422 _regulator_disable+0xf8/0x12c()
unbalanced disables for VCOM
Modules linked in:
[<80040518>] (unwind_backtrace+0x0/0xf8) from [<800671d8>]
(warn_slowpath_common +0x4c/0x64)
[<800671d8>] (warn_slowpath_common+0x4c/0x64) from [<80067284>]
(warn_slowpath_fmt+0x30/0x40)
[<80067284>] (warn_slowpath_fmt+0x30/0x40) from [<8024ef60>]
(_regulator_disable+0xf8/0x12c)
[<8024ef60>] (_regulator_disable+0xf8/0x12c) from [<8024efc4>]
(regulator_disable+0x30/0x70)
[<8024efc4>] (regulator_disable+0x30/0x70) from [<80241044>]
(mxc_epdc_fb_shutdown+0x18/0x84)
[<80241044>] (mxc_epdc_fb_shutdown+0x18/0x84) from [<80277f64>]
(platform_drv_shutdown+0x18/0x1c)
[<80277f64>] (platform_drv_shutdown+0x18/0x1c) from [<802751d0>]
(device_shutdown+0xac/0x124)
[<802751d0>] (device_shutdown+0xac/0x124) from [<8007812c>]
(kernel_restart_prepare+0x30/0x38)
[<8007812c>] (kernel_restart_prepare+0x30/0x38) from [<80078140>]
(kernel_restart+0xc/0x48)
[<80078140>] (kernel_restart+0xc/0x48) from [<80078290>]
(sys_reboot+0x10c/0x1c4)
[<80078290>] (sys_reboot+0x10c/0x1c4) from [<8003ad40>]
(ret_fast_syscall+0x0/0x30)
---[ end trace e392f5dd2f75e1a5 ]---
------------[ cut here ]------------
WARNING: at drivers/regulator/core.c:1422 _regulator_disable+0xf8/0x12c()
unbalanced disables for DISPLAY
Modules linked in:
[<80040518>] (unwind_backtrace+0x0/0xf8) from [<800671d8>]
(warn_slowpath_common+0x4c/0x64)
[<800671d8>] (warn_slowpath_common+0x4c/0x64) from [<80067284>]
(warn_slowpath_fmt+0x30/0x40)
[<80067284>] (warn_slowpath_fmt+0x30/0x40) from [<8024ef60>]
(_regulator_disable+0xf8/0x12c)
[<8024ef60>] (_regulator_disable+0xf8/0x12c) from [<8024efc4>]
(regulator_disable+0x30/0x70)
[<8024efc4>] (regulator_disable+0x30/0x70) from [<8024104c>]
(mxc_epdc_fb_shutdown+0x20/0x84)
[<8024104c>] (mxc_epdc_fb_shutdown+0x20/0x84) from [<80277f64>]
(platform_drv_shutdown+0x18/0x1c)
[<80277f64>] (platform_drv_shutdown+0x18/0x1c) from [<802751d0>]
(device_shutdown+0xac/0x124)
[<802751d0>] (device_shutdown+0xac/0x124) from [<8007812c>]
(kernel_restart_prepare+0x30/0x38)
[<8007812c>] (kernel_restart_prepare+0x30/0x38) from [<80078140>]
(kernel_restart+0xc/0x48)
[<80078140>] (kernel_restart+0xc/0x48) from [<80078290>]
(sys_reboot+0x10c/0x1c4)
[<80078290>] (sys_reboot+0x10c/0x1c4) from [<8003ad40>]
(ret_fast_syscall+0x0/0x30)
---[ end trace e392f5dd2f75e1a6 ]---
Signed-off-by: Robby Cai <R63905@freescale.com>
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