Age | Commit message (Collapse) | Author |
|
Enhance nvhost_debug_dump() output, as follows:
- Swap FIFO and GATHER dump so that even if GATHER dump blows out
seq_printf 1k buffer, we still have FIFO information;
- Write FIFO signature pattern (0xd???d???) to indirect save input
data to help pinpoint FIFO position within debug dumps;
- Prevent long data sequences from blowing out the seq_printf 1k
buffer, by limiting such sequences to 64 words.
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/62424
(cherry picked from commit cb37e4212b78546411b33b32044f30feb0579b86)
Change-Id: Ia2695c502fa0c7b755ef2ae51260650c7d67bf86
Reviewed-on: http://git-master/r/64061
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
Synchronize 3D wait base only when there is a timeout.
Bug 886411
Reviewed-on: http://git-master/r/62656
(cherry picked from commit 1f660b9ea615331624dcf8a923e7779fa3bcd48a)
Change-Id: I085342ae2d9808c1284d59222f968835bd469921
Reviewed-on: http://git-master/r/64060
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
Any of the KBC GPIO pins can be configured to either as row or as
column. Adding support for this.
bug 804531
Reviewed-on: http://git-master/r/59927
(cherry picked from commit 59b90aa62766d34290e623fc6e2dfc8fc630af0e)
Change-Id: I01100fc6964278940b97428a3df561616f356f2f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/64034
|
|
After allocating pages, Update page attributes in kernel
page table as per mem type requested.
Bug 865816
Reviewed-on: http://git-master/r/56334
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
(cherry picked from commit bea4d449f4ff7090e0c2797693d2348f4586d8f6)
Change-Id: Ic1fe862412c09f57d1dbf05a1da98fd22d0d49a4
Reviewed-on: http://git-master/r/62720
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Hiro Sugawara <hsugawara@nvidia.com>
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
|
|
Moving sleep enable setting from suspend to resume.
And add sleep enable setting into probe.
Bug 849360
Original Author: Jinyoung Park
Reviewed-on: http://git-master/r/60656
(cherry picked from commit 9ba5f1f22d73fe62d0f509fd6cad26f34e25a017)
Change-Id: I84496fcf09daec08e01ebb8d976716e1197502b1
Reviewed-on: http://git-master/r/62381
Reviewed-by: Min-wuk Lee <mlee@nvidia.com>
Tested-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Fixing Indentation as suggested by checkpatch.pl
Reviewed-on: http://git-master/r/60223
(cherry picked from commit c6f12245ad1cec0c18d91e664a71c30f51a4231f)
Change-Id: I6e59be4117853d8855dc88515ae1c283f5881837
Reviewed-on: http://git-master/r/62903
Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
|
|
Make SNOR controller address mapped as platform resource.
Change-Id: I2d52934d6f953fab126d4a4044b2dc49d617b99d
Reviewed-on: http://git-master/r/59137
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
|
|
Get timing register value from platform data
instead of timing structure.
Fix NOR device registration using tegra_nor_device.
Signed-off-by: Manoj Chourasia <mchouraia@nvidia.com>
Change-Id: I4ece8b149df1bc7ad41e8be3dc3e415b18a44072
Reviewed-on: http://git-master/r/56889
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
|
|
move the set mode table from odm driver to the kernel driver.
Bug 856739
Original Gerrit: http://git-master/r/#change,60741
(cherry picked from commit 18e2d9f8b61767a4dc0df7621531d1b040fe3ca0)
Change-Id: Ic7321bd88e01accd0a09a96c4ba406b139a08f54
Reviewed-on: http://git-master/r/61664
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Tested-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
Moving the configuration function for configuring the
rail control through the PREQ line to core from regulator
driver.
Fixing the correct voltage configuration for the LDO2 based
on TRACK mode.
Reviewed-on: http://git-master/r/62456
(cherry picked from commit db37514bdefc6126556a9e84c12f7e49b656d7ba)
Change-Id: I0eda24c2896956713bd0ad2ace52a07578f6a629
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/63503
|
|
Setting controller clock rate to 100MHz if requested rate is between
12-100MHz and 208MHz if requested rate is greater than 100MHz.
Bug 877336
Reviewed-on: http://git-master/r/55434
(cherry picked from commit a8eef6207abb643dedaeab9dd3a230eb6c169512)
Change-Id: I6bae2a81f44fe448cc6286dbe00093283b42b3a8
Reviewed-on: http://git-master/r/62418
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
|
|
Flush needs to send error codes to user space instead of suppressing
them.
Bug 886411
Reviewed-on: http://git-master/r/62385
(cherry picked from commit 357f4f8c8cc31713a32a26488e7f2031e5fff842)
Change-Id: Ibec16d062242d2bdc7bc57cba7b264141decffc5
Reviewed-on: http://git-master/r/63219
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
Set correct power state for modules during boot-up. This is done by
splitting nvhost_module_init() into two parts: preinit and init. Preinit
sets correct power state, and is called for all modules during boot-up.
Init calls pre-init and performs the rest of initialization of
nvhost_module structure.
Bug 855755
Reviewed-on: http://git-master/r/62102
(cherry picked from commit 003df5ddd4fcffca9b7456cdb1150cfc041f406c)
Conflicts:
drivers/video/tegra/host/nvhost_acm.c
Change-Id: I807f0c3608b1859bcbd7e8bfcb6ed27d6cdb1a80
Reviewed-on: http://git-master/r/63218
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
Enable power gating for MPE and 3D in T30.
Bug 857044
Reviewed-on: http://git-master/r/62101
(cherry picked from commit 4fd4d2a948450f04181179f5f1e4da7b6c9e3060)
Change-Id: Ia9506fd188e31770d447faa25cf7b00adaca894a
Reviewed-on: http://git-master/r/63217
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
Fix signature of show_channel_gather().
Reviewed-on: http://git-master/r/58398
(cherry picked from commit c1082bc73106b270b904cec80cca201a3caad472)
Change-Id: Ib16aaf411fba682e78b151f295c981783f0ebd58
Reviewed-on: http://git-master/r/63216
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
If an overlay is not being used, do not program the latency allowance.
This is to avoid underflows that occur at a resolution of 19x12. When the
unused overlays are reenabled, they underflow if the latency allowance has
previously been increased to a very high value.
(cherry picked from commit 8a4c47b17fae10a65e4816e419dff46b9f4785d1)
Change-Id: I825b4c1659a9f4f982bc66513b08b95879f17dd5
Reviewed-on: http://git-master/r/62522
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
|
|
Add MIPI DCS short write (1 parameter) support.
The cmds sent with this new function will be sent every frame by hardware
Signed-off-by: Ming Wong <miwong@nvidia.com>
Bug 884157
(cherry picked from commit 855cac72bf030213db6fa1e42ce4e5891b16681c)
Change-Id: I5c4e8696195d01f4f9dfb8cf66b5b3744f78c41e
Reviewed-on: http://git-master/r/62300
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
|
|
Added support for EDP in tsensor. Since low limit
interrupts are not supported in hardware TH2 was
used for upper limit and TH0/TH1 as lower limit.
Also added generic functions to enable tsensor for
thermal refactoring.
Bug 848755
Reviewed-on: http://git-master/r/59234
(cherry picked from commit ec630418497accc9b326bb6b2126b7d62ad56e50)
Change-Id: If9f4d697d0c44653f83db86ccd2f6935bf209cb5
Reviewed-on: http://git-master/r/63345
Reviewed-by: Joshua Primero <jprimero@nvidia.com>
Tested-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
|
|
Preparing nct1008 for refactoring overhaul. Added
generic functions which will be used by Tegra thermal
module.
Change-Id: I34cbc5c84d9dd6e5f29cd631323bb8755899c5f7
Reviewed-on: http://git-master/r/57952
Reviewed-on: http://git-master/r/63337
Reviewed-by: Joshua Primero <jprimero@nvidia.com>
Tested-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
|
|
Temporarily disable support since it appears the
modeset to 1080p takes longer than anticipated.
Re-enable once issue has been fixed.
Bug 869099
Reviewed-on: http://git-master/r/#change,51833
(cherry-picked from change I4d596e33016a3723bca9bdb707cedd993a18f71b)
Change-Id: Ifa08a9bd9d0415e0f9f09b13c83e34d3ef4fc1a9
Reviewed-on: http://git-master/r/53891
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Dhiren Bhatia <dbhatia@nvidia.com>
Tested-by: Dhiren Bhatia <dbhatia@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
|
|
Moving the sleep sequence configuration for the pmu from
regulator driver to core driver so that other than power rails,
gpio can also use these APIs.
Reviewed-on: http://git-master/r/62652
(cherry picked from commit eeb7d4a5fabe803e9c76900ff1aa1d71e8111c75)
Change-Id: I2bcb751d25e59939e2c7119dc131df11d10fdfa9
Reviewed-on: http://git-master/r/62901
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
Acquire the spin lock before disabling the clock.
Bug 876433
Reviewed-on: http://git-master/r/59136
(cherry picked from commit 38dc376fc332bdc34a9ee9fd9385fd447a0f343d)
Change-Id: Ib2f75f4c16d5ad56e698e14b335f2483f0ece429
Reviewed-on: http://git-master/r/62324
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
|
|
kernel mutexes may not be used in hardware or software interrupt
contexts such as tasklets and timers.
Bug 876433
Reviewed-on: http://git-master/r/56938
(cherry picked from commit ebe88906855200ce846059e80b722d1badced378)
Change-Id: Id324b53e57eec08d75b147ac18498844ae59b6d2
Reviewed-on: http://git-master/r/62323
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
|
|
replaced space with tab in multiple places.
Reviewed-on: http://git-master/r/54677
(cherry picked from commit a7b9fd1a1cf2d99db16acf3bc6aa4da44f1d38c2)
Change-Id: I4860b15d0d2d40e85649212994dd99b05ee920cc
Reviewed-on: http://git-master/r/62322
Reviewed-by: Venkata Jagadish <vjagadish@nvidia.com>
Tested-by: Venkata Jagadish <vjagadish@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
The scan timeout of the continuous mode can be calculated based on
init delay, repeat delay, debounce count and number of active row.
It also depends on how many scan need to be done before kbc change
the mode from continuous to wakeup mode.
Providing mechanism to select the scan count from platform data
and calculating the scan timeout count based on above parameters.
bug 876712
Reviewed-on: http://git-master/r/61060
(cherry picked from commit 830fbf574f7d545926a4ed3fd2433585688b884b)
Change-Id: Ibced5559af2d2b0f87de626d86d16e6127b9b2fb
Reviewed-on: http://git-master/r/62591
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
|
|
Updated rtc-max77663 driver for alarm interrupt.
- Enable alarm for sec, min, hour, mday, month and year except wday,
because sometimes wday value is not matched with requested alarm time.
- Set alarm to wake-up event from sleep mode.
- Add max77663_rtc_irq_mask and max77663_rtc_irq_unmask functions.
- Fix incorrected wday calculation.
- Clean-up the codes.
Bug 849360
Original Author: Jinyoung Park
Reviewed-on: http://git-master/r/60655
(cherry picked from commit 80acd66deffa20a391e5324fc9038b7fab42d08d)
Change-Id: Ic54be1c44608de71909b4caa274fe8889bfb3846
Reviewed-on: http://git-master/r/62380
Reviewed-by: Min-wuk Lee <mlee@nvidia.com>
Tested-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
Addition of AC power supply property (POWER_SUPPLY_PROP_ONLINE)
so as to display power plug as AC while charging from usb
wall charger.
Reviewed-on: http://git-master/r/58039
(cherry picked from commit 38de3b3031e827c5212e20c1facbe818eb5600fc)
Change-Id: I454a5c95033cf1abfc569bec146a452bcd568dbe
Reviewed-on: http://git-master/r/61832
Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Tested-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
Exit fuel-gauge driver if battery presence is not detected.
bug 873965
Reviewed-on: http://git-master/r/54789
(cherry picked from commit 0adbe7449cf2a8a4752077824649a113e967bf90)
Change-Id: I843eab12a98516b29c45eff16d105e06b0bac735
Reviewed-on: http://git-master/r/61830
Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Tested-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
The sleep enable is required that AP can be placed MAX77663 into sleep mode
by pulling EN1 input low.
Bug 849360
Original Author : Jinyoung Park
Reviewed-on: http://git-master/r/59477
(cherry picked from commit 469106a1f8cf8d080f06ae0d2e8d0b2aa4bf3e4b)
Change-Id: I71897dd77eb2e0908c24896d11616f71178e3876
Reviewed-on: http://git-master/r/62378
Reviewed-by: Min-wuk Lee <mlee@nvidia.com>
Tested-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
The MAX77663 PMU has under-shooting issue when voltage down scaling
on SD power rails until revision 3. So if revision is less than rev3,
set safe_down_uV for stable down scaling.
Original Author: Jinyoung Park
Reviewed-on: http://git-master/r/56950
(cherry picked from commit b685f87ea655919e0bf0efb3a1bdddf5d1a3abbb)
Change-Id: Id447604b77f53a7451af00e76bda862c800cf9a3
Reviewed-on: http://git-master/r/62376
Reviewed-by: Min-wuk Lee <mlee@nvidia.com>
Tested-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Increase minimum loop count when checking for stuck syncpoint,
before triggering debug_dump()->BUG_ON(), to account for some
lengthy context-save operations. Now increased to
15 loops * 2s wait (SYNCPT_CHECK_PERIOD) per loop.
(Wait per loop may be less depending on user-specified timeout
for nvhost_syncpt_wait_timeout().)
Bug 834337
Reviewed-on: http://git-master/r/61412
(cherry picked from commit 5b13d80dc21855c52f53a67471453ea6e95e61f9)
Change-Id: Id4bab93ccc4eff22d2dd3a49b8c7df6cac95bff3
Reviewed-on: http://git-master/r/62367
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
Add listing of wait bases and their values to debug output.
Reviewed-on: http://git-master/r/60389
(cherry picked from commit 16afc5516433d4a66d838c5a339ab8c07f4b42fa)
Change-Id: Ibdff91ee818a34acbe94a8a716e4cf7ca878d0d2
Reviewed-on: http://git-master/r/62366
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
Add locking and checking for error codes to the output of
tegra_host/status debugfs entry, and clearing of freed memory.
Bug 840976
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/60231
(cherry picked from commit 811a722b7fe3e21357a8aa7b6cfb8b9f552b7de7)
Change-Id: I566eac09b1f93e577c9fd8d957c7b94dff16d05b
Reviewed-on: http://git-master/r/62365
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
Add opcodes to synchronize the wait base for each channel at the
beginning of each submit. This adds robustness towards misbehaving user
space.
Context clear for robustness clears the opcodes for synchronizing the
wait base. This change also removes that part of robustness.
Bug 886411
Reviewed-on: http://git-master/r/60423
(cherry picked from commit c3740abf73ef6b7fd9b7de5bc4b6615ba25adf5e)
Change-Id: I339489a4156eef8529f01b29453f46b875389718
Reviewed-on: http://git-master/r/62364
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
Add hwctx pointer to timeout structure. This makes sure the correct
hardware context is cleared.
Bug 886411
Reviewed-on: http://git-master/r/61449
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
(cherry picked from commit 7e2fb5bb2985373e869079ee7c628c1694216f21)
Change-Id: I285915ea7691dfac26caeec82bd3ea6c2ea0cc58
Reviewed-on: http://git-master/r/62363
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
Add extra syncpt debug info and kernel panic when device stuck
waiting at syncpts.
Tested by inducing syncpt stuck-wait by bypassing nvhost_syncpt-
_cpu_incr.
Bug 822880
Bug 820056
Bug 818058
Bug 810463
Bug 803452
Reviewed-on: http://git-master/r/60206
(cherry picked from commit e73caae974f43ac5bf30589fc3cbc1fa66df926e)
Change-Id: Ia9a99cad17cbf49bf2fb860f783d0e94de0cec8e
Reviewed-on: http://git-master/r/62355
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
Add timeout to throttling low-priority thread. Low priority threads are
allowed to push work either when push buffer is empty, or when they've
waited for a pre-defined period. Setting the period to 50ms for now.
Bug 864407
Reviewed-on: http://git-master/r/58330
(cherry picked from commit a9469db8c4c04fa7cd8f080bafdca26d99a3018c)
Change-Id: I80034188f177ae8721799a085baac0790da1f3b4
Reviewed-on: http://git-master/r/62351
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
vbus regulator init should be done before the otg is set, once otg is
set otg calls the fsl_vbus_session while the fsl_udc_probe is still
under execution, causing a crash in the regulator code, as the regulator
is not set to NULL.
Reviewed-on: http://git-master/r/60167
(cherry picked from commit 594dd8dbaa6bf62f1859c54d58362ec12fa71a56)
Change-Id: I6adccb43f7859d5097257f441199b02a86b9fc66
Reviewed-on: http://git-master/r/62337
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Change the trigger for the wake events. The WAKE_ON_CONNECT bit should not
be cleared until the PCD_STS bit is set.
Bug 881388
Reviewed-on: http://git-master/r/55436
(cherry picked from commit efd628d15d4be1355c3eb4318935083149028a98)
Change-Id: I4e581c31030574ba1b353a12e42022c2a41ec313
Reviewed-on: http://git-master/r/62335
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
|
|
Adding remote wakeup support.
Bug 805906
Reviewed-on: http://git-master/r/52620
Original Author: vmoganty
(cherry picked from commit e796581d9baee3317b65771637ec59b76191391f)
Change-Id: I73f05f07def8cf7beedbb6c4c5bc5814cbf66994
Reviewed-on: http://git-master/r/62332
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Using static strings and not platform data for the rail names.
Getting the appropriate regulators based on the generic name
and the device structure.
Bug 876282
Reviewed-on: http://git-master/r/53782
(cherry picked from commit dc8c38c814219971eee69e4b122cc06de6231439)
Change-Id: Iac034e76491ec7cb9bde10e2e11515a656a36f4a
Reviewed-on: http://git-master/r/62328
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
While disconnecting resetting the delayed status.
Bug 880779
Reviewed-on: http://git-master/r/59334
(cherry picked from commit 0ce16e3edfc4346ea11ef5717d426a2f78eaef2d)
Change-Id: Ia10b6356413762c3b67c1acf1761992aea152202
Reviewed-on: http://git-master/r/62034
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Supporting the different rails control through the external
control signal PWRREQ1 and PWRREQ2.
Reviewed-on: http://git-master/r/61064
(cherry picked from commit cf9e364653619eb4ba7cfdc9899d3ed39bae2400)
Change-Id: I7f7cbc167884419a7e8a140942faa383d7790732
Reviewed-on: http://git-master/r/61898
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
|
|
Add support of Sunny P8M01E module (AKA aptina 8141)
This new module is identical with 8140 plus pixel improvement.
Use different recommended register settings for each sensor.
Add function to figure out the sensor id and let the odm driver
pick up the right config data.
Bug 868929
Original Gerrit: http://git-master/r/#change,53022
(cherry picked from commit f59f83468f71980c9ce3204df3a34f2aafffc512)
Change-Id: I127f775a7bc25bdbbb2bec27984249ca0074b7ae
Reviewed-on: http://git-master/r/60967
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Tested-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
|
|
1. Code cleaning so it can compile
2. Adding Makefile and Kconfig
3. changes in pn544 driver to condition use of
firmware download gpio
Bug 846684
Bug 873017
Reviewed-on: http://git-master/r/57329
(cherry picked from commit ddde05ce297da3038a770d575bc27bdfe7444c35)
Change-Id: I5f3f0791e35140aa6b3985b61ac4e3a5f3a2de8b
Reviewed-on: http://git-master/r/59301
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Bug 846684
Bug 873017
Reviewed-on: http://git-master/r/55880
(cherry picked from commit 9ed3de486a47dfc8598e73157bccd76ff518048b)
Change-Id: I30c00d06027585237a3870fe485623b060e7dcc2
Reviewed-on: http://git-master/r/59292
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Resetting the mode does not need to reset all of the i2c
registers. This used to be called "fast set_mode". This
is added into the kernel driver in this change. This
change reduced 90ms from resetting the mode. It only
apply to still preview and capture resolutions
bug 816814
Reviewed-on: http://git-master/r/53587
(cherry picked from commit e0f1e9c61daa5faacb0e5cb404357f7e3284c8ae)
Change-Id: I5027bad3cd534e850791b26a118783db441c45ef
Reviewed-on: http://git-master/r/59660
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
|
|
This patch is based on "video: tegra: dc: use mask to control
interrupts", so we do not use DC_CMD_INT_ENABLE to disable IRQ.
Bug 888207
Bug 870801
Reviewed-on: http://git-master/r/58176
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
(cherry picked from commit 6feaad5a74a934f604f5d25220afff478c43736d)
Change-Id: I6b7eba2bcca89be2177e3f1c3a672151248848ad
Reviewed-on: http://git-master/r/62236
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>
|
|
Use the enable irq register during init, and mask irq register to
control the interrupts to avoid a race in clearing interrupt status.
Clear mask and enable during DC disable.
Bug 888207
Bug 870801
Reviewed-on: http://git-master/r/57603
Reviewed-by: Xin Xie <xxie@nvidia.com>
Tested-by: Xin Xie <xxie@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit 4640498bd8d46b6c5c1898d8ca8c9760416d1eae)
Change-Id: I9ccf103a9cfcb9fda7f2247a370d9ccde12d611f
Reviewed-on: http://git-master/r/62235
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>
|
|
Tegra2 doesn't have VE powergate. VE powergate should be turned
off in probe function for Tegra2.
Bug 855758
Bug 878057
Change-Id: I96386270e41c31c16b64743fb0bec80fb9d1fecc
Reviewed-on: http://git-master/r/61944
Reviewed-on: http://git-master/r/62192
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Tested-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
|