Age | Commit message (Collapse) | Author |
|
in some situations
BUG 868649
Change-Id: I4db69fd28bba82b9fed73e63947c0fb5ad56f732
Reviewed-on: http://git-master/r/50598
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Tested-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
Added is_open to know whether the clock has been disabled.
Occasionally _close is called before _suspend during LP0 cycles
resulting in a hang as the clock is disabled.
Bug 855753
Change-Id: I0b2dd890d275d5e41c2f4ab2450207950469d479
Reviewed-on: http://git-master/r/50218
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
This patch adds NOR mapping driver for tegra2 and tegra3.
Signed-off-by: Manoj Chourasia<mchourasia@nvidia.com>
Change-Id: Iea5107f967b2500012586349f1c83d076677319a
Reviewed-on: http://git-master/r/43566
Tested-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
|
|
This is a (expected to be a) temporary hack to make the driver
working. Without this CL, the ethernet device does not receive
any packet.
Change-Id: Iad9f39fe8f5d653e07f8213db2aa103c70aadb8f
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/52933
Reviewed-by: Allen Martin <amartin@nvidia.com>
|
|
The code is based on source from Realtek Web-site (as is).
Source version: 8.025.00
Change-Id: Id8b380513ca95bd0b4ce7e4218cb5c1278730550
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/52726
Reviewed-by: Allen Martin <amartin@nvidia.com>
|
|
Change-Id: I48a3fc3d895e838fe8016be2b67f82e45150fe7c
Reviewed-on: http://git-master/r/52239
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Amlan Kundu <akundu@nvidia.com>
|
|
Don't allow root user allocating more than iovm limit to avoid pin
time issues.
Bug 864535
(cherry picked from commit 21e30b0910d6ee38eb7f1e68e21507a80758c74d)
Change-Id: Iad02b5e06ff4f2ab7bf2d3d99875bb3bf018c5ab
Reviewed-on: http://git-master/r/53855
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
|
|
After allocating pages, Set page attributes as per mem type
requested.
Change-Id: I972ec3613e529b64ba7d1d417c06c235fe1d3633
Reviewed-on: http://git-master/r/49882
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
|
|
revert previous submissions and create the ground for a fresh start
Change-Id: I42d022e46d359a1642d25a0da81a5fbe3fbc3e03
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/52725
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
|
|
Signed-off-by: Chris Ball <cjb@laptop.org>
Tested-by: Chris Ball <cjb@laptop.org>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Andrew Chew <achew@nvidia.com>
Change-Id: Ib4331ca6cc6339754dab53f5eea60398fe8a389e
Reviewed-on: http://git-master/r/53024
Reviewed-by: Allen Martin <amartin@nvidia.com>
|
|
The old limit of number of minor numbers per mmcblk device was hardcoded
at 8. This isn't enough for some of the more elaborate partitioning
schemes, for example those used by Chrome OS.
Since there might be a bunch of systems out there with static /dev
contents that relies on the old numbering scheme, let's make it a
build-time option with the default set to the previous 8.
Also provide a boot/modprobe-time parameter to override the config
default: mmcblk.perdev_minors.
Signed-off-by: Olof Johansson <olof@lixom.net>
Cc: Mandeep Baines <msb@chromium.org>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Andrew Chew <achew@nvidia.com>
Change-Id: I86de89c4fae878f077743f58127cc8afa0c58f2a
Reviewed-on: http://git-master/r/53023
Reviewed-by: Allen Martin <amartin@nvidia.com>
|
|
Mark the dependencies of dc driver on switch class explicit,
using proper pre-processors.
Bug 877239
Change-Id: I977f24173a0e19f3371afbd82c70bdc00aad41f4
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/52679
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>
|
|
Bug 871094
Change-Id: I9bb194c5a56477adfdcbca74117e9d473c1354eb
Reviewed-on: http://git-master/r/52492
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
Android framework code has been modified to no longer need kernel
support. Removing that support.
This reverts commit d827065381dbcd0d4884267b86397fb2af009c21.
Change-Id: I7fd9b13505dba6b8767316b526d36c5affde9914
Reviewed-on: http://git-master/r/51731
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
|
|
This reverts commit 03e9285cdc365ce1fa21fff224372dd8e5d883bd.
Change-Id: I2991f35046f5a74caf3f38c80d18c949a57a8cd0
Reviewed-on: http://git-master/r/51050
Reviewed-by: Luke Huang <lhuang@nvidia.com>
Tested-by: Luke Huang <lhuang@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
The code is based on source from Realtek Web-site. Source version: 8.025.00
Change-Id: I0ed32e516e1bd4bedfcdbd7fa23c94790d123916
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/52069
Reviewed-by: Allen Martin <amartin@nvidia.com>
|
|
Various attributes of windows which are currently being updated are
displayed with these debug messages. It also adds debug messages to
show processes using overlays.
Change-Id: I36518320bbf46fb5c1041176c91323d7bbabdc7a
Reviewed-on: http://git-master/r/51979
Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
|
|
Removed the polling/PMC based method for the usb hotplug detection.
Bug 865094
Change-Id: I6c41907aae35b52d9be01210bf206cb407b4a9d4
Reviewed-on: http://git-master/r/51082
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
|
|
Add powergating for vi, csi and isp in tegra_camera
Bug 855758
Change-Id: Ib5e79883f5e166a7e64096b6c739a654a44bd4d4
Reviewed-on: http://git-master/r/49923
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Tested-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
|
|
Optimizing the time require to change the voltage by using the
register caching.
bug 870689
Change-Id: Ib9999dac1812256b58ce128bdb692a7ffd4129cd
Reviewed-on: http://git-master/r/51754
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
|
|
Refactor nvhost_acm.c so that module specific code can be separated from
generic code:
* Module clock and power op descriptions added to channelmap table
* New module busy/idle interface added
* 3D clock scaling for Tegra3 moved behind the module busy/idle API
* 3D power off code moved to 3dctx where it belongs
* Module power on API removed as there were no users
* Get/Set rate moved to Tegra3 specific file
Bug 870791
Change-Id: I2c1612dcadd90046f43f9d81ff790a6d9e7d9804
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
(cherry picked from commit b01476638647e10cfc914da9e0c75996e0e71ae6)
Reviewed-on: http://git-master/r/50280
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Ilan Aelion <iaelion@nvidia.com>
Tested-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
GRHOST should be buildable without IOVMM (i.e. with carveout only)
Bug 870898
Change-Id: I1f40b8356b0bb75b42379a0aa79bd410b395c53f
Reviewed-on: http://git-master/r/49478
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Made kernel boot up with CONFIG_TEGRA_IOVMM=n
Change-Id: I02dead119bc232622abf494d29cbe4d4b13d7131
Reviewed-on: http://git-master/r/49476
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
ISP needs the vertical output size to be a little more
than the actual resolution. Change vertical size to
1088 for 1920x1080 mode.
Bug 870687
Change-Id: I4b24234b74c88577e04bed0c81c89bca38e2fa87
Reviewed-on: http://git-master/r/51146
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Tested-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-by: Shiva Dubey <sdubey@nvidia.com>
Reviewed-by: Krupal Divvela <kdivvela@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
|
|
Adding delays in set_voltage to stablize the voltage as per
voltage slew rate when changing the voltage.
bug 872382
Change-Id: I2e0d68a5b83b906912ca9e31db6b845ed8fd213e
Reviewed-on: http://git-master/r/51324
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
|
|
Corrected regulator handling of NCT1008
bug 869217
Change-Id: I2cf72abe7b5a14fbe03463bbd4105f0b0bac34d9
Reviewed-on: http://git-master/r/51296
Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
Added delay to make sure register is updated.
Bug 864005
Change-Id: I975e1243501ea8512bdb26fa14a46bf5919e994e
Reviewed-on: http://git-master/r/51086
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Enable pd2vi_clk in case of Null sensor
Bug 870406
Change-Id: I29ab4e4d3d24a54b2eace84eeb8266582e53dd1f
Reviewed-on: http://git-master/r/50822
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Krupal Divvela <kdivvela@nvidia.com>
Reviewed-by: Prayas Mohanty <pmohanty@nvidia.com>
|
|
Change-Id: I40505c002c70a0c985889bba527f6ca9975fe66b
Reviewed-on: http://git-master/r/51026
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
Added 14ms delay for awaiting buffer update. So there is no need to
check update buffer flag bit on RTC_UPDATE1 register.
Bug 849360
Change-Id: I0b7434782a2338e3f0fdf6932d790ab7100a7c11
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/50987
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Address update for AVP OS
- 0x0ff00000 (last 1MB of IOVM)
- 0xeff00000 Tegra3 A01
Change-Id: I15305aadcc08f3deacb500ae04fd0983fe2e691a
Reviewed-on: http://git-master/r/50581
Tested-by: Gajanan Bhat <gbhat@nvidia.com>
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
|
|
This change supports PM313 with 19X12 panel.
The change uses PM313 in "Single input to Dual output" mode
Bug ID : 822980
Change-Id: Ibba1f116ea6e4b2626e451c66a39caca79055d0e
Reviewed-on: http://git-master/r/50215
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
|
|
Increasing RX DMA buffer size to 16K.
Bug 819411
Change-Id: Ib2dbce9893544b6f798cf091a8a5df2fc4ecee5b
Reviewed-on: http://git-master/r/49810
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
|
|
Bug 829327
Change-Id: I083aa6262ebdff133826089eaa9f773af5273fce
Reviewed-on: http://git-master/r/50871
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
|
|
some HDCP verification devices requires fast HDCP re-negotiation
after link verification failure. 1.75sec is too high to meet their
requirement
Bug 855002
Change-Id: I6f79606c20579d13ba504d2ff6d3ce6a01c7cbe9
Reviewed-on: http://git-master/r/44322
Reviewed-on: http://git-master/r/50794
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Tested-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
|
|
Debug code used to rely on being able to calculate the base address of a
pinned page by masking it. Now we always retrieve the physical address
from nvmap and find the correct command buffer using that.
Bug 840976
Change-Id: I6e370df47480c2968671194273bdd3c431afeb09
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/48105
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
|
|
When disabling a display, also disable its windows. This forces
applications to resend windows on hotplug and resume or they will see a
blank screen.
Bug 871107
Change-Id: I647cbc27fa8ce34b18dd3fbd270f9b8569d7f506
Reviewed-on: http://git-master/r/50204
Tested-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
|
|
Recommended LP freq for read and write is sometimes different.
Adding provision to use diff freq for read and write.
Bug 863030
Change-Id: I49e883754bbe1ce38418d8c6ce6548f9a65152d4
Reviewed-on: http://git-master/r/49197
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
|
|
The irq need to set as wake interrupt to wake from sleep
when interrupt receiving from MAX77663 PMU.
Bug 868996
Change-Id: I2081b7f7bee6a575b38d2e4408f1edce2fdc864e
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/50694
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Bug 829327
Change-Id: I1c250d5cfc8a501da4ccdc985169b48478ed87b8
Reviewed-on: http://git-master/r/50352
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
|
|
disable 3d clock scaling by default.
Change-Id: Iffbe99b1bc8438ab6fc8998d069ef81b1f701a38
Reviewed-on: http://git-master/r/50305
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
|
|
Bug 855811
For smoothness and rate-limiting, it is useful to synchronize input
events to flip. This patch adds a fake input device that emits an event
on each vsync. This allows the Android input framework, which has
significant infrastructure to monitor input devices in particular, to be
notified of vsync events.
Because there is no input event type/code for this behavior, we use an
undocumented protocol of emitting a single MSC_RAW type event with
scan-code 1. We also do not register ourselves for any other
buttons/keys, which should prevent our device node from being confused
with other input types.
Change-Id: Id5297d2cef93eb53737942b43b2b09b82dee5f6f
Reviewed-on: http://git-master/r/48539
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
|
|
nvhost_module_add_client(), nvhost_module_remove_client() and
nvhost_module_set_rate() need locking when accessing the client list.
Bug 870328
Change-Id: Idbf8298ec213dca2829f48e9aafd4173806ea00b
Reviewed-on: http://git-master/r/50259
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
|
|
Add ODM-programmable delay in DSI N-shot mode. The purpose is to
improvement power consumption for DIDIM for some cases (e.g. 30 fps
video playback).
Bug 867689
Change-Id: Ib5f1b08e720f3316fed3bd9c4311fce9e4f97286
Reviewed-on: http://git-master/r/49593
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
|
|
Corrected the condition which checks whether phy
should be powered off or not, depending on the
status of port connection.
Bug 867985
Change-Id: Id5a348b996d9938ffd0830f6ea44e7cc320f0364
Reviewed-on: http://git-master/r/50501
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
|
|
In QVGA 120fps mode, i2c reset commands are done twice.
One in "mode_320x240" and one in common "mode_end" which
would be done for all the modes commonly. So removed QVGA
mode specific one.
Bug 868680
Change-Id: I434cd1e7a9dd1be112ce4640e5d9f5d85e7bbc67
Reviewed-on: http://git-master/r/50459
Tested-by: Krupal Divvela <kdivvela@nvidia.com>
Reviewed-by: Shantanu Nath <snath@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Patrick Shehane <pshehane@nvidia.com>
|
|
Adding Active-discharge option for SDx rails.
bug 859415
Change-Id: Ia4d3933b9dbf4a0ec646c586f99a7411d2a93371
Reviewed-on: http://git-master/r/50281
Tested-by: Harry Hong <hhong@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Enable auto calibration for sdmmc1 and sdmmc3
by default.
Bug 799568
Change-Id: I713884717713304c26a34f76467f9cd011c91606
Reviewed-on: http://git-master/r/49860
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
as of now usb accessory disables everything else
other than adb. enable rndis along with usb
accessory to enable tethering.
Bug 854919
Reviewed-on: http://git-master/r/#change,48411
(cherry-picked from I658d1d150977e38b707ba4024a9deff3b0439cdc)
Change-Id: Icf3a92378d0ecd6f579515d6d45f469b05780c6a
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/49771
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Synchronize shutdown with suspend, this is to prevent
race condition between shutdown and suspend
Bug 798849
Change-Id: I61cc2a03cef15d1656ad41bfefff446910210ffd
Reviewed-on: http://git-master/r/49013
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|