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Calling regulator_disable causes system to crash when there
is no regualtor. It calls regulator_disable only when regulators
exist.
Bug 871860
Change-Id: I7b714ed2423721d47ebae708dd453600cbf42312
Reviewed-on: http://git-master/r/56078
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Tested-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
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Context to be restored needs to be reference counted. Otherwise a
sequence of process submitting the work and exiting before hardware
executes the work can result in access to memory that is not mapped
anymore.
Bug 870787
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Change-Id: I8f21db3ab85ab574d577a27081a5bbbf0f797968
Reviewed-on: http://git-master/r/55888
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
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Bug 834959
Change-Id: I01e9da153e961fd08744d97d367e4523be4da2eb
Reviewed-on: http://git-master/r/54861
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Change-Id: I57f9ca25b4313be276c6b8fff677944f6b07e2cc
Reviewed-on: http://git-master/r/54824
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Add regulators to PCA954x in case PCA954x is controlled
by programmable PMIC. Add two Vcc. One is for PCA954x itself
and the other is for I2C bus.
Bug 871860
Change-Id: Ieb68d556eeeb87982618f7dbdddab66340b9c70c
Reviewed-on: http://git-master/r/54745
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Tested-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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replaced space with tab in multiple places.
Change-Id: Ib89b6cc716c2edb194210d5c4979a903decb2f6e
Reviewed-on: http://git-master/r/54677
Reviewed-by: Venkata Jagadish <vjagadish@nvidia.com>
Tested-by: Venkata Jagadish <vjagadish@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Hotplug on usb is supported when hotplug flag is set in platform data
Bug 869745
Change-Id: I57ba0b18a2d4232b2df2074c91aff97c6e639e7d
Reviewed-on: http://git-master/r/54588
Tested-by: Artiste Hsu <chhsu@nvidia.com>
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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For board specific configuration, adding GPIO attributes such as push-pull,
pull-up, pull-down, direction, output level and alternate into platform data.
Bug 849360
Change-Id: I85c8e6ad397adf317cbc7f6d4bace8629091bad5
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/54429
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Bug 849360
Change-Id: I74b99b76570bf0731d39f63d87eb3f4f9d152270
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/54428
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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m, n and p coefficients updated for fuse revision 21 and beyond.
- code cleanup done. fixed checkpatch warnings.
bug 842208
Change-Id: I355aae4d52b8b33372b6b8230c3124b7c7fedf3e
Reviewed-on: http://git-master/r/53808
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Increase the bit field width to 2, to accomodate all possible
status for LP read.
Change-Id: I3d3b06fb7daff4b97f1ce1e3acc4cb96f1208df1
Reviewed-on: http://git-master/r/54223
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Tested-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Adding api which provides the mechanism to getting charging status.
bug 872697
Change-Id: I2d70e33e04d6a663e55752a89e1699afb4d355b4
Reviewed-on: http://git-master/r/53785
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
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this change ensures that emc clock is set to maximum when
avp clock goes maximum. it over-rides the emc clock
send by platform data when avp clock is maximum. it restores
the platform specific emc clock (if any) when the next
non-maximum avp clock request comes. if no emc platform
specific clock is specified, it restores the maximum emc clock
for bug 876402
Change-Id: Id5e454a5a63b1679906d8612c6e24958bace1663
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/53193
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Mohan Nimaje <mnimaje@nvidia.com>
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vbus presence is tested based on vbus sensors. This
is needed only for FPGA.
Bug 864018
Change-Id: Idacf8a09d4942f17d4ed2223ce21c91b2d4c70f8
Reviewed-on: http://git-master/r/54006
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Adding tegra_ehci_pre_reset function before call ehci_reset.
Bug 863224
Change-Id: I73bfb1739e71a2554e8016d0bd81f70bc2ec19fd
Reviewed-on: http://git-master/r/53258
Reviewed-by: Steve Lin <stlin@nvidia.com>
Tested-by: Steve Lin <stlin@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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After allocating pages, Set page attributes as per mem type
requested.
(cherry picked from commit e4862709dd7fb9799072576569fd532e0a597f31)
Change-Id: If5e119366ffe6daaab78dc5915fa864d6932d464
Reviewed-on: http://git-master/r/53828
Reviewed-by: Vinod Rex <vrex@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
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Only clear the display when ioctl FBIOBLANK is FB_BLANK_NORMAL is used
This indicates that display should still be powered on and is useful
when HDMI audio needs to remain active but no content is displayed on
screen.
bug 857117
bug 868916
Change-Id: If9bd5616a02448a4c2859432b774afa793505447
Reviewed-on: http://git-master/r/53608
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: David Pu <dpu@nvidia.com>
Tested-by: David Pu <dpu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Instead of rounding up when measuring temperature in celsius,
report back temperature in millicelsius.
Change-Id: I5b99dd9f1c41e929d83a42662d693fe31a779a52
Reviewed-on: http://git-master/r/52953
Reviewed-by: Joshua Primero <jprimero@nvidia.com>
Tested-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Don't allow root user allocating more than iovm limit to avoid pin
time issues.
Bug 864535
Change-Id: I8aee89cc85e244a7453b5b31f6f998e97c498915
Reviewed-on: http://git-master/r/53048
Reviewed-by: Rhyland Klein <rklein@nvidia.com>
Tested-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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Collect individual underflow counts for underflow statistics to provide
a more accurate number of underflows. Changed stats to use 64-bit numbers
due to the larger numbers involved, about 100x from previously.
Change-Id: Idac25d210fd48328a7c8295271f5a0f83bff7ef4
Reviewed-on: http://git-master/r/52940
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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bit WRITE16 of HDMI_NV_PDISP_KEY_CTRL_0 shall be polled until it
reports DONE, which is value 0 to ensure the write is complete.
bug 858744
bug 861719
(cherry picked from commit d37336f3965cd1071afb6b03b979b0409ee480f1)
(reviewed on http://git-master/r/49821)
Change-Id: I7f54615882d46fa6b67a5fdb2a52046b935aa7c3
Reviewed-on: http://git-master/r/52854
Tested-by: Ken Chang <kenc@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Debugfs support added in nct1008 driver to enable register dump.
Change-Id: I98e4f18b91690e16010ec425811b4cc2de680fac
Reviewed-on: http://git-master/r/51856
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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V_BLANK_INT was used to mark frame end for other tasks. However, it occurs at
frame start. Switch to FRAME_END_INT to mark the end of frame.
Bug 875448
Change-Id: I345e27c3b92ec5a944a49f943b9f9eb0a62aa1ff
Reviewed-on: http://git-master/r/52694
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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The clock control apis can be sleepable in tegra platform as
spi require frequency/voltage boosting.
Moving the clock controls api out of spin lock context.
bug 874841
Change-Id: Id93ee03673f1d3c97175b965d561ec32397db662
Reviewed-on: http://git-master/r/52617
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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The I2C driver incorrectly manipulated the 10-bit address of corresponding
slave devices when initiating protocol based transactions. This caused NACK
errors from the slave devices that only support 10-bit addressing. Fixed by
skipping address shifting when the slave devices support 10-bit addresses.
Bug 874193
Change-Id: Idf69e434fd7e68c22047474169f7c6a8145721e2
Reviewed-on: http://git-master/r/51866
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Error handling in the driver was not correctly done earlier. Changes
done are as follows:
- error returned stored in int data type instead of u8 or s8
- few places error was not checked, added the checks needed.
Change-Id: Ife6f70787b1aae51b9bafab1afafb65257013ca5
Reviewed-on: http://git-master/r/51855
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Delay gain change by 1 frame. This will prevent sensor
applying new gain setting in the middle of the frame.
Bug 870349
Change-Id: Ib4e0e2fef99dcbf05a0656640af529e8f02c2a7d
Reviewed-on: http://git-master/r/52773
Reviewed-by: Krupal Divvela <kdivvela@nvidia.com>
Tested-by: Krupal Divvela <kdivvela@nvidia.com>
Tested-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Bug 871094
Change-Id: I1b3bf7d4d50e08939c0ea9fc2e1c56fdc34d7323
Reviewed-on: http://git-master/r/52771
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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This reverts commit 03e9285cdc365ce1fa21fff224372dd8e5d883bd.
bug 872490
Change-Id: I4f72a8cbecffeca3b83f9740432f0d408d745e46
Reviewed-on: http://git-master/r/52698
Reviewed-by: Luke Huang <lhuang@nvidia.com>
Tested-by: Luke Huang <lhuang@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Refactor nvhost_acm.c so that module specific code can be separated from
generic code:
* Module clock and power op descriptions added to channelmap table
* New module busy/idle interface added
* 3D clock scaling for Tegra3 moved behind the module busy/idle API
* 3D power off code moved to 3dctx where it belongs
* Module power on API removed as there were no users
* Get/Set rate moved to Tegra3 specific file
Bug 870791
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Change-Id: Ia27db32c606b7dd3f9acf0c7e43e4de80a9ef0b4
Reviewed-on: http://git-master/r/51275
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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nvhost_module_rate() must turn clock on before querying its value.
Bug 873710
Change-Id: Idae811c6f7a27cbd0b9d701921fad36eaca1121e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/52357
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Adding remote wakeup support.
Bug 805906
Change-Id: I4e8637161abd1c5de90b0f856ad5c877e9433e42
Reviewed-on: http://git-master/r/52620
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Tested-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Rama Kandhala <rkandhala@nvidia.com>
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Settings in DIDIM driver are now phased in over a defined
number of steps in order to minimize the perception of changes
to the settings during runtime
Bug 840155
Change-Id: Icbafebd7f70445f9aad1c5819a1eb7e426410784
Reviewed-on: http://git-master/r/52495
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Updated following into i2c driver:
(1) Because of race condition between isr and tx fifo fill,
duplicate data is being written. So added locking to make
Tx fifo fill as atomic.
(2) Removed unnessary synchronization between isr and init.
clock driver is making sure that any write operations will
be completed before disabling the driver clock.
Change-Id: Id68b238ec1b60b5b5c15a15930f36b39b33eeded
Reviewed-on: http://git-master/r/52549
Reviewed-by: Alok Chauhan <alokc@nvidia.com>
Tested-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Add powergating for vi, csi and isp in tegra_camera
Bug 855758
Change-Id: Ibb026f71ea0623e0e8e21cb8c250f92728d0d60b
Reviewed-on: http://git-master/r/52099
Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Tested-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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Using the register caching for optimizing the update of pmu register
through i2c. In this way, the frequent read of pmu register is
avoided.
bug 870689
Change-Id: Ic6666d4c04d7a46236dae5cc42d3b0815606efef
Reviewed-on: http://git-master/r/52335
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Removed the polling/PMC based method for the usb hotplug detection.
Bug 865094
Change-Id: Idad6eb4a25fc0c589b46f11d5d8a47a41b60f251
Reviewed-on: http://git-master/r/52284
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Set EPP default clock low.
Note that 2D default clock is already low.
bug: 790961
Change-Id: Ie104c961d45253f26beed7ad3885bfaf1427ecbc
Reviewed-on: http://git-master/r/52240
Tested-by: Mandar Potdar <mpotdar@nvidia.com>
Reviewed-by: Mohan Nimaje <mnimaje@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Avoiding the suspend of the system if the spi transfer is
in progress for current transfer queue.
bug 864987
Change-Id: Ifc16ce92b36d3b5700990ca686dd6a9858cd74ae
Reviewed-on: http://git-master/r/52037
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Bug 873860
Change-Id: Ia29a74689c150fec782e91884bd4116bd89f253c
Reviewed-on: http://git-master/r/52135
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Robert Morell <rmorell@nvidia.com>
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Temporarily disable support since it appears the
modeset to 1080p takes longer than anticipated.
Re-enable once issue has been fixed.
Bug 869099
Change-Id: I4d596e33016a3723bca9bdb707cedd993a18f71b
Reviewed-on: http://git-master/r/51833
Tested-by: Dhiren Bhatia <dbhatia@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
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ISP needs the vertical output size to be a little more
than the actual resolution. Change vertical size to
1088 for 1920x1080 mode.
Bug 870687
Change-Id: I0c90a9da48f9b5915f1af0f9dab2b6d090da050d
Reviewed-on: http://git-master/r/51682
Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Tested-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Shiva Dubey <sdubey@nvidia.com>
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Tested-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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Update card_present variable during resume by reading
card detect gpio value inorder to detect cards inserted
or removed during suspend
Bug 871234
Change-Id: I4e068d5ad595d58fa245d7ec1fb24973ffdd4aca
Reviewed-on: http://git-master/r/51778
Reviewed-by: Venkata Jagadish <vjagadish@nvidia.com>
Tested-by: Venkata Jagadish <vjagadish@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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To reduce i2c transaction, added struct max77663_register into
struct max77663_regulator. It includes cache value for each register,
so there is no need for i2c read after updating cache value
in preinit function.
Bug 849360
Change-Id: Ifeea34606dc22f9c04d44a6a783021fd9632477e
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/51526
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Optimizing the time require to change the voltage by using the
register caching.
bug 870689
Change-Id: I3a26bb53a0b717eb900545070de2ad846ab31598
Reviewed-on: http://git-master/r/51836
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
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Fixed that updating wrong value into cache value after i2c write
in the max77663_cache_write function.
Bug 849360
Change-Id: I81b60946036a1944dda72a10f8a2a7000f03e403
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/51517
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Set different hysteresis values for the EDP and throttling cases.
bug 862301
Change-Id: Ie5a8a02a2123ce5c681e4e59cac77fcf2cbc320e
Reviewed-on: http://git-master/r/51436
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Adding delays in set_voltage to stablize the voltage as per
voltage slew rate when changing the voltage.
bug 872382
Change-Id: I2e0d68a5b83b906912ca9e31db6b845ed8fd213e
Reviewed-on: http://git-master/r/51324
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Corrected regulator handling of NCT1008
bug 869217
Change-Id: I2cf72abe7b5a14fbe03463bbd4105f0b0bac34d9
Reviewed-on: http://git-master/r/51296
Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Added delay to make sure register is updated.
Bug 864005
Change-Id: I975e1243501ea8512bdb26fa14a46bf5919e994e
Reviewed-on: http://git-master/r/51086
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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