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make ldb support two ipu in separate mode
Signed-off-by: Jason Chen <b02280@freescale.com>
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Change futex_atomic_op_inuser and futex_atomic_cmpxchg_inatomic
prototypes to use u32 types for the futex as this is the data type the
futex core code uses all over the place.
Signed-off-by: Michel Lespinasse <walken@google.com>
Cc: Darren Hart <darren@dvhart.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: David Howells <dhowells@redhat.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Chris Metcalf <cmetcalf@tilera.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <20110311025058.GD26122@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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The cmpxchg_futex_value_locked API was funny in that it returned either
the original, user-exposed futex value OR an error code such as -EFAULT.
This was confusing at best, and could be a source of livelocks in places
that retry the cmpxchg_futex_value_locked after trying to fix the issue
by running fault_in_user_writeable().
This change makes the cmpxchg_futex_value_locked API more similar to the
get_futex_value_locked one, returning an error code and updating the
original value through a reference argument.
Signed-off-by: Michel Lespinasse <walken@google.com>
Acked-by: Chris Metcalf <cmetcalf@tilera.com> [tile]
Acked-by: Tony Luck <tony.luck@intel.com> [ia64]
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Michal Simek <monstr@monstr.eu> [microblaze]
Acked-by: David Howells <dhowells@redhat.com> [frv]
Cc: Darren Hart <darren@dvhart.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <20110311024851.GC26122@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Conflicts:
arch/arm/mach-mx6/board-mx6q_sabreauto.c
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Only support one pair of buffer for rx and tx per time.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Conflicts:
drivers/misc/Kconfig
drivers/misc/Makefile
drivers/net/wireless/Makefile
include/linux/mmc/mmc.h
kernel/power/main.c
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Add p1003_ts_platform_data to fsl_device.h
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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change fsl_mxc_lcd_platform_data.
Signed-off-by: Jason Chen <b02280@freescale.com>
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1.add VYU444 fmt to support Sii902x hdmi yuv format
2.make pixel clock from internal ipu clock more accurate
Signed-off-by: Jason Chen <b02280@freescale.com>
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Add clock name, max_volt, min_volt field
Signed-off-by: Terry Lv <r65388@freescale.com>
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add CMD used on SDHC3.0 card
add specific parameters for SDHC3.0 card tuning
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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Head files changes for mult ipu and dispdrv.
Signed-off-by: Jason Chen <jason.chen@freescale.com>
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change fb.h to support PREMODE_CHANGE event.
Signed-off-by: Jason Chen <jason.chen@freescale.com>
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S/PDIF tx and rx using ASoC layer.
Signed-off-by: Alan Tull <alan.tull@freescale.com>
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This patch supports HW triple buffer for IPUv3
framebuffer.
1) Remove buf ready check in EOF irq handler, as we
think the swap logic will not fail for HW triple
buffer case.
2) When V4L2 output/overlay are used, switch to double
buffer mode.
3) Changes IPU interface for IPUv1 framebuffer to pass
building.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Jason Chen <b02280@freescale.com>
(cherry picked from commit 4ada3031e13207902f8c90b33c082759889cb22a)
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This patch supports IPUv3 triple buffer.
Only channel 23, 27 and 28 are tested.
Test was done on MX51 BBG and MX53 SMD.
IPUv1 interface is changed accordingly
to pass building.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 73ef4408712acfee2d132f73555085a61be7b17c)
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- Ported MAX17135 MFD core driver to 2.6.38
- Ported MAX17135 HWMON temperature sensor driver to 2.6.38
- Ported MAX17135 regulator driver to 2.6.38
Signed-off-by: Danny Nold <dannynold@freescale.com>
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- Bring EPDC driver up-to-date
- Add mxcfb_epdc_kernel.h
- Change structure definitions from mxc_ to imx_ where needed to
match platform structure names
Signed-off-by: Danny Nold <dannynold@freescale.com>
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If you disable display, the display port's pin may keep high voltage which
may cause power leakage. Fix this issue by make all pin go into low level
after display disable.
Signed-off-by: Jason Chen <b02280@freescale.com>
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After this patch, default display for below platforms:
mx51 bbg: DVI-XGA on DI0
mx53 ard: LVDS-XGA on DI0
mx53 evk: CLAA-WVGA on DI0
mx53 loco: VGA-XGA on DI1
mx53 smd: LVDS-XGA on DI1
The default options will work if you do not enter other video cmdline options.
For platform need enable other drivers, it will enable it automatically.
For example, under default option, mx53 loco will enable tve-vga driver
automatically; before this patch, it need add 'vga' to cmdline to enable it.
And 'di1_primary' option also will be enabled automatically if need.
If you want to overwrite the default option, please refer to below:
enable vga: 'vga'
disable vga: 'vga=off'
enable tve: 'tve'
disable tve: 'tve=off'
enable ddc: 'ddc'
disable ddc: 'ddc=off'
enable hdmi: 'hdmi'
disable hdmi: 'hdmi=off'
choose di0 as primary: 'di0_primary'
choose di1 as primary: 'di1_primary'
Signed-off-by: Jason Chen <b02280@freescale.com>
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add a asoc headphone detection, it's a generic way using by asoc area.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Removed SCC2 IRQ definitions from header file since
IRQs will be obtained from resource array during probe
function.
Signed-off-by: Anish Trivedi <anish@freescale.com>
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Add the definition of pwm platform data
Signed-off-by: Sun Yuxi <b36102@freescale.com>
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add header file for performance monitor driver under include/linux
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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Added padding of 64 bytes (cache line size for Cortex-A8) around
buffers that are used by the hardware to prevent any cache
coherency problems that could arise if buffers share a cache line
with some other data that is used by the CPU.
Signed-off-by: Anish Trivedi <anish@freescale.com>
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The user mode libsahara library relied on header file
drivers/mxc/security/sahara2/include/sahara.h. However, to make
the lib build after headers_install step and to remove dependency on
kernel source, moved this header to include/linux/mxc_sahara.h.
These changes are specific to the include/linux folder.
Signed-off-by: Anish Trivedi <anish@freescale.com>
Acked-by: Lily Zhang
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Add fsl_mxc_light_platform_data
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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Add i.MX specific files into include/linux/Kbuild
ISL29023:Add device head file to Kbuild
This patch adds device head file to Kbuild to pass
Signed-off-by: Lily Zhang <r58066@freescale.com>
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add some missing headers
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
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Fix da9053 backlight Kconfig error
porting da9052 regulator driver
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
Acked-by: Lily Zhang <r58066@freescale.com>
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Add DA9053 original source code
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
Acked-by: Lily Zhang <r58066@freescale.com>
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Add ipu tve header file
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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This button driver is based on Freescale MPR121 capacitive
touch sensor controller.
It can support 12 elements maximal. The chip is use i2c interface.
You can find all the data sheet reference in code by google the name.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Signed-off-by: Rob Herring <r.herring@freescale.com>
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nand: increase max nand page and oob sizes
Signed-off-by: Rob Herring <r.herring@freescale.com>
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Linux driver for /dev/crypto (aka CryptoDev)
See http://www.logix.cz/michal/devel/cryptodev for details.
Signed-off-by: Michal Ludvig <mludvig@suse.cz>
Signed-off-by: Rob Herring <r.herring@freescale.com>
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JFFS2 community fix with not use OOB at MLC NAND, this patch
is coming from the MTD community
Signed-off-by: Jason Liu <r64343@freescale.com>
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Enable the configurations of the boot enable on the eMMC cards.
Add the interface that used to configure the boot_bus_width
In order to make sure that the re-read the ext-csd of card
can be completed successfully, add the method to wait for
the finish of the busy state.
NOTE:
The following are the valid inputs when configure the boot
bus width of the eMMC cards.
+--------------------------------------------------------------------+
| Bit7 Bit6 Bit5 | Bit4 Bit3 | Bit2 | Bit1 Bit0 |
|----------------|----------------------------------|----------------|
| X | BOOT_MODE | RESET_BOOT_BUS_WIDTH | BOOT_BUS_WIDTH |
+--------------------------------------------------------------------+
Bit [4:3] : BOOT_MODE (non-volatile)
0x0 : Use single data rate + backward compatible timings in boot
operation (default)
0x1 : Use single data rate + high speed timings in boot operation mode
0x2 : Use dual data rate in boot operation
0x3 : Reserved
Bit [2]: RESET_BOOT_BUS_WIDTH (non-volatile)
0x0 : Reset bus width to x1, single data rate and backward compatible
timings after boot operation (default)
0x1 : Retain boot bus width and boot mode after boot operation
Bit[1:0] : BOOT_BUS_WIDTH (non-volatile)
0x0 : x1 (sdr) or x4 (ddr) bus width in boot operation mode (default)
0x1 : x4 (sdr/ddr) bus width in boot operation mode
0x2 : x8 (sdr/ddr) bus width in boot operation mode
0x3 : Reserved
The following are the valid inputs when configure the boot
partitions of the eMMC cards.
+------------------------------------------------------------+
| Bit7 | Bit6 | Bit5 Bit4 Bit3 | Bit2 Bit1 Bit0 |
|------|----------|-----------------------|------------------|
| X | BOOT_ACK | BOOT_PARTITION_ENABLE | PARTITION_ACCESS |
+------------------------------------------------------------+
Bit7: Reserved
Bit6: always set to vaule '1' when boot_part is enabled
Bit[5:3]:
0x0 : Device not boot enabled (default)
0x1 : Boot partition 1 enabled for boot
0x2 : Boot partition 2 enabled for boot
0x7 : User area enabled for boot
Bit[2:0]:
0x0 : No access to boot partition (default)
0x1 : R/W boot partition 1
0x2 : R/W boot partition 2
So only the '0, 1, 2; 8, 9, 10; 16, 17, 18; 56, 57, 58' are
valid parameters when configure the boot_partiton.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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User can get eMMC partitions info from user space layer in
linux OS enviroment.
User can do switch operations between the eMMC boot partitions
and the user partition.
User can access the eMMC boot partitions from user space layer
in linux OS enviroment.
NOTE:This func had been verified on TOSHIBA eMMC44 card only.
Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Rob Herring <r.herring@freescale.com>
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Change-Id: Ibb3dda05772b2e89d7b2646689944d309cb1f74e
Signed-off-by: Colin Cross <ccross@android.com>
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synchronize_rcu can be very expensive, averaging 100 ms in
some cases. In cgroup_attach_task, it is used to prevent
a task->cgroups pointer dereferenced in an RCU read side
critical section from being invalidated, by delaying the
call to put_css_set until after an RCU grace period.
To avoid the call to synchronize_rcu, make the put_css_set
call rcu-safe by moving the deletion of the css_set links
into free_css_set_work, scheduled by the rcu callback
free_css_set_rcu.
The decrement of the cgroup refcount is no longer
synchronous with the call to put_css_set, which can result
in the cgroup refcount staying positive after the last call
to cgroup_attach_task returns. To allow the cgroup to be
deleted with cgroup_rmdir synchronously after
cgroup_attach_task, have rmdir check the refcount of all
associated css_sets. If cgroup_rmdir is called on a cgroup
for which the css_sets all have refcount zero but the
cgroup refcount is nonzero, reuse the rmdir waitqueue to
block the rmdir until free_css_set_work is called.
Signed-off-by: Colin Cross <ccross@android.com>
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Changes the meaning of CGRP_RELEASABLE to be set on any cgroup
that has ever had a task or cgroup in it, or had css_get called
on it. The bit is set in cgroup_attach_task, cgroup_create,
and __css_get. It is not necessary to set the bit in
cgroup_fork, as the task is either in the root cgroup, in
which can never be released, or the task it was forked from
already set the bit in croup_attach_task.
Signed-off-by: Colin Cross <ccross@android.com>
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This governor is designed for latency-sensitive workloads, such as
interactive user interfaces. The interactive governor aims to be
significantly more responsive to ramp CPU quickly up when CPU-intensive
activity begins.
Existing governors sample CPU load at a particular rate, typically
every X ms. This can lead to under-powering UI threads for the period of
time during which the user begins interacting with a previously-idle system
until the next sample period happens.
The 'interactive' governor uses a different approach. Instead of sampling
the CPU at a specified rate, the governor will check whether to scale the
CPU frequency up soon after coming out of idle. When the CPU comes out of
idle, a timer is configured to fire within 1-2 ticks. If the CPU is very
busy from exiting idle to when the timer fires then we assume the CPU is
underpowered and ramp to MAX speed.
If the CPU was not sufficiently busy to immediately ramp to MAX speed, then
the governor evaluates the CPU load since the last speed adjustment,
choosing the highest value between that longer-term load or the short-term
load since idle exit to determine the CPU speed to ramp to.
A realtime thread is used for scaling up, giving the remaining tasks the
CPU performance benefit, unlike existing governors which are more likely to
schedule rampup work to occur after your performance starved tasks have
completed.
The tuneables for this governor are:
/sys/devices/system/cpu/cpufreq/interactive/min_sample_time:
The minimum amount of time to spend at the current frequency before
ramping down. This is to ensure that the governor has seen enough
historic CPU load data to determine the appropriate workload.
Default is 80000 uS.
/sys/devices/system/cpu/cpufreq/interactive/go_maxspeed_load
The CPU load at which to ramp to max speed. Default is 85.
Change-Id: Ib2b362607c62f7c56d35f44a9ef3280f98c17585
Signed-off-by: Mike Chan <mike@android.com>
Signed-off-by: Todd Poynor <toddpoynor@google.com>
Bug: 3152864
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Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
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Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
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the csd sector count reported by eMMC 4.3+ cards includes the boot
partition size; subtract this from the size reported to the disk
since the boot partition is inaccessible
Change-Id: I601b83aa0159b7aa446409ea8c945b256dd0b5b1
Signed-off-by: Gary King <gking@nvidia.com>
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