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Ricoh power management IC RC5T583 contains is multi
functional device having multiple sub devices inside this.
This device has multiple dcdc/ldo regulators, gpios, interrupt
controllers, on-key, RTCs, ADCs.
This device have 4 DCDCs, 8 LDOs, 8 GPIOs, 6 ADCs, 3 RTCs etc.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Cherry-picked from mainline
1b1247dd75aa5cf5fae54a3bec7280046e9c7957
Change-Id: I5d3bcfb45e232a1a9a210ec14815356ae1918c5d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91798
Reviewed-by: Automatic_Commit_Validation_User
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- Add support for ISP focus
Bug 852480
Change-Id: Ibd4c983d80a5021a88b46033c51c26d1b8120e62
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/91203
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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- split the nvhost clients into their own directories
- each client is a nvhost_device and nvhost_driver
- all the code related to host1x control node is centralized
at single place in dev.c
- all the code related to host1x modules nodes is centralized
at single place in bus_client.c
- update the copyright notice & year for new files
Bug 871237
Change-Id: Ief85064699e35ad02b48a7e54496928d7f085af4
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/83491
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Currently nvhost hard codes usage of context handler and sync point
id. Split the context handler and context structures into generic and
host1x specific parts, and move the allocation to happen via a
function pointer in nvhost_device.
Also updates gr3d and mpe to use sync point id and waitbase from
nvhost_device.
Bug 926690
Change-Id: I7f00b450cac99f3816baa27b37ee4e4cf68cfe24
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/84901
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Allows OTG enable/disable only while USB OTG state
swithes between SUSPEND and HOST
Bug 937188
Change-Id: If651dfb19db37f8822e6d1473aa573246aca8d45
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/89111
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Add update_charger_status() function callback to fix unknown
charging status at start up issue.
Bug 951750
Change-Id: Ib264479b0a251a07d136c245afa85c3444754ee0
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-on: http://git-master/r/89436
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Remove dead code
Remove whitespace
Remove platform callback function and add wake_lock/wake_unlock
Fix compilation warnings
Bug 933054
Bug 931931
Change-Id: I5b0947ad2053f9e0437ffe89879df2c84786ec9c
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/89274
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Tested-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Bug 933054
Bug 931931
Change-Id: Id84bcc1791114a50d26547de41daeb4774f6026b
Signed-off-by: Anjan Rao <anjan.rao@ti.com>
Reviewed-on: http://git-master/r/89136
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Tested-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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fixed bug 947324
Change-Id: Ib85ee5d7e67def321cbde49ad41e2b194e1bd2e8
Signed-off-by: Adam Jiang <chaoj@nvidia.com>
Reviewed-on: http://git-master/r/86483
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
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Keep the rails OFF in sleep mode only when the rails are
controlled by external sleep control.
The devices tps65910 and tps65911, both has the sleep input.
The tps65911's sleep input is not same as tps65910's EN3 and hence
taking care of SLEEP input as separate external sleep control input.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
cherry picked from mainline commit
87ae88a17396fe3f91c34ab44f460e5680eb6f61
Change-Id: I05645082ad5268a4553891db6b35af33650b7a95
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/89125
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Enabled one-shot mode in the bottom half handler
of nct interrupts to force a conversion/comparison.
This effectively stops repeated nct interrupts.
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/85277
(cherry picked from commit bc90335e0201cba073333c679b2fddff7bb293f1)
Change-Id: Id0bd19f8f464ffbd9079fc2910a1bbcd0e621843
Reviewed-on: http://git-master/r/88373
Reviewed-by: Joshua Primero <jprimero@nvidia.com>
Tested-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Change-Id: I8a5329284008c03705273dfa49042fc0e07b4b3d
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-on: http://git-master/r/87068
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Adding support for the open source gpio on which client
can specify the open source property through GPIO flag
GPIOF_OPEN_SOURCE at the time of gpio request.
The open source pins are normally pulled low and it
cannot be driven to output with value of 0 and so
when client request for setting the pin to LOW, the
gpio will be set to input direction to make pin in tristate
and hence PULL-DOWN on pins will make the state to LOW.
The open source pin can be driven to HIGH by setting output
with value of 1.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
cherry-picked from mainline commit
25553ff0756c59b617af6bdd280c94e943164184
Change-Id: I3062a5dec7bf745b624d9a147f79d3830927325b
Reviewed-on: http://git-master/r/88265
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
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Adding support for the open drain gpio on which client
can specify the open drain property through GPIO flag
GPIOF_OPEN_DRAIN at the time of gpio request.
The open drain pins are normally pulled high and it
cannot be driven to output with value of 1 and so
when client request for setting the pin to HIGH, the
gpio will be set to input direction to make pin in tristate
and hence PULL-UP on pins will make the state to HIGH.
The open drain pin can be driven to LOW by setting output
with value of 0.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Cherry-picked from mainline
aca5ce14eb773a75e5d935968b2e390dc5bd29c3
Change-Id: I097caebcc7cf6fb1497bb0395320dfc061bb6277
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/88264
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- nvhost_get_host returns host1x's master driver's
private data
- this host1x master is parent for all its modules.
however, it does not have a parent of its own
- so the debug_not_idle causes crash when there is an
outstanding reference count on host1x by some module
during suspend sequence
- with this change, debug_not_idle returns error to
pm core if host1x has an outstanding ref count. pm core
then safely aborts the suspend and does resume
Bug 947617
Change-Id: Ia2479c192bdd94028d090168f689823658062fd4
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/87658
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Addition of OTG support in smb349 charger driver
Change-Id: Ib38c9f4c06285ae07d93cfa3c6f5e1637aaa9460
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/86936
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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The bulk_write() supports the data transfer to multi
register which takes the data into cpu_endianness format
and does formatting of data to device format before
sending to device.
The transfer can be completed in single transfer or multiple
transfer based on data formatting.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 8eaeb21925563075ae036c2e5ba8d041b70e18fa)
Change-Id: Id97fbcfa0ed7d00d97dc3ab89fdb2b025850c9b1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87591
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Save error handling and unwinding code in drivers by providing managed
versions of the regmap init functions, simplifying usage.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit c0eb46766d395da8d62148bda2e59bad5e6ee2f2)
Change-Id: I6df96ae10ad8a882feb7da908dd46c2f56a28f9f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87585
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Device manufacturers frequently provide register sequences, usually not
fully documented, to be run at startup in order to provide better defaults
for devices (for example, improving performance in the light of silicon
evaluation). Support such updates by allowing drivers to register update
sets with the core. These updates will be written to the device immediately
and will also be rewritten when the cache is synced.
The assumption is that the reason for resyncing the cache will always be
that the device has been powered off. If this turns out to not be the case
then a separate operation can be provided.
Currently the implementation only allows a single set of updates to be
specified for a device, this could be extended in future.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 22f0d90a34827812413bb3fbeda6a2a79bb58423)
Change-Id: I02f4ead9866a90b3635c4b98f1f9c3be3109c5ea
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87577
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Some devices, especially those with high speed control interfaces, require
padding between the register and the data. Support this in the regmap API
by providing a pad_bits configuration parameter.
Only devices with integer byte counts are supported.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 82159ba8e6ef8c38e3e0452d90b4ff8da9e4b2c1)
Change-Id: Id9710b92e08ac905f3291715aa457842e60fed3d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87575
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Allows devices to discover their own interrupt without having to remember
it themselves.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 209a600623cf13a8168b2f6b83643db7825abb9a)
Change-Id: I3f70623a25a7f67cf121e3bba764c27f18d4c3dd
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87574
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Sometimes the register map information may change in ways that drivers can
discover at runtime. For example, new revisions of a device may add new
registers. Support runtime discovery by drivers by allowing the register
cache to be reinitialised with a new function regmap_reinit_cache() which
discards the existing cache and creates a new one.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit bf315173359b2f3b8b8ccca4264815e91f30be12)
Change-Id: I896f9a1f116d1fa43225c1ab63dbf0459e5a6b83
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87573
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Currently we only trace physical reads, there's no instrumentation if
the read is satisfied from cache.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit bc7ee55633867909bb05e71f957a4d3c1aa1b488)
Change-Id: Ibbd7caff4e97b8a511f1d36b98bfdaa706ff8af4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87572
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Some users of regmap_update_bits() would like to be able to tell their
users if they actually did an update so provide a variant which also
returns a flag indicating if an update took place. We could return a
tristate in the return value of regmap_update_bits() but this makes the
API more cumbersome to use and doesn't fit with the general zero for
success idiom we have.
cherry-picked from main line commit
018690d33ecf4aa1eb1415e38c40e2b0b6c7808e
Change-Id: I1b8d5dd436576f9238db89c61a6b8a6edd9d1151
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87571
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There should be no situation where it offers any advantage over rbtree
and there are no current users so remove the code for simplicity.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 4c691664583ef6a91f9ed0e08a75fbd30a5ffd5c)
Change-Id: I58f92ec9b989b2eaaab767b4201aeb04edec50a8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87565
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The reg_defaults field usually points to a static per driver array, which should
not be modified. Make requirement this explicit by making reg_defaults const.
To allow this the regcache_init code needs some minor changes. Previoulsy the
reg_config was not available in regcache_init and regmap->reg_defaults was used
to pass the default register set to regcache_init. Now that the reg_config is
available we can work on it directly.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 720e4616e8fd85284ef1addd8b8d93d8415e8dbc)
Change-Id: Ia56e48e948f6eaf23d0781bc8a7ea4c9d3761a98
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87560
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Users probably don't care about the specific compression algorithm and
we might want to use a different algorithm (snappy being the one I'm
thinking of right now) so update the public interface to have a more
generic name.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 50b776fc71c13663eb7434f634f2b796de5c9885)
Change-Id: I4016e48c8d86581693e8b0af16225d4b832704c2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87550
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Allow drivers to optimise out the register cache sync if they didn't need
to do one. If the hardware is desynced from the register cache (by power
loss for example) then the driver should call regcache_mark_dirty() to
let the core know about this.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 8ae0d7e8a918e9603748abe9b31984fc5d96abb3)
Change-Id: If3380b73669ebaaf474cf46fdd2f4339345c66a3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87549
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There seem to be lots of regmap-using devices with very similar interrupt
controllers with a small bank of interrupt registers and mask registers
with an interrupt per bit. This won't cover everything but it's a good
start.
Each chip supplies a base for the status registers, a base for the mask
registers, an optional base for writing acknowledgements (which may be the
same as the status registers) and an array of bits within each of these
register banks which indicate the interrupt.
There is an assumption that the bit for each interrupt will be the same
in each of the register bank.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from mainline commit f8beab2bb611d735767871e0e1a12dc6a0def7b1)
Change-Id: Id1fd93b09595d8cbdebcc415bebe3366c04d7b18
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87545
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set_carddetect is use for calling mmc sdio carddetect function
from wl12xx driver.
Bug 931928
Change-Id: I48710fbf2bf1ab2f03651d6dd56c08018191aa9b
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: http://git-master/r/87139
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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-Addition of interrupt support to update charger
properties to fuel-gauge driver.
Change-Id: If6384921247b6534f2d8142ad5fd079c5f6e0890
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/83507
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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- Addition of battery custom data to max17048 driver
- Update battery properties like online and charging/discharging
status instantaneously based on the interrupt.
Change-Id: I84f4833caf4c25fb4d73c74c9e986084bb33a94a
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/83505
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Defines a new ioctl for querying a bitfield of DC capabilities.
The first defined caps bit is for "cursor mode" flipping support.
bug 942631
Change-Id: Iea8a0dfe4e400e0dad4bb9f23509c3ac0ca532ba
Reviewed-on: http://git-master/r/87066
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Tested-by: Adam Cheney <acheney@nvidia.com>
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This reverts commit 11c94f0d529a089f8cc37311258fd518be576383.
Stat LED control through PMU GPIO should be implemented in another
way. No need to touch PMU driver.
Change-Id: Iecde818425640616df0a92339e1c0e8b323800bd
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/86828
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Merge commit '7cccbdc84487616c3dbe493b04bfa1f362f4bc56'
into origin/android-tegra-nv-3.1
Conflicts:
drivers/base/regmap/regmap.c
Change-Id: I7c74b1745e592390538419a2c8026a3ba29be8ea
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
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Using regmap apis for accessing the device registers and
using RBTREE caching mechanims for caching registers.
Enabling caching of the registers which is used for voltage
controls. By doing this, the modify_bits operation is faster as
it does not involve the i2c register read from device, just read
from cache. This results faster set voltage operation.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
cherry picked from mainline commit
0e7018c7b161dc5544f7af862dc59e0b9a0dbd20
Change-Id: Ie0bc1fd32f1c7f7b80004b30ec9ba615d4c29360
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/86349
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- tegra_grhost is a platform device that represents host1x
- nvhost has device host1x which represents the same hardware
- merge these two device structs
- as the new struct is a nvhost_device, platform_driver
is also converted into a nvhost_driver
- register nvhost device before other graphics devices.
this ensures that nvhost_probe() is called as soon as
nvhost_driver is registered with the core.
- this also ensures that nvmap is probed first, followed
by nvhost, followed by tegra-dc and nvavp (if they
are enabled).
Change-Id: Ic420a6516a9cb20d6f481692a4db10fa6053dd90
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/82631
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Bug 940061
Change-Id: Ibae842fdc3af3c92ec7e6125c602417110d8b55e
Signed-off-by: Gaurav Sarode <gsarode@nvidia.com>
Reviewed-on: http://git-master/r/84521
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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This API is being removed in v3.2
Change-Id: I3d864dabd2273e737604776aa43c45a64eae90b3
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/83561
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Modified files supports unified DirectTouch that can
work both for Cardhu and Kai. Touch configuration
is passed to driver with these board files.
Bug 832605
Signed-off-by: Ali Ekici <aekici@nvidia.com>
Change-Id: I075aaad2e71ee1a87b23680ef629fc99bc42ea93
Reviewed-on: http://git-master/r/80129
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
(cherry picked from commit dc1372f43159640207a0d4e0ff08dde5bafc1baa)
Reviewed-on: http://git-master/r/83569
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Modified driver files to support unified DirectTouch which
can support Kai and Cardhu together. Vendor-supplied source
code update.
Bug 832605
Signed-off-by: Ali Ekici <aekici@nvidia.com>
Change-Id: If0799147b50e9c2cf102d2216103e30b525026e4
Reviewed-on: http://git-master/r/80128
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Tested-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
(cherry picked from commit 1dfd9d747b8ceb344a435daac60d30f1a6441bcb)
Reviewed-on: http://git-master/r/83568
Tested-by: Gerrit_Virtual_Submit
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Bug 852480
Change-Id: If7d74d81f29d325846f8744c957f007e9c0f153a
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/84419
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Add current values of sync points to sync point read and wait
IOCTL's.
Change-Id: I479a66e283b47867ed13685b75c1858b4fb65c2d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/80006
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Bug 920845
Bug 931371
Change-Id: I7c03c7f2f16aee1be636c2f8fd8ad18cf7539eae
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/83724
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Simone Willett <swillett@nvidia.com>
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Bug 937953
Change-Id: I5466fedf6fdcd1f577753736e9eb9b2dbf5b52c0
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/83386
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Bug 937953
Change-Id: Ieb9a941faaad0945948af806e8bc09a1e51f5772
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/83369
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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The device tps65910/tps65911 supports the sleep
functionality in some of gpios. If gpio is configured
in output mode and sleep is enabled then during device
sleep state, the output of gpio becomes LOW regardless
of non-sleep output value.
Such gpio can be used to control regulator switch such
that output of regulator is off in device sleep state.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cherry-picked from mainline commit:
ccd68fff6b86b93a2d69caf4679c0ba4ca6dbc53
Resolve merge conflicts.
Change-Id: Ib424499821fde2ae916ae3792e980eab7dbdae4a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/79788
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Bug 920845
Change-Id: Id84218efaeebcc834fdac6e0e5c30adc60a13ebc
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/83727
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Liangchuan Mi <lmi@nvidia.com>
Tested-by: Liangchuan Mi <lmi@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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This reverts commit 961c60fe7213d92793d6072abc16f58721a33fed
Change-Id: I8ef0fbaee30e94c78b8df609f729953fee6d1583
Reviewed-on: http://git-master/r/84135
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
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Instead of forcing the board files to register this themselves, just add
a bool to the platform data to let the board files opt into this.
Change-Id: I4993275f31b0539c62249830d6a1180fb2719df8
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/83600
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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