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Some PHY of imx usb need power supply from vbus to make it work, if there
is no vbus, USB PHY will not in correct state when the controller starts to
work, for host, this requires vbus should be turned on before setting port
power(PP) of ehci, to work with this kind of USB PHY design, this patch adds
a flag CI_HDRC_IMX_VBUS_EARLY_ON, can be checked by host driver to turn on
vbus while start host.
Signed-off-by: Li Jun <jun.li@freescale.com>
(cherry picked from commit 1d4c054323817b49897fd7a59bc57b4d36f09491)
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To maintain scalability let's add common methods to attach and detach
a PM domain for a device, dev_pm_domain_attach|detach().
Typically dev_pm_domain_attach() shall be invoked from subsystem level
code at the probe phase to try to attach a device to its PM domain.
The reversed actions may be done a the remove phase and then by
invoking dev_pm_domain_detach().
When attachment succeeds, the attach function should assign its
corresponding detach function to a new ->detach() callback added in the
struct dev_pm_domain.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 46420dd73b800f87a19af13af5883855cf38cb08)
(cherry picked from commit 451a5b00e51410adc16f8349ed753f7eced46bc5)
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The intent of this callback is to simplify detachment of devices from
their PM domains. Further patches will show the benefit.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit c3099a5294f2c7266234e8ea35cbffc20a41aa9a)
(cherry picked from commit 96257e7b72821bbaa5681b1d2042050c6aab0ea1)
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This patch introduces generic code to perform PM domain look-up using
device tree and automatically bind devices to their PM domains.
Generic device tree bindings are introduced to specify PM domains of
devices in their device tree nodes.
Backwards compatibility with legacy Samsung-specific PM domain bindings
is provided, but for now the new code is not compiled when
CONFIG_ARCH_EXYNOS is selected to avoid collision with legacy code.
This will change as soon as the Exynos PM domain code gets converted to
use the generic framework in further patch.
This patch was originally submitted by Tomasz Figa when he was employed
by Samsung.
Link: http://marc.info/?l=linux-pm&m=139955349702152&w=2
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit aa42240ab2544a8bcb2efb400193826f57f3175e)
(cherry picked from commit 4a2d7a846761e3b86e08b903e5a1a088686e2181)
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There are no active users of this API. Let's remove it and if future
needs shows up we could consider to have a get/put API instead.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit d971f0b0eaaf3f2086bf21bbd64f7ea7e2f28459)
(cherry picked from commit 835729a13d0061f55d6bd714811a16ebaecb9b0e)
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The pm_genpd_syscore_poweroff() API and pm_genpd_syscore_poweron() API
makes the pm_genpd_syscore_switch() API redundant.
Moreover, since there are no active users, let's just remove it.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit d47e6464ae6c96735d4706f5cb0537fe717b6b00)
(cherry picked from commit 9b68cd944341e5a613e9858e65e3432bd5691f92)
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The genpd dev_irq_safe configuration somewhat overlaps with the runtime
PM pm_runtime_irq_safe() option. Also, currently genpd don't have a
good way to deal with these device. So, until we figured out if and how
to support this in genpd, let's remove the option to configure it.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit c5d79ec2a5715489cff16a0d1cf4fa9108a5509e)
(cherry picked from commit 4cffcdb2c92cabbba3e55a0f2d9c7d86d8a756ed)
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There no users of these callbacks, let's simplify the generic power
domain by removing them.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 1e0407ca54d28db8e5f02e437ff21cc6416c0be8)
(cherry picked from commit 0f19454e606c6fbc7ce980ca128a703ebc8990fb)
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In a step of simplifying the generic power domain let's move away from
using these callbacks.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 67da6d4bf43c4208433ef8f3ee487401b4dc9c74)
(cherry picked from commit b16a428836529af31f23b807065cc6e643c409da)
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There are no users of these APIs. To simplify the generic power domain
let's remove them.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 55e15c949fd05d247a889df0ed0177a676fec665)
(cherry picked from commit da452fc0f1a1a75993a6c989a600dd2de309026c)
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This reverts commit 4aa055cb0634bc8d0389070104fe6aa7cfa99b8c.
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit e599f64de890a60a3b9884dd5838c43472f145e2)
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This reverts commit e88c775a272b4f7af1a2fec8736fea9a55e58472.
Some HDMI TV not support rxsense as hotplug interrupter source.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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Add an interface for GPC used by drivers to keep mega fast mix domain
power.
Signed-off-by: Li Jun <jun.li@freescale.com>
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As spdif driver will register SPDIF clock to regmap, regmap will do
clk_prepare in init function, so SPDIF clock is prepared in probe, then its
root clock (pll clock) is prepared also, which cause the arm can't enter
low power mode.
Add SPDIF_GCLK in clock tree which share same gate bits with SPDIF clock.
Its root clock is ipg clock, and register it to regmap, then the issue can be
fixed.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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As spdif driver will register SPDIF clock to regmap, regmap will do
clk_prepare in init function, so SPDIF clock is prepared in probe, then its
root clock (pll clock) is prepared also, which cause the arm can't enter
low power mode.
Add SPDIF_GCLK in clock tree which share same gate bits with SPDIF clock.
Its root clock is ipg clock, and register it to regmap, then the issue can be
fixed.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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As spdif driver will register SPDIF clock to regmap, regmap will do
clk_prepare in init function, so SPDIF clock is prepared in probe, then its
root clock (pll clock) is prepared also, which cause the arm can't enter
low power mode.
Add SPDIF_GCLK in clock tree which share same gate bits with SPDIF clock.
Its root clock is ipg clock, and register it to regmap, then the issue can be
fixed.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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Add otg_fsm pointer in struct of usb_bus for access otg_fsm via bus.
Original way was to put it in usb_otg, then usb host can access otg_fsm via
hcd->usb_phy->otg->fsm, since usb_phy will not be the future direction, instead
phy is prefered, so this way may not work. It's more direct and simple to put
it in usb_bus.
Signed-off-by: Li Jun <jun.li@freescale.com>
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Add one field bcdOTG for OTG and EH supplement release number in OTG
descriptor according to On-The-Go and Embedded Host Supplement to the
USB Revision 2.0 Specification Revision 2.0 version 1.1a.
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <b47624@freescale.com>
(cherry picked from commit 1bf5e829100a2922826818bd8cbb18ee81452cfc)
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The glue layer may need to know current available role, add
ci_hdrc_query_available_role for that.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit 5c340402131ca6eacaeb122deb1ee59bcea2778c)
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This patch adds the imx6qdl.dtsi DTS support for crypto/caam. CAAM
clocking support is also included.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
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The AHBBRST at SBUSCFG and RX/TX burst size at BURSTSIZE are implementation
dependent, each platform may have different values, and some values may not be
optimized.
The glue layer can override ahb burst configuration value by setting flag
CI_HDRC_OVERRIDE_AHB_BURST and ahbburst_config.
The glue layer can override RX/TX burst size by setting flag
CI_HDRC_OVERRIDE_BURST_LENGTH and burst_length.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit a6bf7a97a83a58b9fe6de91975e4203c235036be)
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The chipidea IP has different limitations for host and device mode,
see below errata, we may need to enable SDIS(Stream Disable Mode)
at host mode, but we don't want it at device mode at some situations.
TAR 9000378958
Title: Non-Double Word Aligned Buffer Address Sometimes Causes Host to Hang on OUT Retry
Impacted Configuration: Host mode, all transfer types
Description:
The host core operating in streaming mode may under run while sending the data packet of an OUT transaction. This under run can occur if there are unexpected system delays in fetching the remaining packet data from memory. The host forces a bad CRC on the packet, the device detects the error and discards the packet. The host then retries a Bulk, Interrupt, or Control transfer if an under run occurs according to the USB specification.
During simulations, it was found that the host does not issue the retry of the failed bulk OUT. It does not issue any other transactions except SOF packets that have incorrect frame numbers.
The second failure mode occurs if the under run occurs on an ISO OUT transaction and the next ISO transaction is a zero byte packet. The host does not issue any transactions (including SOFs). The device detects a Suspend condition, reverts to full speed, and waits for resume signaling.
A third failure mode occurs when the host under runs on an ISO OUT and the next ISO in the schedule is an ISO OUT with two max packets of 1024 bytes each.
The host should issue MDATA for the first OUT followed by DATA1 for the second. However, it drops the MDATA transaction, and issues the DATA1 transaction.
The system impact of this bug is the same regardless of the failure mode observed. The host core hangs, the ehci_ctrl state machine waits for the protocol engine to send the completion status for the corrupted transaction, which never occurs. No indication is sent to the host controller driver, no register bits change and no interrupts occur. Eventually the requesting application times out.
Detailed internal behavior:
The EHCI control state machine (ehci_ctrl) in the DMA block is responsible for parsing the schedules and initiating all transactions. The ehci_ctrl state machine passes the transaction details to the protocol block by writing the transaction information in to the TxFIFO. It then asserts the pe_hst_run_pkt signal to inform the host protocol state machine (pe_hst_state) that there is a packet in the TxFIFO.
A tag of 0x0 indicates a start of packet with the data providing the following information:
35:32 Tag
31:30 Reserved
29:23 Endpoint (lowest 4 bits)
22:16 Address
15:10 Reserved
9:8 Endpoint speed
7:6 Endpoint type
5:6 Data Toggle
3:0 PID
The pe_hst_state reads the packet information and constructs the packet and issues it to the PHY interface.
The ehci_ctrl state machine writes the start transaction information in to the TxFIFO as 0x03002910c for the OUT packet that had the under run error. However, it writes 0xC3002910C for the retry of the Out transaction, which is incorrect.
The pe_hst_state enters a bus timeout state after sending the bad CRC for the packet that under ran. It then purges any data that was back filled in to the TxFIFO for the packet that under ran. The pe_hst_state machine stops purging the TxFIFO when it is empty or if it reads a location that has a tag of 0x0, indicating a start of packet command.
The pe_hst_state reads 0xC3002910C and discards it as it does not decode to a start of packet command. It continues to purge the OUT data that has been pre-buffered for the OUT retry . The pe_hst_state detects the hst_packet_run signal and attempts to read the PID and address information from the TxFIFO. This location has packet data and so does not decode to a valid PID and so falls through to the PE_HST_SOF_LOAD state where the frame_num_counter is updated. The frame_num_counter is updated with the data in the TxFIFO. In this case, the data is incorrect as the ehci_ctrl state machine did not initiate the load. The hst_pe_state machine detects the SOF request signal and sends an SOF with the bad frame number. Meanwhile, the ehci_ctrl state machine waits indefinitely in the run_pkt state waiting for the completion status from pe_hst_state machine, which will never happen.
The ISO failure case is similar except that there is no retry for ISO. The ehci_ctrl state machine moves to the next transfer in the periodic schedule. If the under run occurs on the last entry of the periodic list then it moves to the Async schedule.
In the case of ISO OUT simulations, the next ISO is a zero byte OUT and again the start of packet command gets corrupted. The TxFIFO is empty when the hst_pe_state attempts to read the Address and PID information as the transaction is a zero byte packet. This results in the hst_pe_state machine staying in the GET_PID state, which means that it does not issue any transactions (including SOFs). The device detects a Suspend condition and reverts to full speed mode and waits for a Resume or Reset signal.
The EHCI specification allows a Non-DoubleWord (32 bits) offset to be used as a current offset for Buffer Pointer Page 0 of the qTD. In Non-DoubleWord aligned cases, the core reads the packet data from the AHB memory, performs the alignment operation before writing it in to the TxFIFO as a 32 bit data word. An End Of Packet tag (EOP) is written to the TxFIFO after all the packet data has been written in to the TxFIFO. The alignment function is reset to Idle by the EOP tag. The corruption of the start of packet command arises because the packet buffer for the OUT transaction that under ran is not aligned to a DoubleWord, and hence no EOP tag is written to the TxFIFO. The alignment function is still active when the start packet information is written in to the TxFIFO for the retry of the bulk packet or for the next transaction in the case of an under run on an ISO. This results in the corruption of the start tag and the transaction information.
Click for waveform showing the command 0x 0000300291 being written in to the TX FIFO for the Out that under ran.
Click for waveform showing the command 0xC3002910C written to the TxFIFO instead of 0x 0000300291
Versions affected: Versions 2.10a and previous versions
How discovered: Customer simulation
Workaround:
1- The EHCI specification allows a non-DoubleWord offset to be used as a current offset for Buffer Pointer Page 0 of the qTD. However, if a DoubleWord offset is used then this issue does not arise.
2- Use non streaming mode to eliminate under runs.
Resolution:
The fix involves changes to the traffic state machine in the vusb_hs_dma_traf block. The ehci_ctrl state machine updates the context information by encoding the transaction results on the hst_op_context_update signals at the end of a transaction. The signal hst_op_context_update is added to the traffic state machine, and the tx_fifo_under_ran_r signal is generated if the transaction results in an under run error. Click for waveform
The traffic state machine then traverses to the do_eop states if the tx_fifo_under_ran error is asserted. Thus an EOP tag is written in to the TxFIFO as shown in this waveform .
The EOP tag resets the align state machine to the Idle state ensuring that the next command written by the echi_ctrl state machine does not get corrupted.
File(s) modified:
RTL code fixed: …..
Method of reproducing: This failure cannot be reproduced in the current test bench.
Date Found: March 2010
Date Fixed: June 2010
Update information:
Added the RTL code fix
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit 9bbed86327e015a28f7e680784bb00dd7c83533d)
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Add imx6 HSIC support
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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This patch adds OTG status selector request sending function, can be used
to poll peripheral if it wants to be host.
Signed-off-by: Li Jun <b47624@freescale.com>
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This patch starts HNP polling timer when otg is set to be a_host
or b_host.
Signed-off-by: Li Jun <b47624@freescale.com>
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This patch adds host_request_flag in usb_gadget to store host request
information from application.
Signed-off-by: Li Jun <b47624@freescale.com>
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Some gpc operations are mandatory required when
iMX6SX PCIe PHY is powered on/off.
use the notify framwork to encapsulate the
pre-operations in gpc driver
- add two pre-xxx macros into consumer.h
- kick off the pre-xxx events in enable/disalbe call back.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
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When the port goes to suspend or finishes resme, it needs to
notify PHY, it is not a standard EHCI operation, so we add a
quirk for it.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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They are used to notify PHY that the controller enters suspend
or finishes resume.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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This patch adds support of power lost during system sleep in otg fsm mode.
Signed-off-by: Li Jun <b47624@freescale.com>
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- Change .notify's return value from void to int, update msm notify_event
return value accordingly.
- Add CI_HDRC_CONTROLLER_VBUS_EVENT and
CI_HDRC_CONTROLLER_CHARGER_POST_EVENT to finish the USB charger
detection flow.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <jun.li@freescale.com>
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Add imx6 USB charger detection, the vbus supplier will create and
remove struct usb_charger, and notify vbus connect and disconnect
event. The detail USB charger detection flow is at: "i.MX6 RM,
Chapter Universal Serial Bus 2.0 Integrated PHY (USB-PHY),
Charger detection, Charger detection software flow".
Since imx6 only has charger detection function, and no charging
current function is existed. It the user wants the detection abilities
from SoC, it can use this detection method
(add imx6-usb-charger-detection at dts). If the charger IC
already has USB charger detection function, and the user wants
to use the detection method from charger IC, please do not add
imx6-usb-charger-detection property at dts.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Add runtime power management support.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Now, USB PHY is mandatory for chipidea core, the flag
CI_HDRC_REQUIRE_TRANSCEIVER is useless.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 947c88592f17bd299ff677049c3cda36cc6f93dd)
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The current EHCI implementation is prepared to toggle the
PORT_POWER bit to enable or disable a USB-Port. In some
cases this port power can not be just toggled by the PORT_POWER
bit, and the gpio-regulator is needed to be toggled too.
This patch defines a port power control interface ehci_port_power for
ehci core use, it toggles PORT_POWER bit as well as calls platform
defined .port_power if it is defined.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Acked-off-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 11a7e59405148c855e0a9d13588930ccec02c150)
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This patch adds support of the PHY framework for ChipIdea drivers.
Changes are done in both the ChipIdea common code and in the drivers
accessing the PHY. This is done by adding a new PHY member in
ChipIdea's structures and by taking care of it in the code.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit 1e5e2d3d055436c114e2f16145b83339aed024ff)
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This patch modify the generic code handling PHYs to allow them to be
supplied from the drivers. This adds checks to ensure no PHY was already
there when looking for one in the generic code. This also makes sure we
do not modify its state in the generic HCD functions, it was provided by
the driver.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit ef44cb4226d132146e44f8ea562a16b27ff61126)
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This patch adds support of the PHY framework in OTG and keeps the USB
PHY compatibility. Here the only modification is to add PHY member in
the OTG structure, along with the USB PHY one.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit 48bcc18076df4e07ef86226ac6ce795f64c84f7f)
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This patch prepares the introduction of the generic PHY support in the
USB OTG common functions. The USB PHY member of the OTG structure is
renamed to 'usb_phy' and modifications are done in all drivers accessing
it. Renaming this pointer will allow to keep the compatibility for USB
PHY drivers.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit 19c1eac2685b62640ca2386a0a885ac2152668c8)
Conflicts:
drivers/phy/phy-omap-usb2.c
drivers/usb/phy/phy-msm-usb.c
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Before using the PHY framework instead of the USB PHY one, we need to
move the OTG state into another place, since it won't be available when
USB PHY isn't used. This patch moves the OTG state into the OTG
structure, and makes all the needed modifications in the drivers
using the OTG state.
[ balbi@ti.com : fix build regressions with phy-tahvo.c, musb_dsps.c,
phy-isp1301-omap, and chipidea's debug.c ]
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
(cherry picked from commit e47d92545c2972bcf3711e7db80f481e402163c7)
Conflicts:
drivers/usb/musb/musb_gadget.c
drivers/usb/phy/phy-msm-usb.c
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Add the generic PHY support, analogous to the USB PHY support. Intended it to be
used with the PCI EHCI/OHCI drivers and the xHCI platform driver.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 0043325495222139daa0696db736f67658dc7770)
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The USB PHY member of the HCD structure is renamed to 'usb_phy' and
modifications are done in all drivers accessing it.
This is in preparation to adding the generic PHY support.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
[Sergei: added missing 'drivers/usb/misc/lvstest.c' file, resolved rejects,
updated changelog.]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 3d46e73dfdb840f460e5b06416965d132570ec33)
Conflicts:
drivers/usb/core/hub.c
drivers/usb/misc/lvstest.c
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The platform related header changes when enable mcc2.0
on imx_3.14 kernel, and tested on imx6sx sdb board.
- keep imx6sx soc related apis in mcc_imx6sx.c/h
- keep linux os related apis in mcc_linux.c/h
- add some new mcc callback in mu driver, since the
gie3 of mu is used as cpu2cpu interrupter in the mcc
implementation on imx6sx.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
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set the dual bsd/gpl copyright of the mcc common codes
implemented in linux bsp release.
add 2015
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
(cherry picked from commit 2df3613c8a2635c55b4a4e7b98b74df49ff16299)
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Common codes changes in the mcc 2.0 updates
- common definitions are moved from mcc_config.h to mcc_common.h
because that these definitions are common for the standalone mcc
stack, and shared by different platforms, such as Linux, MQX.
- re-define the common api _psp_core_num(), and _psp_node_num().
Let them to be no platform dependency.
- move the definition of the MCC_OS_USED in mcc_config.h
- new add on mcc_config_linux.h file, contained the platform
related macro definitions contained in mcc_config.h before.
- add the related linux modifications into mcc_api.c/mcc_common.c
when implement the mcc2.0 into linux BSP.
- fix one potential bug that all the share memory operations should
be protected by sema4.
Acked-by: Shawn Guo
Signed-off-by: Richard Zhu <richard.zhu@freescale.com>
(cherry picked from commit 541325a16b6db73a86a5a86049145b0060805c7c)
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This is the base line of the mcc version 2.0.
Acked-by: Shawn Guo
Signed-off-by: Richard Zhu <richard.zhu@freescale.com>
(cherry picked from commit cfd44c266e3b8a833ac624b86be627efbda6aaa9)
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This patch is based on the patches by Per Forlin, Tony Lin and Ryan QIAN.
This patch complete the API 'post_req' and 'pre_req' in sdhci host side,
Test Env:
1. i.MX6Q-SABREAUTO board, CPU @ 996MHz, use ADMA in uSDHC controller.
2. Test command:
$ echo 1 > /proc/sys/vm/drop_caches
write to sd card:
$ dd if=/dev/zero of=/dev/mmcblk0 bs=1M count=2000 conv=fsync
read the sd card:
$ dd if=/dev/mmcblk0 of=/dev/null bs=1M count=2000
3. TOSHIBA 16GB SD3.0 card, running at 4 bit, SDR104 @ 198MHZ
Performance with and without this patch:
-------------------------------------------------
| | read speed | write speed |
|------------------------------------------------
| with this patch | ~76.7 MB/s | ~23.3 MB/s |
|------------------------------------------------
|without this patch | ~60.5 MB/s | ~22.5 MB/s |
-------------------------------------------------
4. SanDisk 8GB SD3.0 card, running at 4 bit, DDR50 @ 50MHZ
Performance with and without this patch:
-------------------------------------------------
| | read speed | write speed |
|------------------------------------------------
| with this patch | ~40.5 MB/s | ~15.6 MB/s |
|------------------------------------------------
|without this patch | ~36.1 MB/s | ~14.1 MB/s |
-------------------------------------------------
5. Kingston 8GB SD2.0 card, running at 4 bit, High-speed @ 50MHZ
Performance with and without this patch:
-------------------------------------------------
| | read speed | write speed |
|------------------------------------------------
| with this patch | ~22.7 MB/s | ~8.2 MB/s |
|------------------------------------------------
|without this patch | ~21.3 MB/s | ~8.0 MB/s |
-------------------------------------------------
6. About eMMC, Sandisk 8GB eMMC on i.MX6DL-sabresd board, CPU @ 792MHZ,
eMMC running at 8 bit, DDR52 @ 52MHZ.
Performance with and without this patch:
-------------------------------------------------
| | read speed | write speed |
|------------------------------------------------
| with this patch | ~37.3 MB/s | ~10.5 MB/s |
|------------------------------------------------
|without this patch | ~33.4 MB/s | ~10.5 MB/s |
-------------------------------------------------
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit a0a60bf36806be9528d4011563e9367bddeff762)
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Add new ecspi tx sdma script in the head file.
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit 9ca3cf4f301dc6d4130624814e689b676125fd36)
(cherry picked from commit 4241bfb6920410de9a05c420e6abd9c98b6bf388)
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We cannot unconditionally use dma_map_single() to map data for use with
SPI since transfers may exceed a page and virtual addresses may not be
provided with physically contiguous pages. Further, addresses allocated
using vmalloc() need to be mapped differently to other addresses.
Currently only the MXS driver handles all this, a few drivers do handle
the possibility that buffers may not be physically contiguous which is
the main potential problem but many don't even do that. Factoring this
out into the core will make it easier for drivers to do a good job so if
the driver is using the core DMA code then generate a scatterlist
instead of mapping to a single address so do that.
This code is mainly based on a combination of the existing code in the MXS
and PXA2xx drivers. In future we should be able to extend it to allow the
core to concatenate adjacent transfers if they are compatible, improving
performance.
Currently for simplicity clients are not allowed to use the scatterlist
when they do DMA mapping, in the future the existing single address
mappings will be replaced with use of the scatterlist most likely as
part of pre-verifying transfers.
This change makes it mandatory to use scatterlists when using the core DMA
mapping so update the s3c64xx driver to do this when used with dmaengine.
Doing so makes the code more ugly but it is expected that the old s3c-dma
code can be removed very soon.
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 6ad45a27cbe343ec8d7888e5edf6335499a4b555)
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It is fairly common for SPI devices to require that one or both transfer
directions is always active. Currently drivers open code this in various
ways with varying degrees of efficiency. Start factoring this out by
providing flags SPI_MASTER_MUST_TX and SPI_MASTER_MUST_RX. These will cause
the core to provide buffers for the requested direction if none are
specified in the underlying transfer.
Currently this is fairly inefficient since we actually allocate a data
buffer which may get large, support for mapping transfers using a
scatterlist will allow us to avoid this for DMA based transfers.
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 3a2eba9bd0a6447dfbc01635e4cd0689f5f2bdad)
(cherry picked from commit d88018dac8450a46cf68d5bd9711bf71cc751e8d)
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