Age | Commit message (Collapse) | Author |
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1 close clock when asrc is not working.
2 enable the asrc core clock when user sucessfully request an
ASRC pair and disable it when the pair is release.So the call
from ESAI using the p2p DMA mode can be support.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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Add irq count to CPUFreq as a freq change condition.
Because some devices' working mode is unable to issue
CPUFreq change because of low CPU loading, but the cpu
freq will impact these devices' performace significantly.
Interactive govervor will sample the cpu loading as well
as the irq count which is registered. If the
loading or the irq count exceed the threshold we set,
governor will issue an CPUFreq change request.
These devices' irq threshold and enable/disable can be modified
via /sys/devices/system/cpu/cpufreq/interactive/irq_scaling
echo 0xAABBBC to change the default setting as below
AA : irq number
BBB: threshold
C :enable or disable
Currently only enable USDHC3, USDHC4, GPU, SATA and
USB by default, we can add device to the init struct which is
located in arch/arm/mach-mx6/irq.c.
Signed-off-by: Anson Huang <b20788@freescale.com>
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cpufreq: interactive: New 'interactive' governor
This governor is designed for latency-sensitive workloads, such as
interactive user interfaces. The interactive governor aims to be
significantly more responsive to ramp CPU quickly up when CPU-intensive
activity begins.
Existing governors sample CPU load at a particular rate, typically
every X ms. This can lead to under-powering UI threads for the period of
time during which the user begins interacting with a previously-idle system
until the next sample period happens.
The 'interactive' governor uses a different approach. Instead of sampling
the CPU at a specified rate, the governor will check whether to scale the
CPU frequency up soon after coming out of idle. When the CPU comes out of
idle, a timer is configured to fire within 1-2 ticks. If the CPU is very
busy from exiting idle to when the timer fires then we assume the CPU is
underpowered and ramp to MAX speed.
If the CPU was not sufficiently busy to immediately ramp to MAX speed, then
the governor evaluates the CPU load since the last speed adjustment,
choosing the highest value between that longer-term load or the short-term
load since idle exit to determine the CPU speed to ramp to.
A realtime thread is used for scaling up, giving the remaining tasks the
CPU performance benefit, unlike existing governors which are more likely to
schedule rampup work to occur after your performance starved tasks have
completed.
The tuneables for this governor are:
/sys/devices/system/cpu/cpufreq/interactive/min_sample_time:
The minimum amount of time to spend at the current frequency before
ramping down. This is to ensure that the governor has seen enough
historic CPU load data to determine the appropriate workload.
/sys/devices/system/cpu/cpufreq/interactive/go_maxspeed_load
The CPU load at which to ramp to max speed.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Solve the ASRC noise:
1 change the DMA mode from normal mode to loop mode.
2 use dma_alloc_coherent alloc dma buffer instead of kzalloc.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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head file part
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
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Since some power rail is differnet between pfuze100 0.1 and pfuze100 1.0,
remove PFUZE100_FIRST_VERSION and change PFUZE100_SW4_VOL6 define.
Signed-off-by: Robin Gong <b38343@freescale.com>
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In order to know which wakeup event occurs for usb wakeup
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Add discharge vbus flag
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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the patch is based on a series of patches by Per Forlin
the patch is sdhci host side implementation.
using a toshiba SDHC3.0 card, the performance increases
from 48.5MB/s to 52.4MB/s.
cmd: dd if=/dev/mmcblk0 of=/dev/null bs=1M count=500
the performance results running@1GHz, 200MHz CPU freq are:
52.4MB/s -> 20.7MB/s
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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Remove rst_gpio field to mxc_audio_platform_data.
Signed-off-by: Lionel Xu <Lionel.Xu@freescale.com>
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Some host controllers will not operate without a hardware
timeout that is limited in value. However large discards
require large timeouts, so there needs to be a way to
specify the maximum discard size.
A host controller driver may now specify the maximum discard
timeout possible so that max_discard_sectors can be calculated.
However, for eMMC when the High Capacity Erase Group Size
is not in use, the timeout calculation depends on clock
rate which may change. For that case Preferred Erase Size
is used instead.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
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If the MMC_SEND_STATUS command is not successful, we should not return
a zero status word, but instead allow the caller to know positively
that an error occurred.
Convert the open-coded get_card_status() to use the helper function,
and provide definitions for the card state field.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
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Previously there has only been one function mmc_wait_for_req()
to start and wait for a request. This patch adds:
* mmc_start_req() - starts a request wihtout waiting
If there is on ongoing request wait for completion
of that request and start the new one and return.
Does not wait for the new command to complete.
This patch also adds new function members in struct mmc_host_ops
only called from core.c:
* pre_req - asks the host driver to prepare for the next job
* post_req - asks the host driver to clean up after a completed job
The intention is to use pre_req() and post_req() to do cache maintenance
while a request is active. pre_req() can be called while a request is
active to minimize latency to start next job. post_req() can be used after
the next job is started to clean up the request. This will minimize the
host driver request end latency. post_req() is typically used before
ending the block request and handing over the buffer to the block layer.
Add a host-private member in mmc_data to be used by pre_req to mark the
data. The host driver will then check this mark to see if the data is
prepared or not.
Signed-off-by: Per Forlin <per.forlin@linaro.org>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Venkatraman S <svenkatr@ti.com>
Tested-by: Sourav Poddar <sourav.poddar@ti.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
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This was legacy code brought over from the RT tree and
is no longer necessary.
Signed-off-by: Dima Zavin <dima@android.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Daniel Walker <dwalker@codeaurora.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: Lai Jiangshan <laijs@cn.fujitsu.com>
Link: http://lkml.kernel.org/r/1310084879-10351-2-git-send-email-dima@android.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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- add hook for post tuning in common code
- add hook for post tuning for platform code to deal with clean up stuff on
finishing tuning.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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In order to reflect the function well, it needs to discharge
both dp and dm, so change the function name.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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* Add generic audio codec platform_data to be able to
pass specific settings to audio codecs found in Freescale
target boards.
* cs42888 get this platform data to override specific settings
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
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Don't show hdmi as an audio playback device if hdmi isn't
configured on the command line.
Signed-off-by: Alan Tull <r80115@freescale.com>
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When use clk_enable and clk_disable function, system may enter
sleep. so these 2 funciton can not used surrounding with spin
lock/unlock. And the clk_enable/disable function already keep
the counter of open and close and it is no need to keep the counter
in driver.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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Close ASRC core clock when ASRC device is not used.
Open ASRC core clock when an ASRC device is open. Close ASRC core
clock when an ASRC device is close.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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- Added new register definitions for EPDCv2.0
- Added support for 64 LUTs
- Conditionalized code for EPDC versions 1.0, 2.0, and 2.1
- Support for EPDC auto-waveform selection
- Support for collision test mode
- Support for PxP bypassing
- Support for LUT cancellation
- Support for new PxP limitations
- Support for collision minimization EPDC feature
- Added workaround for collision status bug (can't clear
IRQ before reading collision status for LUTs 16-63)
Signed-off-by: Danny Nold <dannynold@freescale.com>
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add ePxP v2 DMAENGINE driver
Signed-off-by: Robby Cai <R63905@freescale.com>
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add this to support MX6Q_SABRESD board hardware design.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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This reverts commit cc9616316bf044382ec422da5a6d4ed007235a3d.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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head file
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
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Add functionality to parse Audio Data Blocks from EDID data to
find out what modes of LPCM are suppored by the HDMI sink device.
The parsed settings are saved in the hdmi mfd. The HDMI audio driver
will check the settings when the audio stream is opened and will
then apply appropriate constraints.
If we are unable to read from the EDID, then we default to supporting
Basic Audio as defined by the HDMI specification (stereo, 16 bit,
32KHz, 44.1KHz, 48KHz PCM).
Signed-off-by: Alan Tull <r80115@freescale.com>
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Add IOCTRL command V4L2_CID_MXC_SWITCH_CAM for multi camera switch
Signed-off-by: Yuxi Sun <b36102@freescale.com>
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fix build error:
incompatible pointer type
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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- add macros and struct used in new ath6kl.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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Add a new field to gpmi_nand_platform_data{}.
Make the BBT support to board specific.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Move the header to a more common place.
The mxs dma engine is not only used in mx23/mx28, but also used
in mx50/mx6q. It will also be used in the future chips.
rename it to mxs-dma.h
Acked-by: Lily Zhang <r58066@freescale.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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ENGR152547-03 [MX6Q]add SDHC3.0 support on uSDHC controller
add voltage switch function due to SDHC3.0 spec requirement
add tuning function due to SDHC3.0 spec requirement
extend some functions to support SDR50 & SDR104 speed mode
- adjust the sequence of current_limit and bus_speed_mode
- add FSL specific tuning procedure
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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add the new macro to fix a compiling error.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Encapsulate last MTD partition parser argument into a separate
structure. Currently it holds only 'origin' field for RedBoot parser,
but will be extended in future to contain at least device_node for OF
devices.
Amended commentary to make kerneldoc happy
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Artem Bityutskiy <dedekind1@gmail.com>
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Lots (nearly all) mtd drivers contain nearly the similar code that
calls parse_mtd_partitions, provides some platform-default values, if
parsing fails, and registers mtd device.
This is an aim to provide single implementation of this scenario:
mtd_device_parse_register() which will handle all this parsing and
defaults.
Artem: amended comments
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
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It's for migrating to generic clk framework API.
The helper functions help cases clk_enable/clk_disable is used
in non-atomic context.
For example, Call clk_enable in probe and clk_disable in remove.
Signed-off-by: Richard Zhao <richard.zhao@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
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As discussed previously, there's the need on some platforms to run some
parts of clk_enable() in contexts which can schedule. The solution
which was agreed upon was to provide clk_prepare() and clk_unprepare()
to contain this parts, while clk_enable() and clk_disable() perform
the atomic part.
This patch provides a common definition for clk_prepare() and
clk_unprepare() in linux/clk.h, and provides an upgrade path for
existing implementation and drivers: drivers can start using
clk_prepare() and clk_unprepare() once this patch is merged without
having to wait for platform support. Platforms can then start to
provide these additional functions.
Eventually, HAVE_CLK_PREPARE will be removed from the kernel, and
everyone will have to provide these new APIs.
Acked-by: Saravana Kannan <skannan@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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fixup usage of dma direction by introducing dma_transfer_direction,
this patch moves dma/drivers/* to use new enum
Cc: Jassi Brar <jaswinder.singh@linaro.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Viresh Kumar <viresh.kumar@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Mika Westerberg <mika.westerberg@iki.fi>
Cc: H Hartley Sweeten <hartleys@visionengravers.com>
Cc: Li Yang <leoli@freescale.com>
Cc: Zhang Wei <zw@zh-kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Yong Wang <yong.y.wang@intel.com>
Cc: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com>
Cc: Boojin Kim <boojin.kim@samsung.com>
Cc: Barry Song <Baohua.Song@csr.com>
Acked-by: Mika Westerberg <mika.westerberg@iki.fi>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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Before dma_transfer_direction was introduced to replace
dma_data_direction, some dmaengine device uses DMA_NONE of
dma_data_direction for some talk with its client drivers.
The mxs-dma and its clients mxs-mmc and gpmi-nand are such case.
This patch adds DMA_TRANS_NONE to dma_transfer_direction and
migrate the DMA_NONE use in mxs-dma to it.
It also fixes the compile warning below.
CC drivers/dma/mxs-dma.o
drivers/dma/mxs-dma.c: In function ‘mxs_dma_prep_slave_sg’:
drivers/dma/mxs-dma.c:420:16: warning: comparison between ‘enum dma_transfer_direction’ and ‘enum dma_data_direction’
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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The implicit presence of module.h and all its sub-includes was
masking these implicit header usages:
include/linux/dmaengine.h:684: warning: 'struct page' declared inside parameter list
include/linux/dmaengine.h:684: warning: its scope is only this definition or declaration, which is probably not what you want
include/linux/dmaengine.h:687: warning: 'struct page' declared inside parameter list
include/linux/dmaengine.h:736:2: error: implicit declaration of function 'bitmap_zero'
With input from Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
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This new enum removes usage of dma_data_direction for dma direction. The new
enum cleans tells the DMA direction and mode
This further paves way for merging the dmaengine _prep operations and also for
interleaved dma
Suggested-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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Commit 90b44f8 introduces dmaengine_prep_slave_single API which adds
scatterlist.h in dmaengine.h, so defining struct scatterlist is not required
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
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For clients which require a single slave transfer and dont want to be bothered
about the scatterlist api, this helper gives simple API for this transfer and
creates single scatterlist for DMA API
Idea from Russell King
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually).
To prevent mm.h inclusion via other channels also extract "enum dma_data_direction"
definition into separate header. This tiny piece is what gluing netdevice.h with mm.h
via "netdevice.h => dmaengine.h => dma-mapping.h => scatterlist.h => mm.h".
Removal of mm.h from scatterlist.h was tried and was found not feasible
on most archs, so the link was cutoff earlier.
Hope people are OK with tiny include file.
Note, that mm_types.h is still dragged in, but it is a separate story.
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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ENGR126228 eMMC: Configure boot_partition_enable
Enable the configurations of the boot enable on the eMMC cards.
Add the interface that used to configure the boot_bus_width
In order to make sure that the re-read the ext-csd of card
can be completed successfully, add the method to wait for
the finish of the busy state.
NOTE:
The following are the valid inputs when configure the boot
bus width of the eMMC cards.
+--------------------------------------------------------------------+
| Bit7 Bit6 Bit5 | Bit4 Bit3 | Bit2 | Bit1 Bit0 |
|----------------|----------------------------------|----------------|
| X | BOOT_MODE | RESET_BOOT_BUS_WIDTH | BOOT_BUS_WIDTH |
+--------------------------------------------------------------------+
Bit [4:3] : BOOT_MODE (non-volatile)
0x0 : Use single data rate + backward compatible timings in boot
operation (default)
0x1 : Use single data rate + high speed timings in boot operation mode
0x2 : Use dual data rate in boot operation
0x3 : Reserved
Bit [2]: RESET_BOOT_BUS_WIDTH (non-volatile)
0x0 : Reset bus width to x1, single data rate and backward compatible
timings after boot operation (default)
0x1 : Retain boot bus width and boot mode after boot operation
Bit[1:0] : BOOT_BUS_WIDTH (non-volatile)
0x0 : x1 (sdr) or x4 (ddr) bus width in boot operation mode (default)
0x1 : x4 (sdr/ddr) bus width in boot operation mode
0x2 : x8 (sdr/ddr) bus width in boot operation mode
0x3 : Reserved
The following are the valid inputs when configure the boot
partitions of the eMMC cards.
+------------------------------------------------------------+
| Bit7 | Bit6 | Bit5 Bit4 Bit3 | Bit2 Bit1 Bit0 |
|------|----------|-----------------------|------------------|
| X | BOOT_ACK | BOOT_PARTITION_ENABLE | PARTITION_ACCESS |
+------------------------------------------------------------+
Bit7: Reserved
Bit6: always set to vaule '1' when boot_part is enabled
Bit[5:3]:
0x0 : Device not boot enabled (default)
0x1 : Boot partition 1 enabled for boot
0x2 : Boot partition 2 enabled for boot
0x7 : User area enabled for boot
Bit[2:0]:
0x0 : No access to boot partition (default)
0x1 : R/W boot partition 1
0x2 : R/W boot partition 2
So only the '0, 1, 2; 8, 9, 10; 16, 17, 18; 56, 57, 58' are
valid parameters when configure the boot_partiton.
Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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ENGR125411 eMMC: Boot Partition switch func used in MFG tool
User can get eMMC partitions info from user space layer in
linux OS enviroment.
User can do switch operations between the eMMC boot partitions
and the user partition.
User can access the eMMC boot partitions from user space layer
in linux OS enviroment.
NOTE:This func had been verified on TOSHIBA eMMC44 card only.
Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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