From 10f13c70c956131b2f5b49224496aa23bb953683 Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Mon, 29 Jul 2019 18:46:23 +0200 Subject: ARM64: dts: colibri-imx8x: Add common eval-hardware to devicetree Signed-off-by: Philippe Schenker --- .../dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi | 93 +++++++++++++++++++++- .../boot/dts/freescale/fsl-imx8qxp-colibri.dtsi | 14 +++- 2 files changed, 104 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi index 9d7eb0ebfaa0..00658f075305 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi @@ -9,6 +9,13 @@ rtc1 = &rtc; }; + /* fixed crystal dedicated to mpc25xx */ + clk16m: clk16m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <16000000>; + }; + display-subsystem { status = "disabled"; }; @@ -21,6 +28,20 @@ pinctrl-0 = <&pinctrl_usbc_det>; }; + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpiokeys>; + + power { + label = "Wake-Up"; + gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>; + linux,code = ; + debounce-interval = <10>; + gpio-key,wakeup; + }; + }; + panel { compatible = "panel-dpi"; backlight = <&backlight>; @@ -53,6 +74,20 @@ }; regulators { + reg_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_5v0: regulator-5v0 { + compatible = "regulator-fixed"; + regulator-name = "5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + reg_usbh_vbus: regulator-usbh-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; @@ -66,6 +101,12 @@ }; }; +/* Colibri Analogue Inputs */ +&adc0 { + status = "okay"; +}; + +/* Colibri Parallel RGB */ &adma_lcdif { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcdif>; @@ -87,6 +128,11 @@ status = "okay"; }; +/* Colibri Ethernet */ +&fec1 { + status = "okay"; +}; + &gpu_3d0 { status = "okay"; }; @@ -109,6 +155,20 @@ &lpspi2 { status = "okay"; + mcp2515: can@0 { + compatible = "microchip,mcp2515"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can_int>; + reg = <0>; + clocks = <&clk16m>; + interrupt-parent = <&gpio3>; + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + spi-max-frequency = <10000000>; + vdd-supply = <®_3v3>; + xceiver-supply = <®_5v0>; + status = "okay"; + }; + spidev0: spidev@0 { compatible = "toradex,evalspi"; reg = <0>; @@ -116,6 +176,17 @@ }; }; +/* Colibri UART_B */ +&lpuart0 { + status= "okay"; +}; + +/* Colibri UART_C */ +&lpuart2 { + status= "okay"; +}; + +/* Colibri UART_A */ &lpuart3 { status= "okay"; }; @@ -125,6 +196,21 @@ status = "okay"; }; +/* Colibri PWM_B */ +&pwm0 { + status = "okay"; +}; + +/* Colibri PWM_C */ +&pwm1 { + status = "okay"; +}; + +/* Colibri PWM_D */ +&pwm2 { + status = "okay"; +}; + &usbotg1 { extcon = <&extcon_usbc_det &extcon_usbc_det>; vbus-supply = <®_usbh_vbus>; @@ -141,8 +227,13 @@ status = "okay"; }; +/* Colibri SDCard */ +&usdhc2 { + status = "okay"; +}; + &vpu { - status = "disabled"; + status = "okay"; }; &vpu_decoder { diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi index 75157b0e0d8b..8b7275dcd5f9 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi @@ -271,6 +271,12 @@ >; }; + pinctrl_can_int: can-int-grp { + fsl,pins = < + SC_P_QSPI0A_DQS_LSIO_GPIO3_IO13 0x40 /* SODIMM 73 */ + >; + }; + pinctrl_csi_ctl: csictlgrp { fsl,pins = < SC_P_QSPI0A_SS0_B_LSIO_GPIO3_IO14 0x20 /* SODIMM 77 */ @@ -278,6 +284,12 @@ >; }; + pinctrl_gpiokeys: gpiokeysgrp { + fsl,pins = < + SC_P_QSPI0A_DATA1_LSIO_GPIO3_IO10 0x20 /* SODIMM 45 */ + >; + }; + /* Colibri UART_B */ pinctrl_lpuart0: lpuart0grp { fsl,pins = < @@ -364,11 +376,9 @@ pinctrl_hog1: hog1grp { fsl,pins = < - SC_P_QSPI0A_DATA1_LSIO_GPIO3_IO10 0x20 /* SODIMM 45 */ SC_P_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02 0x06000020 /* SODIMM 65 */ SC_P_CSI_D07_CI_PI_D09 0x61 /* SODIMM 65 */ SC_P_QSPI0A_DATA2_LSIO_GPIO3_IO11 0x20 /* SODIMM 69 */ - SC_P_QSPI0A_DQS_LSIO_GPIO3_IO13 0x20 /* SODIMM 73 */ SC_P_SAI0_TXC_LSIO_GPIO0_IO26 0x20 /* SODIMM 79 */ SC_P_CSI_D02_CI_PI_D04 0x61 /* SODIMM 79 */ SC_P_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 0x06000020 /* SODIMM 85 */ -- cgit v1.2.3